iwl-dev.h revision f862a2367b429d46d12362fea07d844c2bf55969
1/****************************************************************************** 2 * 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * The full GNU General Public License is included in this distribution in the 19 * file called LICENSE. 20 * 21 * Contact Information: 22 * Intel Linux Wireless <ilw@linux.intel.com> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 *****************************************************************************/ 26/* 27 * Please use this file (iwl-dev.h) for driver implementation definitions. 28 * Please use iwl-commands.h for uCode API definitions. 29 * Please use iwl-4965-hw.h for hardware-related definitions. 30 */ 31 32#ifndef __iwl_dev_h__ 33#define __iwl_dev_h__ 34 35#include <linux/pci.h> /* for struct pci_device_id */ 36#include <linux/kernel.h> 37#include <net/ieee80211_radiotap.h> 38 39#include "iwl-eeprom.h" 40#include "iwl-csr.h" 41#include "iwl-prph.h" 42#include "iwl-fh.h" 43#include "iwl-debug.h" 44#include "iwl-4965-hw.h" 45#include "iwl-3945-hw.h" 46#include "iwl-agn-hw.h" 47#include "iwl-led.h" 48#include "iwl-power.h" 49#include "iwl-agn-rs.h" 50 51/* configuration for the iwl4965 */ 52extern struct iwl_cfg iwl4965_agn_cfg; 53extern struct iwl_cfg iwl5300_agn_cfg; 54extern struct iwl_cfg iwl5100_agn_cfg; 55extern struct iwl_cfg iwl5350_agn_cfg; 56extern struct iwl_cfg iwl5100_bgn_cfg; 57extern struct iwl_cfg iwl5100_abg_cfg; 58extern struct iwl_cfg iwl5150_agn_cfg; 59extern struct iwl_cfg iwl5150_abg_cfg; 60extern struct iwl_cfg iwl6000g2a_2agn_cfg; 61extern struct iwl_cfg iwl6000i_2agn_cfg; 62extern struct iwl_cfg iwl6000i_2abg_cfg; 63extern struct iwl_cfg iwl6000i_2bg_cfg; 64extern struct iwl_cfg iwl6000_3agn_cfg; 65extern struct iwl_cfg iwl6050_2agn_cfg; 66extern struct iwl_cfg iwl6050_2abg_cfg; 67extern struct iwl_cfg iwl1000_bgn_cfg; 68extern struct iwl_cfg iwl1000_bg_cfg; 69 70struct iwl_tx_queue; 71 72/* CT-KILL constants */ 73#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ 74#define CT_KILL_THRESHOLD 114 /* in Celsius */ 75#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */ 76 77/* Default noise level to report when noise measurement is not available. 78 * This may be because we're: 79 * 1) Not associated (4965, no beacon statistics being sent to driver) 80 * 2) Scanning (noise measurement does not apply to associated channel) 81 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) 82 * Use default noise value of -127 ... this is below the range of measurable 83 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. 84 * Also, -127 works better than 0 when averaging frames with/without 85 * noise info (e.g. averaging might be done in app); measured dBm values are 86 * always negative ... using a negative value as the default keeps all 87 * averages within an s8's (used in some apps) range of negative values. */ 88#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) 89 90/* 91 * RTS threshold here is total size [2347] minus 4 FCS bytes 92 * Per spec: 93 * a value of 0 means RTS on all data/management packets 94 * a value > max MSDU size means no RTS 95 * else RTS for data/management frames where MPDU is larger 96 * than RTS value. 97 */ 98#define DEFAULT_RTS_THRESHOLD 2347U 99#define MIN_RTS_THRESHOLD 0U 100#define MAX_RTS_THRESHOLD 2347U 101#define MAX_MSDU_SIZE 2304U 102#define MAX_MPDU_SIZE 2346U 103#define DEFAULT_BEACON_INTERVAL 100U 104#define DEFAULT_SHORT_RETRY_LIMIT 7U 105#define DEFAULT_LONG_RETRY_LIMIT 4U 106 107struct iwl_rx_mem_buffer { 108 dma_addr_t page_dma; 109 struct page *page; 110 struct list_head list; 111}; 112 113#define rxb_addr(r) page_address(r->page) 114 115/* defined below */ 116struct iwl_device_cmd; 117 118struct iwl_cmd_meta { 119 /* only for SYNC commands, iff the reply skb is wanted */ 120 struct iwl_host_cmd *source; 121 /* 122 * only for ASYNC commands 123 * (which is somewhat stupid -- look at iwl-sta.c for instance 124 * which duplicates a bunch of code because the callback isn't 125 * invoked for SYNC commands, if it were and its result passed 126 * through it would be simpler...) 127 */ 128 void (*callback)(struct iwl_priv *priv, 129 struct iwl_device_cmd *cmd, 130 struct iwl_rx_packet *pkt); 131 132 /* The CMD_SIZE_HUGE flag bit indicates that the command 133 * structure is stored at the end of the shared queue memory. */ 134 u32 flags; 135 136 DECLARE_PCI_UNMAP_ADDR(mapping) 137 DECLARE_PCI_UNMAP_LEN(len) 138}; 139 140/* 141 * Generic queue structure 142 * 143 * Contains common data for Rx and Tx queues 144 */ 145struct iwl_queue { 146 int n_bd; /* number of BDs in this queue */ 147 int write_ptr; /* 1-st empty entry (index) host_w*/ 148 int read_ptr; /* last used entry (index) host_r*/ 149 /* use for monitoring and recovering the stuck queue */ 150 int last_read_ptr; /* storing the last read_ptr */ 151 /* number of time read_ptr and last_read_ptr are the same */ 152 u8 repeat_same_read_ptr; 153 dma_addr_t dma_addr; /* physical addr for BD's */ 154 int n_window; /* safe queue window */ 155 u32 id; 156 int low_mark; /* low watermark, resume queue if free 157 * space more than this */ 158 int high_mark; /* high watermark, stop queue if free 159 * space less than this */ 160} __attribute__ ((packed)); 161 162/* One for each TFD */ 163struct iwl_tx_info { 164 struct sk_buff *skb[IWL_NUM_OF_TBS - 1]; 165}; 166 167/** 168 * struct iwl_tx_queue - Tx Queue for DMA 169 * @q: generic Rx/Tx queue descriptor 170 * @bd: base of circular buffer of TFDs 171 * @cmd: array of command/TX buffer pointers 172 * @meta: array of meta data for each command/tx buffer 173 * @dma_addr_cmd: physical address of cmd/tx buffer array 174 * @txb: array of per-TFD driver data 175 * @need_update: indicates need to update read/write index 176 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled 177 * 178 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame 179 * descriptors) and required locking structures. 180 */ 181#define TFD_TX_CMD_SLOTS 256 182#define TFD_CMD_SLOTS 32 183 184struct iwl_tx_queue { 185 struct iwl_queue q; 186 void *tfds; 187 struct iwl_device_cmd **cmd; 188 struct iwl_cmd_meta *meta; 189 struct iwl_tx_info *txb; 190 u8 need_update; 191 u8 sched_retry; 192 u8 active; 193 u8 swq_id; 194}; 195 196#define IWL_NUM_SCAN_RATES (2) 197 198struct iwl4965_channel_tgd_info { 199 u8 type; 200 s8 max_power; 201}; 202 203struct iwl4965_channel_tgh_info { 204 s64 last_radar_time; 205}; 206 207#define IWL4965_MAX_RATE (33) 208 209struct iwl3945_clip_group { 210 /* maximum power level to prevent clipping for each rate, derived by 211 * us from this band's saturation power in EEPROM */ 212 const s8 clip_powers[IWL_MAX_RATES]; 213}; 214 215/* current Tx power values to use, one for each rate for each channel. 216 * requested power is limited by: 217 * -- regulatory EEPROM limits for this channel 218 * -- hardware capabilities (clip-powers) 219 * -- spectrum management 220 * -- user preference (e.g. iwconfig) 221 * when requested power is set, base power index must also be set. */ 222struct iwl3945_channel_power_info { 223 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 224 s8 power_table_index; /* actual (compenst'd) index into gain table */ 225 s8 base_power_index; /* gain index for power at factory temp. */ 226 s8 requested_power; /* power (dBm) requested for this chnl/rate */ 227}; 228 229/* current scan Tx power values to use, one for each scan rate for each 230 * channel. */ 231struct iwl3945_scan_power_info { 232 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 233 s8 power_table_index; /* actual (compenst'd) index into gain table */ 234 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ 235}; 236 237/* 238 * One for each channel, holds all channel setup data 239 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant 240 * with one another! 241 */ 242struct iwl_channel_info { 243 struct iwl4965_channel_tgd_info tgd; 244 struct iwl4965_channel_tgh_info tgh; 245 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */ 246 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for 247 * HT40 channel */ 248 249 u8 channel; /* channel number */ 250 u8 flags; /* flags copied from EEPROM */ 251 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 252 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ 253 s8 min_power; /* always 0 */ 254 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ 255 256 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ 257 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ 258 enum ieee80211_band band; 259 260 /* HT40 channel info */ 261 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 262 u8 ht40_flags; /* flags copied from EEPROM */ 263 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ 264 265 /* Radio/DSP gain settings for each "normal" data Tx rate. 266 * These include, in addition to RF and DSP gain, a few fields for 267 * remembering/modifying gain settings (indexes). */ 268 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; 269 270 /* Radio/DSP gain settings for each scan rate, for directed scans. */ 271 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; 272}; 273 274#define IWL_TX_FIFO_BK 0 275#define IWL_TX_FIFO_BE 1 276#define IWL_TX_FIFO_VI 2 277#define IWL_TX_FIFO_VO 3 278#define IWL_TX_FIFO_UNUSED -1 279 280/* Minimum number of queues. MAX_NUM is defined in hw specific files. 281 * Set the minimum to accommodate the 4 standard TX queues, 1 command 282 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */ 283#define IWL_MIN_NUM_QUEUES 10 284 285/* 286 * Queue #4 is the command queue for 3945/4965/5x00/1000/6x00, 287 * the driver maps it into the appropriate device FIFO for the 288 * uCode. 289 */ 290#define IWL_CMD_QUEUE_NUM 4 291 292/* Power management (not Tx power) structures */ 293 294enum iwl_pwr_src { 295 IWL_PWR_SRC_VMAIN, 296 IWL_PWR_SRC_VAUX, 297}; 298 299#define IEEE80211_DATA_LEN 2304 300#define IEEE80211_4ADDR_LEN 30 301#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) 302#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) 303 304struct iwl_frame { 305 union { 306 struct ieee80211_hdr frame; 307 struct iwl_tx_beacon_cmd beacon; 308 u8 raw[IEEE80211_FRAME_LEN]; 309 u8 cmd[360]; 310 } u; 311 struct list_head list; 312}; 313 314#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) 315#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) 316#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) 317 318enum { 319 CMD_SYNC = 0, 320 CMD_SIZE_NORMAL = 0, 321 CMD_NO_SKB = 0, 322 CMD_SIZE_HUGE = (1 << 0), 323 CMD_ASYNC = (1 << 1), 324 CMD_WANT_SKB = (1 << 2), 325}; 326 327#define DEF_CMD_PAYLOAD_SIZE 320 328 329/** 330 * struct iwl_device_cmd 331 * 332 * For allocation of the command and tx queues, this establishes the overall 333 * size of the largest command we send to uCode, except for a scan command 334 * (which is relatively huge; space is allocated separately). 335 */ 336struct iwl_device_cmd { 337 struct iwl_cmd_header hdr; /* uCode API */ 338 union { 339 u32 flags; 340 u8 val8; 341 u16 val16; 342 u32 val32; 343 struct iwl_tx_cmd tx; 344 struct iwl6000_channel_switch_cmd chswitch; 345 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 346 } __attribute__ ((packed)) cmd; 347} __attribute__ ((packed)); 348 349#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 350 351 352struct iwl_host_cmd { 353 const void *data; 354 unsigned long reply_page; 355 void (*callback)(struct iwl_priv *priv, 356 struct iwl_device_cmd *cmd, 357 struct iwl_rx_packet *pkt); 358 u32 flags; 359 u16 len; 360 u8 id; 361}; 362 363#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 364#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 365#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 366 367/** 368 * struct iwl_rx_queue - Rx queue 369 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd) 370 * @dma_addr: bus address of buffer of receive buffer descriptors (rbd) 371 * @read: Shared index to newest available Rx buffer 372 * @write: Shared index to oldest written Rx packet 373 * @free_count: Number of pre-allocated buffers in rx_free 374 * @rx_free: list of free SKBs for use 375 * @rx_used: List of Rx buffers with no SKB 376 * @need_update: flag to indicate we need to update read/write index 377 * @rb_stts: driver's pointer to receive buffer status 378 * @rb_stts_dma: bus address of receive buffer status 379 * 380 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers 381 */ 382struct iwl_rx_queue { 383 __le32 *bd; 384 dma_addr_t dma_addr; 385 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; 386 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE]; 387 u32 read; 388 u32 write; 389 u32 free_count; 390 u32 write_actual; 391 struct list_head rx_free; 392 struct list_head rx_used; 393 int need_update; 394 struct iwl_rb_status *rb_stts; 395 dma_addr_t rb_stts_dma; 396 spinlock_t lock; 397}; 398 399#define IWL_SUPPORTED_RATES_IE_LEN 8 400 401#define MAX_TID_COUNT 9 402 403#define IWL_INVALID_RATE 0xFF 404#define IWL_INVALID_VALUE -1 405 406/** 407 * struct iwl_ht_agg -- aggregation status while waiting for block-ack 408 * @txq_id: Tx queue used for Tx attempt 409 * @frame_count: # frames attempted by Tx command 410 * @wait_for_ba: Expect block-ack before next Tx reply 411 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window 412 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window 413 * @bitmap1: High order, one bit for each frame pending ACK in Tx window 414 * @rate_n_flags: Rate at which Tx was attempted 415 * 416 * If REPLY_TX indicates that aggregation was attempted, driver must wait 417 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info 418 * until block ack arrives. 419 */ 420struct iwl_ht_agg { 421 u16 txq_id; 422 u16 frame_count; 423 u16 wait_for_ba; 424 u16 start_idx; 425 u64 bitmap; 426 u32 rate_n_flags; 427#define IWL_AGG_OFF 0 428#define IWL_AGG_ON 1 429#define IWL_EMPTYING_HW_QUEUE_ADDBA 2 430#define IWL_EMPTYING_HW_QUEUE_DELBA 3 431 u8 state; 432}; 433 434 435struct iwl_tid_data { 436 u16 seq_number; /* agn only */ 437 u16 tfds_in_queue; 438 struct iwl_ht_agg agg; 439}; 440 441struct iwl_hw_key { 442 enum ieee80211_key_alg alg; 443 int keylen; 444 u8 keyidx; 445 u8 key[32]; 446}; 447 448union iwl_ht_rate_supp { 449 u16 rates; 450 struct { 451 u8 siso_rate; 452 u8 mimo_rate; 453 }; 454}; 455 456#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3) 457 458/* 459 * Maximal MPDU density for TX aggregation 460 * 4 - 2us density 461 * 5 - 4us density 462 * 6 - 8us density 463 * 7 - 16us density 464 */ 465#define CFG_HT_MPDU_DENSITY_4USEC (0x5) 466#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC 467 468struct iwl_ht_config { 469 /* self configuration data */ 470 bool is_ht; 471 bool is_40mhz; 472 bool single_chain_sufficient; 473 enum ieee80211_smps_mode smps; /* current smps mode */ 474 /* BSS related data */ 475 u8 extension_chan_offset; 476 u8 ht_protection; 477 u8 non_GF_STA_present; 478}; 479 480/* QoS structures */ 481struct iwl_qos_info { 482 int qos_active; 483 struct iwl_qosparam_cmd def_qos_parm; 484}; 485 486/* 487 * Structure should be accessed with sta_lock held. When station addition 488 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only 489 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock 490 * held. 491 */ 492struct iwl_station_entry { 493 struct iwl_addsta_cmd sta; 494 struct iwl_tid_data tid[MAX_TID_COUNT]; 495 u8 used; 496 struct iwl_hw_key keyinfo; 497 struct iwl_link_quality_cmd *lq; 498}; 499 500struct iwl_station_priv_common { 501 u8 sta_id; 502}; 503 504/* 505 * iwl_station_priv: Driver's private station information 506 * 507 * When mac80211 creates a station it reserves some space (hw->sta_data_size) 508 * in the structure for use by driver. This structure is places in that 509 * space. 510 * 511 * The common struct MUST be first because it is shared between 512 * 3945 and agn! 513 */ 514struct iwl_station_priv { 515 struct iwl_station_priv_common common; 516 struct iwl_lq_sta lq_sta; 517 atomic_t pending_frames; 518 bool client; 519 bool asleep; 520}; 521 522/** 523 * struct iwl_vif_priv - driver's private per-interface information 524 * 525 * When mac80211 allocates a virtual interface, it can allocate 526 * space for us to put data into. 527 */ 528struct iwl_vif_priv { 529 u8 ibss_bssid_sta_id; 530}; 531 532/* one for each uCode image (inst/data, boot/init/runtime) */ 533struct fw_desc { 534 void *v_addr; /* access by driver */ 535 dma_addr_t p_addr; /* access by card's busmaster DMA */ 536 u32 len; /* bytes */ 537}; 538 539/* v1/v2 uCode file layout */ 540struct iwl_ucode_header { 541 __le32 ver; /* major/minor/API/serial */ 542 union { 543 struct { 544 __le32 inst_size; /* bytes of runtime code */ 545 __le32 data_size; /* bytes of runtime data */ 546 __le32 init_size; /* bytes of init code */ 547 __le32 init_data_size; /* bytes of init data */ 548 __le32 boot_size; /* bytes of bootstrap code */ 549 u8 data[0]; /* in same order as sizes */ 550 } v1; 551 struct { 552 __le32 build; /* build number */ 553 __le32 inst_size; /* bytes of runtime code */ 554 __le32 data_size; /* bytes of runtime data */ 555 __le32 init_size; /* bytes of init code */ 556 __le32 init_data_size; /* bytes of init data */ 557 __le32 boot_size; /* bytes of bootstrap code */ 558 u8 data[0]; /* in same order as sizes */ 559 } v2; 560 } u; 561}; 562 563/* 564 * new TLV uCode file layout 565 * 566 * The new TLV file format contains TLVs, that each specify 567 * some piece of data. To facilitate "groups", for example 568 * different instruction image with different capabilities, 569 * bundled with the same init image, an alternative mechanism 570 * is provided: 571 * When the alternative field is 0, that means that the item 572 * is always valid. When it is non-zero, then it is only 573 * valid in conjunction with items of the same alternative, 574 * in which case the driver (user) selects one alternative 575 * to use. 576 */ 577 578enum iwl_ucode_tlv_type { 579 IWL_UCODE_TLV_INVALID = 0, /* unused */ 580 IWL_UCODE_TLV_INST = 1, 581 IWL_UCODE_TLV_DATA = 2, 582 IWL_UCODE_TLV_INIT = 3, 583 IWL_UCODE_TLV_INIT_DATA = 4, 584 IWL_UCODE_TLV_BOOT = 5, 585 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ 586}; 587 588struct iwl_ucode_tlv { 589 __le16 type; /* see above */ 590 __le16 alternative; /* see comment */ 591 __le32 length; /* not including type/length fields */ 592 u8 data[0]; 593} __attribute__ ((packed)); 594 595#define IWL_TLV_UCODE_MAGIC 0x0a4c5749 596 597struct iwl_tlv_ucode_header { 598 /* 599 * The TLV style ucode header is distinguished from 600 * the v1/v2 style header by first four bytes being 601 * zero, as such is an invalid combination of 602 * major/minor/API/serial versions. 603 */ 604 __le32 zero; 605 __le32 magic; 606 u8 human_readable[64]; 607 __le32 ver; /* major/minor/API/serial */ 608 __le32 build; 609 __le64 alternatives; /* bitmask of valid alternatives */ 610 /* 611 * The data contained herein has a TLV layout, 612 * see above for the TLV header and types. 613 * Note that each TLV is padded to a length 614 * that is a multiple of 4 for alignment. 615 */ 616 u8 data[0]; 617}; 618 619struct iwl4965_ibss_seq { 620 u8 mac[ETH_ALEN]; 621 u16 seq_num; 622 u16 frag_num; 623 unsigned long packet_time; 624 struct list_head list; 625}; 626 627struct iwl_sensitivity_ranges { 628 u16 min_nrg_cck; 629 u16 max_nrg_cck; 630 631 u16 nrg_th_cck; 632 u16 nrg_th_ofdm; 633 634 u16 auto_corr_min_ofdm; 635 u16 auto_corr_min_ofdm_mrc; 636 u16 auto_corr_min_ofdm_x1; 637 u16 auto_corr_min_ofdm_mrc_x1; 638 639 u16 auto_corr_max_ofdm; 640 u16 auto_corr_max_ofdm_mrc; 641 u16 auto_corr_max_ofdm_x1; 642 u16 auto_corr_max_ofdm_mrc_x1; 643 644 u16 auto_corr_max_cck; 645 u16 auto_corr_max_cck_mrc; 646 u16 auto_corr_min_cck; 647 u16 auto_corr_min_cck_mrc; 648 649 u16 barker_corr_th_min; 650 u16 barker_corr_th_min_mrc; 651 u16 nrg_th_cca; 652}; 653 654 655#define KELVIN_TO_CELSIUS(x) ((x)-273) 656#define CELSIUS_TO_KELVIN(x) ((x)+273) 657 658 659/** 660 * struct iwl_hw_params 661 * @max_txq_num: Max # Tx queues supported 662 * @dma_chnl_num: Number of Tx DMA/FIFO channels 663 * @scd_bc_tbls_size: size of scheduler byte count tables 664 * @tfd_size: TFD size 665 * @tx/rx_chains_num: Number of TX/RX chains 666 * @valid_tx/rx_ant: usable antennas 667 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) 668 * @max_rxq_log: Log-base-2 of max_rxq_size 669 * @rx_page_order: Rx buffer page order 670 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR 671 * @max_stations: 672 * @bcast_sta_id: 673 * @ht40_channel: is 40MHz width possible in band 2.4 674 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ) 675 * @sw_crypto: 0 for hw, 1 for sw 676 * @max_xxx_size: for ucode uses 677 * @ct_kill_threshold: temperature threshold 678 * @calib_init_cfg: setup initial calibrations for the hw 679 * @struct iwl_sensitivity_ranges: range of sensitivity values 680 */ 681struct iwl_hw_params { 682 u8 max_txq_num; 683 u8 dma_chnl_num; 684 u16 scd_bc_tbls_size; 685 u32 tfd_size; 686 u8 tx_chains_num; 687 u8 rx_chains_num; 688 u8 valid_tx_ant; 689 u8 valid_rx_ant; 690 u16 max_rxq_size; 691 u16 max_rxq_log; 692 u32 rx_page_order; 693 u32 rx_wrt_ptr_reg; 694 u8 max_stations; 695 u8 bcast_sta_id; 696 u8 ht40_channel; 697 u8 max_beacon_itrvl; /* in 1024 ms */ 698 u32 max_inst_size; 699 u32 max_data_size; 700 u32 max_bsm_size; 701 u32 ct_kill_threshold; /* value in hw-dependent units */ 702 u32 ct_kill_exit_threshold; /* value in hw-dependent units */ 703 /* for 1000, 6000 series and up */ 704 u32 calib_init_cfg; 705 const struct iwl_sensitivity_ranges *sens; 706}; 707 708 709/****************************************************************************** 710 * 711 * Functions implemented in core module which are forward declared here 712 * for use by iwl-[4-5].c 713 * 714 * NOTE: The implementation of these functions are not hardware specific 715 * which is why they are in the core module files. 716 * 717 * Naming convention -- 718 * iwl_ <-- Is part of iwlwifi 719 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) 720 * iwl4965_bg_ <-- Called from work queue context 721 * iwl4965_mac_ <-- mac80211 callback 722 * 723 ****************************************************************************/ 724extern void iwl_update_chain_flags(struct iwl_priv *priv); 725extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src); 726extern const u8 iwl_bcast_addr[ETH_ALEN]; 727extern int iwl_rxq_stop(struct iwl_priv *priv); 728extern void iwl_txq_ctx_stop(struct iwl_priv *priv); 729extern int iwl_queue_space(const struct iwl_queue *q); 730static inline int iwl_queue_used(const struct iwl_queue *q, int i) 731{ 732 return q->write_ptr >= q->read_ptr ? 733 (i >= q->read_ptr && i < q->write_ptr) : 734 !(i < q->read_ptr && i >= q->write_ptr); 735} 736 737 738static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge) 739{ 740 /* 741 * This is for init calibration result and scan command which 742 * required buffer > TFD_MAX_PAYLOAD_SIZE, 743 * the big buffer at end of command array 744 */ 745 if (is_huge) 746 return q->n_window; /* must be power of 2 */ 747 748 /* Otherwise, use normal size buffers */ 749 return index & (q->n_window - 1); 750} 751 752 753struct iwl_dma_ptr { 754 dma_addr_t dma; 755 void *addr; 756 size_t size; 757}; 758 759#define IWL_OPERATION_MODE_AUTO 0 760#define IWL_OPERATION_MODE_HT_ONLY 1 761#define IWL_OPERATION_MODE_MIXED 2 762#define IWL_OPERATION_MODE_20MHZ 3 763 764#define IWL_TX_CRC_SIZE 4 765#define IWL_TX_DELIMITER_SIZE 4 766 767#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000 768 769/* Sensitivity and chain noise calibration */ 770#define INITIALIZATION_VALUE 0xFFFF 771#define IWL4965_CAL_NUM_BEACONS 20 772#define IWL_CAL_NUM_BEACONS 16 773#define MAXIMUM_ALLOWED_PATHLOSS 15 774 775#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3 776 777#define MAX_FA_OFDM 50 778#define MIN_FA_OFDM 5 779#define MAX_FA_CCK 50 780#define MIN_FA_CCK 5 781 782#define AUTO_CORR_STEP_OFDM 1 783 784#define AUTO_CORR_STEP_CCK 3 785#define AUTO_CORR_MAX_TH_CCK 160 786 787#define NRG_DIFF 2 788#define NRG_STEP_CCK 2 789#define NRG_MARGIN 8 790#define MAX_NUMBER_CCK_NO_FA 100 791 792#define AUTO_CORR_CCK_MIN_VAL_DEF (125) 793 794#define CHAIN_A 0 795#define CHAIN_B 1 796#define CHAIN_C 2 797#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4 798#define ALL_BAND_FILTER 0xFF00 799#define IN_BAND_FILTER 0xFF 800#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF 801 802#define NRG_NUM_PREV_STAT_L 20 803#define NUM_RX_CHAINS 3 804 805enum iwl4965_false_alarm_state { 806 IWL_FA_TOO_MANY = 0, 807 IWL_FA_TOO_FEW = 1, 808 IWL_FA_GOOD_RANGE = 2, 809}; 810 811enum iwl4965_chain_noise_state { 812 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ 813 IWL_CHAIN_NOISE_ACCUMULATE, 814 IWL_CHAIN_NOISE_CALIBRATED, 815 IWL_CHAIN_NOISE_DONE, 816}; 817 818enum iwl4965_calib_enabled_state { 819 IWL_CALIB_DISABLED = 0, /* must be 0 */ 820 IWL_CALIB_ENABLED = 1, 821}; 822 823 824/* 825 * enum iwl_calib 826 * defines the order in which results of initial calibrations 827 * should be sent to the runtime uCode 828 */ 829enum iwl_calib { 830 IWL_CALIB_XTAL, 831 IWL_CALIB_DC, 832 IWL_CALIB_LO, 833 IWL_CALIB_TX_IQ, 834 IWL_CALIB_TX_IQ_PERD, 835 IWL_CALIB_BASE_BAND, 836 IWL_CALIB_MAX 837}; 838 839/* Opaque calibration results */ 840struct iwl_calib_result { 841 void *buf; 842 size_t buf_len; 843}; 844 845enum ucode_type { 846 UCODE_NONE = 0, 847 UCODE_INIT, 848 UCODE_RT 849}; 850 851/* Sensitivity calib data */ 852struct iwl_sensitivity_data { 853 u32 auto_corr_ofdm; 854 u32 auto_corr_ofdm_mrc; 855 u32 auto_corr_ofdm_x1; 856 u32 auto_corr_ofdm_mrc_x1; 857 u32 auto_corr_cck; 858 u32 auto_corr_cck_mrc; 859 860 u32 last_bad_plcp_cnt_ofdm; 861 u32 last_fa_cnt_ofdm; 862 u32 last_bad_plcp_cnt_cck; 863 u32 last_fa_cnt_cck; 864 865 u32 nrg_curr_state; 866 u32 nrg_prev_state; 867 u32 nrg_value[10]; 868 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; 869 u32 nrg_silence_ref; 870 u32 nrg_energy_idx; 871 u32 nrg_silence_idx; 872 u32 nrg_th_cck; 873 s32 nrg_auto_corr_silence_diff; 874 u32 num_in_cck_no_fa; 875 u32 nrg_th_ofdm; 876 877 u16 barker_corr_th_min; 878 u16 barker_corr_th_min_mrc; 879 u16 nrg_th_cca; 880}; 881 882/* Chain noise (differential Rx gain) calib data */ 883struct iwl_chain_noise_data { 884 u32 active_chains; 885 u32 chain_noise_a; 886 u32 chain_noise_b; 887 u32 chain_noise_c; 888 u32 chain_signal_a; 889 u32 chain_signal_b; 890 u32 chain_signal_c; 891 u16 beacon_count; 892 u8 disconn_array[NUM_RX_CHAINS]; 893 u8 delta_gain_code[NUM_RX_CHAINS]; 894 u8 radio_write; 895 u8 state; 896}; 897 898#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ 899#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 900 901#define IWL_TRAFFIC_ENTRIES (256) 902#define IWL_TRAFFIC_ENTRY_SIZE (64) 903 904enum { 905 MEASUREMENT_READY = (1 << 0), 906 MEASUREMENT_ACTIVE = (1 << 1), 907}; 908 909enum iwl_nvm_type { 910 NVM_DEVICE_TYPE_EEPROM = 0, 911 NVM_DEVICE_TYPE_OTP, 912}; 913 914/* 915 * Two types of OTP memory access modes 916 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode, 917 * based on physical memory addressing 918 * IWL_OTP_ACCESS_RELATIVE - relative address mode, 919 * based on logical memory addressing 920 */ 921enum iwl_access_mode { 922 IWL_OTP_ACCESS_ABSOLUTE, 923 IWL_OTP_ACCESS_RELATIVE, 924}; 925 926/** 927 * enum iwl_pa_type - Power Amplifier type 928 * @IWL_PA_SYSTEM: based on uCode configuration 929 * @IWL_PA_INTERNAL: use Internal only 930 */ 931enum iwl_pa_type { 932 IWL_PA_SYSTEM = 0, 933 IWL_PA_INTERNAL = 1, 934}; 935 936/* interrupt statistics */ 937struct isr_statistics { 938 u32 hw; 939 u32 sw; 940 u32 sw_err; 941 u32 sch; 942 u32 alive; 943 u32 rfkill; 944 u32 ctkill; 945 u32 wakeup; 946 u32 rx; 947 u32 rx_handlers[REPLY_MAX]; 948 u32 tx; 949 u32 unhandled; 950}; 951 952#ifdef CONFIG_IWLWIFI_DEBUGFS 953/* management statistics */ 954enum iwl_mgmt_stats { 955 MANAGEMENT_ASSOC_REQ = 0, 956 MANAGEMENT_ASSOC_RESP, 957 MANAGEMENT_REASSOC_REQ, 958 MANAGEMENT_REASSOC_RESP, 959 MANAGEMENT_PROBE_REQ, 960 MANAGEMENT_PROBE_RESP, 961 MANAGEMENT_BEACON, 962 MANAGEMENT_ATIM, 963 MANAGEMENT_DISASSOC, 964 MANAGEMENT_AUTH, 965 MANAGEMENT_DEAUTH, 966 MANAGEMENT_ACTION, 967 MANAGEMENT_MAX, 968}; 969/* control statistics */ 970enum iwl_ctrl_stats { 971 CONTROL_BACK_REQ = 0, 972 CONTROL_BACK, 973 CONTROL_PSPOLL, 974 CONTROL_RTS, 975 CONTROL_CTS, 976 CONTROL_ACK, 977 CONTROL_CFEND, 978 CONTROL_CFENDACK, 979 CONTROL_MAX, 980}; 981 982struct traffic_stats { 983 u32 mgmt[MANAGEMENT_MAX]; 984 u32 ctrl[CONTROL_MAX]; 985 u32 data_cnt; 986 u64 data_bytes; 987}; 988#else 989struct traffic_stats { 990 u64 data_bytes; 991}; 992#endif 993 994/* 995 * iwl_switch_rxon: "channel switch" structure 996 * 997 * @ switch_in_progress: channel switch in progress 998 * @ channel: new channel 999 */ 1000struct iwl_switch_rxon { 1001 bool switch_in_progress; 1002 __le16 channel; 1003}; 1004 1005/* 1006 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds 1007 * to perform continuous uCode event logging operation if enabled 1008 */ 1009#define UCODE_TRACE_PERIOD (100) 1010 1011/* 1012 * iwl_event_log: current uCode event log position 1013 * 1014 * @ucode_trace: enable/disable ucode continuous trace timer 1015 * @num_wraps: how many times the event buffer wraps 1016 * @next_entry: the entry just before the next one that uCode would fill 1017 * @non_wraps_count: counter for no wrap detected when dump ucode events 1018 * @wraps_once_count: counter for wrap once detected when dump ucode events 1019 * @wraps_more_count: counter for wrap more than once detected 1020 * when dump ucode events 1021 */ 1022struct iwl_event_log { 1023 bool ucode_trace; 1024 u32 num_wraps; 1025 u32 next_entry; 1026 int non_wraps_count; 1027 int wraps_once_count; 1028 int wraps_more_count; 1029}; 1030 1031/* 1032 * host interrupt timeout value 1033 * used with setting interrupt coalescing timer 1034 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit 1035 * 1036 * default interrupt coalescing timer is 64 x 32 = 2048 usecs 1037 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs 1038 */ 1039#define IWL_HOST_INT_TIMEOUT_MAX (0xFF) 1040#define IWL_HOST_INT_TIMEOUT_DEF (0x40) 1041#define IWL_HOST_INT_TIMEOUT_MIN (0x0) 1042#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF) 1043#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10) 1044#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0) 1045 1046/* 1047 * This is the threshold value of plcp error rate per 100mSecs. It is 1048 * used to set and check for the validity of plcp_delta. 1049 */ 1050#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (0) 1051#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50) 1052#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100) 1053#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200) 1054#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255) 1055 1056#define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3) 1057#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5) 1058 1059/* timer constants use to monitor and recover stuck tx queues in mSecs */ 1060#define IWL_MONITORING_PERIOD (1000) 1061#define IWL_ONE_HUNDRED_MSECS (100) 1062#define IWL_SIXTY_SECS (60000) 1063 1064enum iwl_reset { 1065 IWL_RF_RESET = 0, 1066 IWL_FW_RESET, 1067 IWL_MAX_FORCE_RESET, 1068}; 1069 1070struct iwl_force_reset { 1071 int reset_request_count; 1072 int reset_success_count; 1073 int reset_reject_count; 1074 unsigned long reset_duration; 1075 unsigned long last_force_reset_jiffies; 1076}; 1077 1078struct iwl_priv { 1079 1080 /* ieee device used by generic ieee processing code */ 1081 struct ieee80211_hw *hw; 1082 struct ieee80211_channel *ieee_channels; 1083 struct ieee80211_rate *ieee_rates; 1084 struct iwl_cfg *cfg; 1085 1086 /* temporary frame storage list */ 1087 struct list_head free_frames; 1088 int frames_count; 1089 1090 enum ieee80211_band band; 1091 int alloc_rxb_page; 1092 1093 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, 1094 struct iwl_rx_mem_buffer *rxb); 1095 1096 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; 1097 1098 /* spectrum measurement report caching */ 1099 struct iwl_spectrum_notification measure_report; 1100 u8 measurement_status; 1101 1102 /* ucode beacon time */ 1103 u32 ucode_beacon_time; 1104 int missed_beacon_threshold; 1105 1106 /* storing the jiffies when the plcp error rate is received */ 1107 unsigned long plcp_jiffies; 1108 1109 /* force reset */ 1110 struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET]; 1111 1112 /* we allocate array of iwl4965_channel_info for NIC's valid channels. 1113 * Access via channel # using indirect index array */ 1114 struct iwl_channel_info *channel_info; /* channel info array */ 1115 u8 channel_count; /* # of channels */ 1116 1117 /* thermal calibration */ 1118 s32 temperature; /* degrees Kelvin */ 1119 s32 last_temperature; 1120 1121 /* init calibration results */ 1122 struct iwl_calib_result calib_results[IWL_CALIB_MAX]; 1123 1124 /* Scan related variables */ 1125 unsigned long scan_start; 1126 unsigned long scan_start_tsf; 1127 void *scan_cmd; 1128 enum ieee80211_band scan_band; 1129 struct cfg80211_scan_request *scan_request; 1130 bool is_internal_short_scan; 1131 u8 scan_tx_ant[IEEE80211_NUM_BANDS]; 1132 u8 mgmt_tx_ant; 1133 1134 /* spinlock */ 1135 spinlock_t lock; /* protect general shared data */ 1136 spinlock_t hcmd_lock; /* protect hcmd */ 1137 spinlock_t reg_lock; /* protect hw register access */ 1138 struct mutex mutex; 1139 struct mutex sync_cmd_mutex; /* enable serialization of sync commands */ 1140 1141 /* basic pci-network driver stuff */ 1142 struct pci_dev *pci_dev; 1143 1144 /* pci hardware address support */ 1145 void __iomem *hw_base; 1146 u32 hw_rev; 1147 u32 hw_wa_rev; 1148 u8 rev_id; 1149 1150 /* uCode images, save to reload in case of failure */ 1151 int fw_index; /* firmware we're trying to load */ 1152 u32 ucode_ver; /* version of ucode, copy of 1153 iwl_ucode.ver */ 1154 struct fw_desc ucode_code; /* runtime inst */ 1155 struct fw_desc ucode_data; /* runtime data original */ 1156 struct fw_desc ucode_data_backup; /* runtime data save/restore */ 1157 struct fw_desc ucode_init; /* initialization inst */ 1158 struct fw_desc ucode_init_data; /* initialization data */ 1159 struct fw_desc ucode_boot; /* bootstrap inst */ 1160 enum ucode_type ucode_type; 1161 u8 ucode_write_complete; /* the image write is complete */ 1162 char firmware_name[25]; 1163 1164 1165 struct iwl_rxon_time_cmd rxon_timing; 1166 1167 /* We declare this const so it can only be 1168 * changed via explicit cast within the 1169 * routines that actually update the physical 1170 * hardware */ 1171 const struct iwl_rxon_cmd active_rxon; 1172 struct iwl_rxon_cmd staging_rxon; 1173 1174 struct iwl_switch_rxon switch_rxon; 1175 1176 /* 1st responses from initialize and runtime uCode images. 1177 * 4965's initialize alive response contains some calibration data. */ 1178 struct iwl_init_alive_resp card_alive_init; 1179 struct iwl_alive_resp card_alive; 1180 1181 unsigned long last_blink_time; 1182 u8 last_blink_rate; 1183 u8 allow_blinking; 1184 u64 led_tpt; 1185 1186 u16 active_rate; 1187 1188 u8 start_calib; 1189 struct iwl_sensitivity_data sensitivity_data; 1190 struct iwl_chain_noise_data chain_noise_data; 1191 __le16 sensitivity_tbl[HD_TABLE_SIZE]; 1192 1193 struct iwl_ht_config current_ht_config; 1194 1195 /* Rate scaling data */ 1196 u8 retry_rate; 1197 1198 wait_queue_head_t wait_command_queue; 1199 1200 int activity_timer_active; 1201 1202 /* Rx and Tx DMA processing queues */ 1203 struct iwl_rx_queue rxq; 1204 struct iwl_tx_queue *txq; 1205 unsigned long txq_ctx_active_msk; 1206 struct iwl_dma_ptr kw; /* keep warm address */ 1207 struct iwl_dma_ptr scd_bc_tbls; 1208 1209 u32 scd_base_addr; /* scheduler sram base address */ 1210 1211 unsigned long status; 1212 1213 /* counts mgmt, ctl, and data packets */ 1214 struct traffic_stats tx_stats; 1215 struct traffic_stats rx_stats; 1216 1217 /* counts interrupts */ 1218 struct isr_statistics isr_stats; 1219 1220 struct iwl_power_mgr power_data; 1221 struct iwl_tt_mgmt thermal_throttle; 1222 1223 /* context information */ 1224 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ 1225 u8 mac_addr[ETH_ALEN]; 1226 1227 /*station table variables */ 1228 spinlock_t sta_lock; 1229 int num_stations; 1230 struct iwl_station_entry stations[IWL_STATION_COUNT]; 1231 struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; /* protected by mutex */ 1232 u8 key_mapping_key; 1233 unsigned long ucode_key_table; 1234 1235 /* queue refcounts */ 1236#define IWL_MAX_HW_QUEUES 32 1237 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; 1238 /* for each AC */ 1239 atomic_t queue_stop_count[4]; 1240 1241 /* Indication if ieee80211_ops->open has been called */ 1242 u8 is_open; 1243 1244 u8 mac80211_registered; 1245 1246 /* eeprom -- this is in the card's little endian byte order */ 1247 u8 *eeprom; 1248 int nvm_device_type; 1249 struct iwl_eeprom_calib_info *calib_info; 1250 1251 enum nl80211_iftype iw_mode; 1252 1253 struct sk_buff *ibss_beacon; 1254 1255 /* Last Rx'd beacon timestamp */ 1256 u64 timestamp; 1257 struct ieee80211_vif *vif; 1258 1259 union { 1260#if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE) 1261 struct { 1262 void *shared_virt; 1263 dma_addr_t shared_phys; 1264 1265 struct delayed_work thermal_periodic; 1266 struct delayed_work rfkill_poll; 1267 1268 struct iwl3945_notif_statistics statistics; 1269#ifdef CONFIG_IWLWIFI_DEBUG 1270 struct iwl3945_notif_statistics accum_statistics; 1271 struct iwl3945_notif_statistics delta_statistics; 1272 struct iwl3945_notif_statistics max_delta; 1273#endif 1274 1275 u32 sta_supp_rates; 1276 int last_rx_rssi; /* From Rx packet statistics */ 1277 1278 /* Rx'd packet timing information */ 1279 u32 last_beacon_time; 1280 u64 last_tsf; 1281 1282 /* 1283 * each calibration channel group in the 1284 * EEPROM has a derived clip setting for 1285 * each rate. 1286 */ 1287 const struct iwl3945_clip_group clip_groups[5]; 1288 1289 } _3945; 1290#endif 1291#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE) 1292 struct { 1293 /* INT ICT Table */ 1294 __le32 *ict_tbl; 1295 void *ict_tbl_vir; 1296 dma_addr_t ict_tbl_dma; 1297 dma_addr_t aligned_ict_tbl_dma; 1298 int ict_index; 1299 u32 inta; 1300 bool use_ict; 1301 /* 1302 * reporting the number of tids has AGG on. 0 means 1303 * no AGGREGATION 1304 */ 1305 u8 agg_tids_count; 1306 1307 struct iwl_rx_phy_res last_phy_res; 1308 bool last_phy_res_valid; 1309 1310 struct completion firmware_loading_complete; 1311 1312 struct iwl_notif_statistics statistics; 1313#ifdef CONFIG_IWLWIFI_DEBUG 1314 struct iwl_notif_statistics accum_statistics; 1315 struct iwl_notif_statistics delta_statistics; 1316 struct iwl_notif_statistics max_delta; 1317#endif 1318 } _agn; 1319#endif 1320 }; 1321 1322 struct iwl_hw_params hw_params; 1323 1324 u32 inta_mask; 1325 1326 struct iwl_qos_info qos_data; 1327 1328 struct workqueue_struct *workqueue; 1329 1330 struct work_struct restart; 1331 struct work_struct scan_completed; 1332 struct work_struct rx_replenish; 1333 struct work_struct abort_scan; 1334 struct work_struct beacon_update; 1335 struct work_struct tt_work; 1336 struct work_struct ct_enter; 1337 struct work_struct ct_exit; 1338 struct work_struct start_internal_scan; 1339 1340 struct tasklet_struct irq_tasklet; 1341 1342 struct delayed_work init_alive_start; 1343 struct delayed_work alive_start; 1344 struct delayed_work scan_check; 1345 1346 /* TX Power */ 1347 s8 tx_power_user_lmt; 1348 s8 tx_power_device_lmt; 1349 s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */ 1350 1351 1352#ifdef CONFIG_IWLWIFI_DEBUG 1353 /* debugging info */ 1354 u32 debug_level; /* per device debugging will override global 1355 iwl_debug_level if set */ 1356 u32 framecnt_to_us; 1357 atomic_t restrict_refcnt; 1358 bool disable_ht40; 1359#ifdef CONFIG_IWLWIFI_DEBUGFS 1360 /* debugfs */ 1361 u16 tx_traffic_idx; 1362 u16 rx_traffic_idx; 1363 u8 *tx_traffic; 1364 u8 *rx_traffic; 1365 struct dentry *debugfs_dir; 1366 u32 dbgfs_sram_offset, dbgfs_sram_len; 1367#endif /* CONFIG_IWLWIFI_DEBUGFS */ 1368#endif /* CONFIG_IWLWIFI_DEBUG */ 1369 1370 struct work_struct txpower_work; 1371 u32 disable_sens_cal; 1372 u32 disable_chain_noise_cal; 1373 u32 disable_tx_power_cal; 1374 struct work_struct run_time_calib_work; 1375 struct timer_list statistics_periodic; 1376 struct timer_list ucode_trace; 1377 struct timer_list monitor_recover; 1378 bool hw_ready; 1379 1380 struct iwl_event_log event_log; 1381}; /*iwl_priv */ 1382 1383static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) 1384{ 1385 set_bit(txq_id, &priv->txq_ctx_active_msk); 1386} 1387 1388static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) 1389{ 1390 clear_bit(txq_id, &priv->txq_ctx_active_msk); 1391} 1392 1393#ifdef CONFIG_IWLWIFI_DEBUG 1394const char *iwl_get_tx_fail_reason(u32 status); 1395/* 1396 * iwl_get_debug_level: Return active debug level for device 1397 * 1398 * Using sysfs it is possible to set per device debug level. This debug 1399 * level will be used if set, otherwise the global debug level which can be 1400 * set via module parameter is used. 1401 */ 1402static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1403{ 1404 if (priv->debug_level) 1405 return priv->debug_level; 1406 else 1407 return iwl_debug_level; 1408} 1409#else 1410static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; } 1411 1412static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1413{ 1414 return iwl_debug_level; 1415} 1416#endif 1417 1418 1419static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv, 1420 int txq_id, int idx) 1421{ 1422 if (priv->txq[txq_id].txb[idx].skb[0]) 1423 return (struct ieee80211_hdr *)priv->txq[txq_id]. 1424 txb[idx].skb[0]->data; 1425 return NULL; 1426} 1427 1428 1429static inline int iwl_is_associated(struct iwl_priv *priv) 1430{ 1431 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1432} 1433 1434static inline int is_channel_valid(const struct iwl_channel_info *ch_info) 1435{ 1436 if (ch_info == NULL) 1437 return 0; 1438 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; 1439} 1440 1441static inline int is_channel_radar(const struct iwl_channel_info *ch_info) 1442{ 1443 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; 1444} 1445 1446static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info) 1447{ 1448 return ch_info->band == IEEE80211_BAND_5GHZ; 1449} 1450 1451static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info) 1452{ 1453 return ch_info->band == IEEE80211_BAND_2GHZ; 1454} 1455 1456static inline int is_channel_passive(const struct iwl_channel_info *ch) 1457{ 1458 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; 1459} 1460 1461static inline int is_channel_ibss(const struct iwl_channel_info *ch) 1462{ 1463 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; 1464} 1465 1466static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page) 1467{ 1468 __free_pages(page, priv->hw_params.rx_page_order); 1469 priv->alloc_rxb_page--; 1470} 1471 1472static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page) 1473{ 1474 free_pages(page, priv->hw_params.rx_page_order); 1475 priv->alloc_rxb_page--; 1476} 1477#endif /* __iwl_dev_h__ */ 1478