166bb42fd47c3d7e23b3ca5bb2b025a198100d670Daniel Drake/* ZD1211 USB-WLAN driver for Linux
266bb42fd47c3d7e23b3ca5bb2b025a198100d670Daniel Drake *
366bb42fd47c3d7e23b3ca5bb2b025a198100d670Daniel Drake * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
466bb42fd47c3d7e23b3ca5bb2b025a198100d670Daniel Drake * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
5e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake *
6e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * This program is free software; you can redistribute it and/or modify
7e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * it under the terms of the GNU General Public License as published by
8e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * the Free Software Foundation; either version 2 of the License, or
9e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * (at your option) any later version.
10e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake *
11e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * This program is distributed in the hope that it will be useful,
12e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * but WITHOUT ANY WARRANTY; without even the implied warranty of
13e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * GNU General Public License for more details.
15e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake *
16e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * You should have received a copy of the GNU General Public License
17e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * along with this program; if not, write to the Free Software
18e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake */
20e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
21e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#ifndef _ZD_RF_H
22e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define _ZD_RF_H
23e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
24e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define UW2451_RF			0x2
25e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define UCHIP_RF			0x3
26e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define AL2230_RF			0x4
27e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define AL7230B_RF			0x5	/* a,b,g */
28e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define THETA_RF			0x6
29e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define AL2210_RF			0x7
30e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define MAXIM_NEW_RF			0x8
31e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define UW2453_RF			0x9
324418583cbf6fcdb715fcdc3719393cfb64b73e97Daniel Drake#define AL2230S_RF			0xa
33e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define RALINK_RF			0xb
34e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define INTERSIL_RF			0xc
35e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define RF2959_RF			0xd
36e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define MAXIM_NEW2_RF			0xe
37e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define PHILIPS_RF			0xf
38e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
39e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#define RF_CHANNEL(ch) [(ch)-1]
40e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
41e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake/* Provides functions of the RF transceiver. */
42e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
43e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeenum {
44e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	RF_REG_BITS = 6,
45e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	RF_VALUE_BITS = 18,
46e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	RF_RV_BITS = RF_REG_BITS + RF_VALUE_BITS,
47e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake};
48e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
49e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakestruct zd_rf {
50e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	u8 type;
51e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
52e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	u8 channel;
53e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
549c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake	/* whether channel integration and calibration should be updated
559c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake	 * defaults to 1 (yes) */
569c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake	u8 update_channel_int:1;
579c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake
58fbd5d17b8e2b418b495599c554f9c4754b7f93c9Jussi Kivilinna	/* whether ZD_CR47 should be patched from the EEPROM, if the appropriate
59aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake	 * flag is set in the POD. The vendor driver suggests that this should
60aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake	 * be done for all RF's, but a bug in their code prevents but their
61aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake	 * HW_OverWritePhyRegFromE2P() routine from ever taking effect. */
62aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake	u8 patch_cck_gain:1;
63aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake
649c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake	/* private RF driver data */
659c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake	void *priv;
669c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake
67e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	/* RF-specific functions */
68e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	int (*init_hw)(struct zd_rf *rf);
69e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	int (*set_channel)(struct zd_rf *rf, u8 channel);
70e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	int (*switch_radio_on)(struct zd_rf *rf);
71e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake	int (*switch_radio_off)(struct zd_rf *rf);
7272018b223dcacb631f140d4c8fada3790bd1b03cDaniel Drake	int (*patch_6m_band_edge)(struct zd_rf *rf, u8 channel);
739c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake	void (*clear)(struct zd_rf *rf);
74e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake};
75e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
76e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeconst char *zd_rf_name(u8 type);
77e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakevoid zd_rf_init(struct zd_rf *rf);
78e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakevoid zd_rf_clear(struct zd_rf *rf);
79e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeint zd_rf_init_hw(struct zd_rf *rf, u8 type);
80e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
81e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeint zd_rf_scnprint_id(struct zd_rf *rf, char *buffer, size_t size);
82e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
83e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeint zd_rf_set_channel(struct zd_rf *rf, u8 channel);
84e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
85e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeint zd_switch_radio_on(struct zd_rf *rf);
86e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeint zd_switch_radio_off(struct zd_rf *rf);
87e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
8872018b223dcacb631f140d4c8fada3790bd1b03cDaniel Drakeint zd_rf_patch_6m_band_edge(struct zd_rf *rf, u8 channel);
8972018b223dcacb631f140d4c8fada3790bd1b03cDaniel Drakeint zd_rf_generic_patch_6m(struct zd_rf *rf, u8 channel);
9072018b223dcacb631f140d4c8fada3790bd1b03cDaniel Drake
919c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drakestatic inline int zd_rf_should_update_pwr_int(struct zd_rf *rf)
929c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake{
939c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake	return rf->update_channel_int;
949c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake}
959c8fc71ddd1b42c0c632036333790f230cea815dDaniel Drake
96aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drakestatic inline int zd_rf_should_patch_cck_gain(struct zd_rf *rf)
97aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake{
98aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake	return rf->patch_cck_gain;
99aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake}
100aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake
101aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drakeint zd_rf_patch_6m_band_edge(struct zd_rf *rf, u8 channel);
102aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drakeint zd_rf_generic_patch_6m(struct zd_rf *rf, u8 channel);
103aaf83d4fc4a596929306c894d341e17fbdfba758Daniel Drake
104e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake/* Functions for individual RF chips */
105e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
106e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeint zd_rf_init_rf2959(struct zd_rf *rf);
107e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drakeint zd_rf_init_al2230(struct zd_rf *rf);
108ec62bd91bbb58254dfddca3d290f5fe4aa1cb769Daniel Drakeint zd_rf_init_al7230b(struct zd_rf *rf);
1094481d6093e62e168ab06e9bbb4e67a9bebb8c7f7Daniel Drakeint zd_rf_init_uw2453(struct zd_rf *rf);
110e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake
111e85d0918b54fbd9b38003752f7d665416b06edd8Daniel Drake#endif /* _ZD_RF_H */
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