11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Generic driver for the MPSC (UART mode) on Marvell parts (e.g., GT64240, 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * GT64260, MV64340, MV64360, GT96100, ... ). 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Author: Mark A. Greer <mgreer@mvista.com> 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Based on an old MPSC driver that was in the linuxppc tree. It appears to 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * have been created by Chris Zankel (formerly of MontaVista) but there 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * is no proper Copyright so I'm not sure. Apparently, parts were also 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * taken from PPCBoot (now U-Boot). Also based on drivers/serial/8250.c 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * by Russell King. 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2004 (c) MontaVista, Software, Inc. This file is licensed under 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the terms of the GNU General Public License version 2. This program 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * is licensed "as is" without any warranty of any kind, whether express 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * or implied. 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The MPSC interface is much like a typical network controller's interface. 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * That is, you set up separate rings of descriptors for transmitting and 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * receiving data. There is also a pool of buffers with (one buffer per 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * descriptor) that incoming data are dma'd into or outgoing data are dma'd 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * out of. 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The MPSC requires two other controllers to be able to work. The Baud Rate 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Generator (BRG) provides a clock at programmable frequencies which determines 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the baud rate. The Serial DMA Controller (SDMA) takes incoming data from the 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MPSC and DMA's it into memory or DMA's outgoing data and passes it to the 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MPSC. It is actually the SDMA interrupt that the driver uses to keep the 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * transmit and receive "engines" going (i.e., indicate data has been 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * transmitted or received). 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * NOTES: 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1) Some chips have an erratum where several regs cannot be 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * read. To work around that, we keep a local copy of those regs in 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 'mpsc_port_info'. 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2) Some chips have an erratum where the ctlr will hang when the SDMA ctlr 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * accesses system mem with coherency enabled. For that reason, the driver 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * assumes that coherency for that ctlr has been disabled. This means 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * that when in a cache coherent system, the driver has to manually manage 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the data cache on the areas that it touches because the dma_* macro are 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * basically no-ops. 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3) There is an erratum (on PPC) where you can't use the instruction to do 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * a DMA_TO_DEVICE/cache clean so DMA_BIDIRECTIONAL/flushes are used in places 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * where a DMA_TO_DEVICE/clean would have [otherwise] sufficed. 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4) AFAICT, hardware flow control isn't supported by the controller --MAG. 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 53e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 54e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#if defined(CONFIG_SERIAL_MPSC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 55e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SUPPORT_SYSRQ 56e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#endif 57e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 58e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/module.h> 59e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/moduleparam.h> 60e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/tty.h> 61e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/tty_flip.h> 62e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/ioport.h> 63e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/init.h> 64e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/console.h> 65e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/sysrq.h> 66e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/serial.h> 67e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/serial_core.h> 68e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/delay.h> 69e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/device.h> 70e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/dma-mapping.h> 71e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/mv643xx.h> 72d052d1beff706920e82c5d55006b08e256b5df09Russell King#include <linux/platform_device.h> 735a0e3ad6af8660be21ca98a971cd00f331318c05Tejun Heo#include <linux/gfp.h> 74d052d1beff706920e82c5d55006b08e256b5df09Russell King 75e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <asm/io.h> 76e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <asm/irq.h> 77e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 78e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_NUM_CTLRS 2 79e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 80e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* 81e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Descriptors and buffers must be cache line aligned. 82e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Buffers lengths must be multiple of cache line size. 83e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Number of Tx & Rx descriptors must be powers of 2. 84e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer */ 85e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXR_ENTRIES 32 86e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXRE_SIZE dma_get_cache_alignment() 87e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXR_SIZE (MPSC_RXR_ENTRIES * MPSC_RXRE_SIZE) 88e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXBE_SIZE dma_get_cache_alignment() 89e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXB_SIZE (MPSC_RXR_ENTRIES * MPSC_RXBE_SIZE) 90e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 91e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXR_ENTRIES 32 92e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXRE_SIZE dma_get_cache_alignment() 93e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXR_SIZE (MPSC_TXR_ENTRIES * MPSC_TXRE_SIZE) 94e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXBE_SIZE dma_get_cache_alignment() 95e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXB_SIZE (MPSC_TXR_ENTRIES * MPSC_TXBE_SIZE) 96e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_DMA_ALLOC_SIZE (MPSC_RXR_SIZE + MPSC_RXB_SIZE + MPSC_TXR_SIZE \ 982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + MPSC_TXB_SIZE + dma_get_cache_alignment() /* for alignment */) 99e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 100e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Rx and Tx Ring entry descriptors -- assume entry size is <= cacheline size */ 101e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_rx_desc { 102e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bufsize; 103e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bytecnt; 104e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 cmdstat; 105e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 link; 106e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 buf_ptr; 107e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer} __attribute((packed)); 108e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 109e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_tx_desc { 110e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bytecnt; 111e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 shadow; 112e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 cmdstat; 113e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 link; 114e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 buf_ptr; 115e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer} __attribute((packed)); 116e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 117e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* 118e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Some regs that have the erratum that you can't read them are are shared 119e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * between the two MPSC controllers. This struct contains those shared regs. 120e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer */ 121e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_shared_regs { 122e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t mpsc_routing_base_p; 123e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t sdma_intr_base_p; 124e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 125e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *mpsc_routing_base; 126e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *sdma_intr_base; 127e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 128e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_MRR_m; 129e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_RCRR_m; 130e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_TCRR_m; 131e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 SDMA_INTR_CAUSE_m; 132e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 SDMA_INTR_MASK_m; 133e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer}; 134e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 135e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* The main driver data structure */ 136e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info { 137e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer struct uart_port port; /* Overlay uart_port structure */ 138e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 139e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Internal driver state for this ctlr */ 140e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 ready; 141e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 rcv_data; 142e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer tcflag_t c_iflag; /* save termios->c_iflag */ 143e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer tcflag_t c_cflag; /* save termios->c_cflag */ 144e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 145e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Info passed in from platform */ 146e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 mirror_regs; /* Need to mirror regs? */ 147e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 cache_mgmt; /* Need manual cache mgmt? */ 148e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 brg_can_tune; /* BRG has baud tuning? */ 149e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 brg_clk_src; 150e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 mpsc_max_idle; 151e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_baud; 152e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_bits; 153e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_parity; 154e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_flow; 155e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 156e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Physical addresses of various blocks of registers (from platform) */ 157e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t mpsc_base_p; 158e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t sdma_base_p; 159e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t brg_base_p; 160e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 161e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Virtual addresses of various blocks of registers (from platform) */ 162e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *mpsc_base; 163e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *sdma_base; 164e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *brg_base; 165e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 166e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Descriptor ring and buffer allocations */ 167e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void *dma_region; 168e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t dma_region_p; 169e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 170e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t rxr; /* Rx descriptor ring */ 171e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t rxr_p; /* Phys addr of rxr */ 172e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *rxb; /* Rx Ring I/O buf */ 173e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *rxb_p; /* Phys addr of rxb */ 174e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 rxr_posn; /* First desc w/ Rx data */ 175e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 176e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t txr; /* Tx descriptor ring */ 177e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t txr_p; /* Phys addr of txr */ 178e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *txb; /* Tx Ring I/O buf */ 179e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *txb_p; /* Phys addr of txb */ 180e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int txr_head; /* Where new data goes */ 181e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int txr_tail; /* Where sent data comes off */ 1821733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spinlock_t tx_lock; /* transmit lock */ 183e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 184e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Mirrored values of regs we can't read (if 'mirror_regs' set) */ 185e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_MPCR_m; 186e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_1_m; 187e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_2_m; 188e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_10_m; 189e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 BRG_BCR_m; 190e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer struct mpsc_shared_regs *shared_regs; 191e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer}; 192e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 193e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Hooks to platform-specific code */ 194e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerint mpsc_platform_register_driver(void); 195e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greervoid mpsc_platform_unregister_driver(void); 196e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 197e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Hooks back in to mpsc common to be called by platform-specific code */ 198e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info *mpsc_device_probe(int index); 199e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info *mpsc_device_remove(int index); 200e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 201e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Main MPSC Configuration Register Offsets */ 202e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MMCRL 0x0000 203e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MMCRH 0x0004 204e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR 0x0008 205e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_1 0x000c 206e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2 0x0010 207e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_3 0x0014 208e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_4 0x0018 209e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_5 0x001c 210e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_6 0x0020 211e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_7 0x0024 212e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_8 0x0028 213e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_9 0x002c 214e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_10 0x0030 215e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_11 0x0034 216e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 217e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_FRZ (1 << 9) 218e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_5 0 219e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_6 1 220e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_7 2 221e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_8 3 222e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_SBL_1 0 223e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_SBL_2 1 224e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 225e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TEV (1<<1) 226e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TA (1<<7) 227e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TTCS (1<<9) 228e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_REV (1<<17) 229e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_RA (1<<23) 230e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_CRD (1<<25) 231e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_EH (1<<31) 232e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_ODD 0 233e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_SPACE 1 234e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_EVEN 2 235e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_MARK 3 236e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 237e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* MPSC Signal Routing */ 238e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MRR 0x0000 239e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RCRR 0x0004 240e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TCRR 0x0008 241e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 242e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Serial DMA Controller Interface Registers */ 243e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC 0x0000 244e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM 0x0008 245e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_RX_DESC 0x0800 246e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_RX_BUF_PTR 0x0808 247e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SCRDP 0x0810 248e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_TX_DESC 0x0c00 249e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SCTDP 0x0c10 250e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SFTDP 0x0c14 251e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 252e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_PE (1<<0) 253e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_CDL (1<<1) 254e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_FR (1<<3) 255e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_OR (1<<6) 256e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_BR (1<<9) 257e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_MI (1<<10) 258e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_A (1<<11) 259e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_AM (1<<12) 260e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_CT (1<<13) 261e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_C (1<<14) 262e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_ES (1<<15) 263e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_L (1<<16) 264e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_F (1<<17) 265e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_P (1<<18) 266e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_EI (1<<23) 267e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_O (1<<31) 268e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 2692e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O \ 2702e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_EI) 271e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 272e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_RFT (1<<0) 273e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_SFM (1<<1) 274e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_BLMR (1<<6) 275e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_BLMT (1<<7) 276e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_POVR (1<<8) 277e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_RIFB (1<<9) 278e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 279e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_ERD (1<<7) 280e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_AR (1<<15) 281e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_STD (1<<16) 282e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_TXD (1<<23) 283e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_AT (1<<31) 284e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 285e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_RXBUF (1<<0) 286e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_RXERR (1<<1) 287e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_TXBUF (1<<2) 288e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_TXEND (1<<3) 289e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_RXBUF (1<<8) 290e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_RXERR (1<<9) 291e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_TXBUF (1<<10) 292e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_TXEND (1<<11) 293e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 2942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR \ 2952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR) 2962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND \ 2972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND) 298e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 299e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* SDMA Interrupt registers */ 300e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_INTR_CAUSE 0x0000 301e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_INTR_MASK 0x0080 302e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 303e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Baud Rate Generator Interface Registers */ 304e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define BRG_BCR 0x0000 305e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define BRG_BTR 0x0004 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Define how this driver is known to the outside (we've been assigned a 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * range on the "Low-density serial ports" major). 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3112e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_MAJOR 204 3122e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_MINOR_START 44 3132e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_DRIVER_NAME "MPSC" 3142e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_DEV_NAME "ttyMM" 3152e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_VERSION "1.00" 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct mpsc_port_info mpsc_ports[MPSC_NUM_CTLRS]; 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct mpsc_shared_regs mpsc_shared_regs; 3194d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic struct uart_driver mpsc_reg; 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3214d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_start_rx(struct mpsc_port_info *pi); 3224d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_free_ring_mem(struct mpsc_port_info *pi); 3234d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_release_port(struct uart_port *port); 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Baud Rate Generator Routines (BRG) 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_brg_init(struct mpsc_port_info *pi, u32 clk_src) 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(0xf << 18)) | ((clk_src & 0xf) << 18); 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->brg_can_tune) 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~(1 << 25); 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(readl(pi->brg_base + BRG_BTR) & 0xffff0000, 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base + BRG_BTR); 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3492e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_brg_enable(struct mpsc_port_info *pi) 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= (1 << 16); 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3612e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_brg_disable(struct mpsc_port_info *pi) 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~(1 << 16); 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3732e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer/* 3742e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * To set the baud, we adjust the CDV field in the BRG_BCR reg. 3752e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * From manual: Baud = clk / ((CDV+1)*2) ==> CDV = (clk / (baud*2)) - 1. 3762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * However, the input clock is divided by 16 in the MPSC b/c of how 3772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * 'MPSC_MMCRH' was set up so we have to divide the 'clk' used in our 3782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * calculation by 16 to account for that. So the real calculation 3792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * that accounts for the way the mpsc is set up is: 3802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * CDV = (clk / (baud*2*16)) - 1 ==> CDV = (clk / (baud << 5)) - 1. 3812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer */ 3822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_baudrate(struct mpsc_port_info *pi, u32 baud) 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 cdv = (pi->port.uartclk / (baud << 5)) - 1; 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_disable(pi); 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & 0xffff0000) | (cdv & 0xffff); 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_enable(pi); 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Serial DMA Routines (SDMA) 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4052e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_burstsize(struct mpsc_port_info *pi, u32 burst_size) 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_burstsize[%d]: burst_size: %d\n", 4102e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.line, burst_size); 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds burst_size >>= 3; /* Divide by 8 b/c reg values are 8-byte chunks */ 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (burst_size < 2) 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x0; /* 1 64-bit word */ 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (burst_size < 4) 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x1; /* 2 64-bit words */ 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (burst_size < 8) 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x2; /* 4 64-bit words */ 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x3; /* 8 64-bit words */ 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((readl(pi->sdma_base + SDMA_SDC) & (0x3 << 12)) | (v << 12), 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base + SDMA_SDC); 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4272e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_init(struct mpsc_port_info *pi, u32 burst_size) 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_init[%d]: burst_size: %d\n", pi->port.line, 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds burst_size); 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((readl(pi->sdma_base + SDMA_SDC) & 0x3ff) | 0x03f, 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base + SDMA_SDC); 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_burstsize(pi, burst_size); 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4372e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic u32 mpsc_sdma_intr_mask(struct mpsc_port_info *pi, u32 mask) 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 old, v; 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_mask[%d]: mask: 0x%x\n", pi->port.line, mask); 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds old = v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m : 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask &= 0xf; 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask <<= 8; 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~mask; 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_MASK_m = v; 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds old >>= 8; 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return old & 0xf; 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4602e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_intr_unmask(struct mpsc_port_info *pi, u32 mask) 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 4631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_unmask[%d]: mask: 0x%x\n", pi->port.line,mask); 4651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4662e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m 4672e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer : readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask &= 0xf; 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask <<= 8; 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= mask; 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_MASK_m = v; 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_intr_ack(struct mpsc_port_info *pi) 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_ack[%d]: Acknowledging IRQ\n", pi->port.line); 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_CAUSE_m = 0; 4852e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer writeb(0x00, pi->shared_regs->sdma_intr_base + SDMA_INTR_CAUSE 4862e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + pi->port.line); 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4892e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_set_rx_ring(struct mpsc_port_info *pi, 4902e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct mpsc_rx_desc *rxre_p) 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_set_rx_ring[%d]: rxre_p: 0x%x\n", 4932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.line, (u32)rxre_p); 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)rxre_p, pi->sdma_base + SDMA_SCRDP); 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_set_tx_ring(struct mpsc_port_info *pi, 4992e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct mpsc_tx_desc *txre_p) 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)txre_p, pi->sdma_base + SDMA_SFTDP); 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)txre_p, pi->sdma_base + SDMA_SCTDP); 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5052e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_cmd(struct mpsc_port_info *pi, u32 val) 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->sdma_base + SDMA_SDCM); 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (val) 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= val; 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0; 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->sdma_base + SDMA_SDCM); 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5192e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic uint mpsc_sdma_tx_active(struct mpsc_port_info *pi) 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_TXD; 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5242e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_start_tx(struct mpsc_port_info *pi) 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre, *txre_p; 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If tx isn't running & there's a desc ready to go, start it */ 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_sdma_tx_active(pi)) { 5302e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 5312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_tail * MPSC_TXRE_SIZE)); 5322e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, 5332e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 5372e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O) { 5412e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre_p = (struct mpsc_tx_desc *) 5422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (pi->txr_p + (pi->txr_tail * MPSC_TXRE_SIZE)); 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_set_tx_ring(pi, txre_p); 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_STD | SDMA_SDCM_TXD); 5461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_stop(struct mpsc_port_info *pi) 5511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_stop[%d]: Stopping SDMA\n", pi->port.line); 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Abort any SDMA transfers */ 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, 0); 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_AR | SDMA_SDCM_AT); 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Clear the SDMA current and first TX and RX pointers */ 5592c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_sdma_set_tx_ring(pi, NULL); 5602c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_sdma_set_rx_ring(pi, NULL); 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Disable interrupts */ 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_mask(pi, 0xf); 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Multi-Protocol Serial Controller Routines (MPSC) 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5752e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_hw_init(struct mpsc_port_info *pi) 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_hw_init[%d]: Initializing hardware\n", pi->port.line); 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Set up clock routing */ 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 5831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_MRR_m; 5841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~0x1c7; 5851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_MRR_m = v; 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR); 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_RCRR_m; 5891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_RCRR_m = v; 5911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 5921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_TCRR_m; 5941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 5951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_TCRR_m = v; 5961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 5972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 5981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_MRR); 5991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~0x1c7; 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR); 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 6091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Put MPSC in UART mode & enabel Tx/Rx egines */ 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0x000004c4, pi->mpsc_base + MPSC_MMCRL); 6131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6142e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer /* No preamble, 16x divider, low-latency, */ 6151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0x04400400, pi->mpsc_base + MPSC_MMCRH); 6167bbdc3d51cf793dd81c38f794f4cb73df58d1527Mark A. Greer mpsc_set_baudrate(pi, pi->default_baud); 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = 0; 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = 0; 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_1); 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_2); 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(pi->mpsc_max_idle, pi->mpsc_base + MPSC_CHR_3); 6251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_4); 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_5); 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_6); 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_7); 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_8); 6301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_9); 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_10); 6321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6342e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_enter_hunt(struct mpsc_port_info *pi) 6351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_enter_hunt[%d]: Hunting...\n", pi->port.line); 6371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 6391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(pi->MPSC_CHR_2_m | MPSC_CHR_2_EH, 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base + MPSC_CHR_2); 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Erratum prevents reading CHR_2 so just delay for a while */ 6421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 6432e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 6441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_EH, 6452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->mpsc_base + MPSC_CHR_2); 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_EH) 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 6491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6522e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_freeze(struct mpsc_port_info *pi) 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_freeze[%d]: Freezing\n", pi->port.line); 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= MPSC_MPCR_FRZ; 6611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 6631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 6651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6672e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_unfreeze(struct mpsc_port_info *pi) 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 6721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~MPSC_MPCR_FRZ; 6741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_unfreeze[%d]: Unfrozen\n", pi->port.line); 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_char_length(struct mpsc_port_info *pi, u32 len) 6831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_char_length[%d]: char len: %d\n", pi->port.line,len); 6871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 6891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 6901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(0x3 << 12)) | ((len & 0x3) << 12); 6911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 6931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 6941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 6951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_stop_bit_length(struct mpsc_port_info *pi, u32 len) 6981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 7001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_stop_bit_length[%d]: stop bits: %d\n", 7021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line, len); 7031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 7051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 7061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(1 << 14)) | ((len & 0x1) << 14); 7081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 7111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 7121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7142e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_parity(struct mpsc_port_info *pi, u32 p) 7151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 7171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_parity[%d]: parity bits: 0x%x\n", pi->port.line, p); 7191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_CHR_2_m : 7211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_CHR_2); 7221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p &= 0x3; 7241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xc000c) | (p << 18) | (p << 2); 7251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = v; 7281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_CHR_2); 7291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 7331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Driver Init Routines 7351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 7371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_init_hw(struct mpsc_port_info *pi) 7401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_init_hw[%d]: Initializing\n", pi->port.line); 7421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_init(pi, pi->brg_clk_src); 7441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_enable(pi); 7451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_init(pi, dma_get_cache_alignment()); /* burst a cacheline */ 7461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_stop(pi); 7471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_hw_init(pi); 7481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_alloc_ring_mem(struct mpsc_port_info *pi) 7511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 7531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_alloc_ring_mem[%d]: Allocating ring mem\n", 7551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line); 7561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->dma_region) { 7581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!dma_supported(pi->port.dev, 0xffffffff)) { 7591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Inadequate DMA support\n"); 7601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -ENXIO; 7612e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if ((pi->dma_region = dma_alloc_noncoherent(pi->port.dev, 7622e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_DMA_ALLOC_SIZE, 7632e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer &pi->dma_region_p, GFP_KERNEL)) 7642e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer == NULL) { 7651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Can't alloc Desc region\n"); 7661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -ENOMEM; 7671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 7681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 7691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 7711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7732e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_free_ring_mem(struct mpsc_port_info *pi) 7741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_free_ring_mem[%d]: Freeing ring mem\n", pi->port.line); 7761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->dma_region) { 7781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_free_noncoherent(pi->port.dev, MPSC_DMA_ALLOC_SIZE, 7792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->dma_region, pi->dma_region_p); 7801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->dma_region = NULL; 7812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->dma_region_p = (dma_addr_t)NULL; 7821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 7831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7852e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_init_rings(struct mpsc_port_info *pi) 7861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_rx_desc *rxre; 7881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 7891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t dp, dp_p; 7901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp, *bp_p; 7911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 7921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_init_rings[%d]: Initializing rings\n", pi->port.line); 7941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG_ON(pi->dma_region == NULL); 7961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(pi->dma_region, 0, MPSC_DMA_ALLOC_SIZE); 7981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 8001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Descriptors & buffers are multiples of cacheline size and must be 8011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * cacheline aligned. 8021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8032e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dp = ALIGN((u32)pi->dma_region, dma_get_cache_alignment()); 8042e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dp_p = ALIGN((u32)pi->dma_region_p, dma_get_cache_alignment()); 8051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 8071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Partition dma region into rx ring descriptor, rx buffers, 8081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * tx ring descriptors, and tx buffers. 8091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr = dp; 8111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_p = dp_p; 8121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXR_SIZE; 8131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXR_SIZE; 8141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8152e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->rxb = (u8 *)dp; 8162e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->rxb_p = (u8 *)dp_p; 8171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXB_SIZE; 8181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXB_SIZE; 8191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = 0; 8211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr = dp; 8231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_p = dp_p; 8241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_TXR_SIZE; 8251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_TXR_SIZE; 8261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8272e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->txb = (u8 *)dp; 8282e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->txb_p = (u8 *)dp_p; 8291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = 0; 8311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = 0; 8321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Init rx ring descriptors */ 8341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp = pi->rxr; 8351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p = pi->rxr_p; 8361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->rxb; 8371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p = pi->rxb_p; 8381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_RXR_ENTRIES; i++) { 8401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre = (struct mpsc_rx_desc *)dp; 8411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bufsize = cpu_to_be16(MPSC_RXBE_SIZE); 8431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bytecnt = cpu_to_be16(0); 8442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O 8452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_EI | SDMA_DESC_CMDSTAT_F 8462e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_L); 8471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->link = cpu_to_be32(dp_p + MPSC_RXRE_SIZE); 8481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->buf_ptr = cpu_to_be32(bp_p); 8491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXRE_SIZE; 8511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXRE_SIZE; 8521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp += MPSC_RXBE_SIZE; 8531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p += MPSC_RXBE_SIZE; 8541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->link = cpu_to_be32(pi->rxr_p); /* Wrap last back to first */ 8561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Init tx ring descriptors */ 8581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp = pi->txr; 8591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p = pi->txr_p; 8601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb; 8611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p = pi->txb_p; 8621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_TXR_ENTRIES; i++) { 8641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre = (struct mpsc_tx_desc *)dp; 8651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->link = cpu_to_be32(dp_p + MPSC_TXRE_SIZE); 8671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->buf_ptr = cpu_to_be32(bp_p); 8681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_TXRE_SIZE; 8701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_TXRE_SIZE; 8711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp += MPSC_TXBE_SIZE; 8721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p += MPSC_TXBE_SIZE; 8731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->link = cpu_to_be32(pi->txr_p); /* Wrap last back to first */ 8751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)pi->dma_region, 8772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_DMA_ALLOC_SIZE, DMA_BIDIRECTIONAL); 8781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 8791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 8801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)pi->dma_region, 8812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)pi->dma_region 8822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + MPSC_DMA_ALLOC_SIZE); 8831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 8841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 8861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 8871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_uninit_rings(struct mpsc_port_info *pi) 8891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 8901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_uninit_rings[%d]: Uninitializing rings\n",pi->port.line); 8911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG_ON(pi->dma_region == NULL); 8931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr = 0; 8951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_p = 0; 8961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb = NULL; 8971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb_p = NULL; 8981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = 0; 8991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr = 0; 9011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_p = 0; 9021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb = NULL; 9031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb_p = NULL; 9041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = 0; 9051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = 0; 9061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 9071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9082e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_make_ready(struct mpsc_port_info *pi) 9091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 9101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 9111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_make_ready[%d]: Making cltr ready\n", pi->port.line); 9131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->ready) { 9151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_init_hw(pi); 9161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((rc = mpsc_alloc_ring_mem(pi))) 9171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 9181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_init_rings(pi); 9191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->ready = 1; 9201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 9211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 9231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 9241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9253b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#ifdef CONFIG_CONSOLE_POLL 9263b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wesselstatic int serial_polled; 9273b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 9283b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 9291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 9311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt Handling Routines 9331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 9351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9372e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_rx_intr(struct mpsc_port_info *pi) 9381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 9391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_rx_desc *rxre; 940ebd2c8f6d2ec4012c267ecb95e72a57b8355a705Alan Cox struct tty_struct *tty = pi->port.state->port.tty; 9411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 cmdstat, bytes_in, i; 9421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 9431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp; 9441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char flag = TTY_NORMAL; 9451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_rx_intr[%d]: Handling Rx intr\n", pi->port.line); 9471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre = (struct mpsc_rx_desc *)(pi->rxr + (pi->rxr_posn*MPSC_RXRE_SIZE)); 9491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, 9512e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 9521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 9531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 9541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)rxre, 9552e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)rxre + MPSC_RXRE_SIZE); 9561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 9571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 9591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Loop through Rx descriptors handling ones that have been completed. 9601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9612e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer while (!((cmdstat = be32_to_cpu(rxre->cmdstat)) 9622e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer & SDMA_DESC_CMDSTAT_O)) { 9631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bytes_in = be16_to_cpu(rxre->bytecnt); 9643b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#ifdef CONFIG_CONSOLE_POLL 9653b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (unlikely(serial_polled)) { 9663b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel serial_polled = 0; 9673b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel return 0; 9683b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 9693b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 9701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Following use of tty struct directly is deprecated */ 9712e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if (unlikely(tty_buffer_request_room(tty, bytes_in) 9722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer < bytes_in)) { 9731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (tty->low_latency) 9741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_flip_buffer_push(tty); 9751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 97633f0f88f1c51ae5c2d593d26960c760ea154c2e2Alan Cox * If this failed then we will throw away the bytes 97733f0f88f1c51ae5c2d593d26960c760ea154c2e2Alan Cox * but must do so to clear interrupts. 9781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 9801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE); 9822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)bp, MPSC_RXBE_SIZE, 9832e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 9841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 9851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 9861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)bp, 9872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)bp + MPSC_RXBE_SIZE); 9881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 9891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 9911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Other than for parity error, the manual provides little 9921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * info on what data will be in a frame flagged by any of 9931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * these errors. For parity error, it is the last byte in 9941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the buffer that had the error. As for the rest, I guess 9951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * we'll assume there is no data in the buffer. 9961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * If there is...it gets lost. 9971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if (unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR 9992e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR 10002e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_OR))) { 10011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.rx++; 10031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (cmdstat & SDMA_DESC_CMDSTAT_BR) { /* Break */ 10051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.brk++; 10061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (uart_handle_break(&pi->port)) 10081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds goto next_frame; 10092e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if (cmdstat & SDMA_DESC_CMDSTAT_FR) { 10101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.frame++; 10112e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if (cmdstat & SDMA_DESC_CMDSTAT_OR) { 10121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.overrun++; 10132e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 10141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds cmdstat &= pi->port.read_status_mask; 10161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (cmdstat & SDMA_DESC_CMDSTAT_BR) 10181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_BREAK; 10191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_FR) 10201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_FRAME; 10211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_OR) 10221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_OVERRUN; 10231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_PE) 10241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_PARITY; 10251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10277d12e780e003f93433d49ce78cfedf4b4c52adc5David Howells if (uart_handle_sysrq_char(&pi->port, *bp)) { 10281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp++; 10291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bytes_in--; 10303b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#ifdef CONFIG_CONSOLE_POLL 10313b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (unlikely(serial_polled)) { 10323b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel serial_polled = 0; 10333b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel return 0; 10343b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 10353b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 10361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds goto next_frame; 10371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if ((unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR 10402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR 10412e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_OR))) 10422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && !(cmdstat & pi->port.ignore_status_mask)) { 10431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_insert_flip_char(tty, *bp, flag); 10442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 10451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i=0; i<bytes_in; i++) 10461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_insert_flip_char(tty, *bp++, TTY_NORMAL); 10471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.rx += bytes_in; 10491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsnext_frame: 10521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bytecnt = cpu_to_be16(0); 10531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 10542e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O 10552e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_EI | SDMA_DESC_CMDSTAT_F 10562e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_L); 10571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 10582e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, 10592e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 10601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 10611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 10621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)rxre, 10632e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)rxre + MPSC_RXRE_SIZE); 10641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 10651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Advance to next descriptor */ 10671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = (pi->rxr_posn + 1) & (MPSC_RXR_ENTRIES - 1); 10682e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer rxre = (struct mpsc_rx_desc *) 10692e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (pi->rxr + (pi->rxr_posn * MPSC_RXRE_SIZE)); 10702e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, 10712e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 10721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 10731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 10741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)rxre, 10752e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)rxre + MPSC_RXRE_SIZE); 10761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 10771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 1; 10781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Restart rx engine, if its stopped */ 10811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_ERD) == 0) 10821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_start_rx(pi); 10831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_flip_buffer_push(tty); 10851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 10861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 10871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr) 10891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 10901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 10911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10922e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 10932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_head * MPSC_TXRE_SIZE)); 10941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->bytecnt = cpu_to_be16(count); 10961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->shadow = txre->bytecnt; 10971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); /* ensure cmdstat is last field updated */ 10982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | SDMA_DESC_CMDSTAT_F 10992e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_L 11002e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | ((intr) ? SDMA_DESC_CMDSTAT_EI : 0)); 11011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 11022e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, 11032e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 11041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)txre, 11072e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 11081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11112e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_copy_tx_data(struct mpsc_port_info *pi) 11121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 1113ebd2c8f6d2ec4012c267ecb95e72a57b8355a705Alan Cox struct circ_buf *xmit = &pi->port.state->xmit; 11141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp; 11151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 i; 11161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Make sure the desc ring isn't full */ 11182e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer while (CIRC_CNT(pi->txr_head, pi->txr_tail, MPSC_TXR_ENTRIES) 11192e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer < (MPSC_TXR_ENTRIES - 1)) { 11201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.x_char) { 11211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 11221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Ideally, we should use the TCS field in 11231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_1 to put the x_char out immediately but 11241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * errata prevents us from being able to read 11251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_2 to know that its safe to write to 11261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_1. Instead, just put it in-band with 11271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * all the other Tx data. 11281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 11301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *bp = pi->port.x_char; 11311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.x_char = 0; 11321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds i = 1; 11332e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if (!uart_circ_empty(xmit) 11342e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && !uart_tx_stopped(&pi->port)) { 11352e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer i = min((u32)MPSC_TXBE_SIZE, 11362e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (u32)uart_circ_chars_pending(xmit)); 11372e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer i = min(i, (u32)CIRC_CNT_TO_END(xmit->head, xmit->tail, 11381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds UART_XMIT_SIZE)); 11391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 11401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memcpy(bp, &xmit->buf[xmit->tail], i); 11411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds xmit->tail = (xmit->tail + i) & (UART_XMIT_SIZE - 1); 11421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 11441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_write_wakeup(&pi->port); 11452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { /* All tx data copied into ring bufs */ 11461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 11472e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 11481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11492e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)bp, MPSC_TXBE_SIZE, 11502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 11511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)bp, 11542e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)bp + MPSC_TXBE_SIZE); 11551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_setup_tx_desc(pi, i, 1); 11571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Advance to next descriptor */ 11591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 11601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 11611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11632e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_tx_intr(struct mpsc_port_info *pi) 11641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 11651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 11661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 11671733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang unsigned long iflags; 11681733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 11691733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_irqsave(&pi->tx_lock, iflags); 11701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_sdma_tx_active(pi)) { 11722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 11732e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_tail * MPSC_TXRE_SIZE)); 11741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11752e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, 11762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 11771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 11802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 11811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (!(be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O)) { 11841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 1; 11851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.tx += be16_to_cpu(txre->bytecnt); 11861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = (pi->txr_tail+1) & (MPSC_TXR_ENTRIES-1); 11871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If no more data to tx, fall out of loop */ 11891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->txr_head == pi->txr_tail) 11901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 11911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11922e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 11932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_tail * MPSC_TXRE_SIZE)); 11942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, 11952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 11961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 11992e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 12001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 12011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 12021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_copy_tx_data(pi); 12041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); /* start next desc if ready */ 12051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 12061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12071733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_unlock_irqrestore(&pi->tx_lock, iflags); 12081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This is the driver's interrupt handler. To avoid a race, we first clear 12131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the interrupt, then handle any completed Rx/Tx descriptors. When done 12141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * handling those descriptors, we restart the Rx/Tx engines if they're stopped. 12151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12162e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic irqreturn_t mpsc_sdma_intr(int irq, void *dev_id) 12171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = dev_id; 12191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong iflags; 12201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = IRQ_NONE; 12211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr[%d]: SDMA Interrupt Received\n",pi->port.line); 12231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, iflags); 12251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 12267d12e780e003f93433d49ce78cfedf4b4c52adc5David Howells if (mpsc_rx_intr(pi)) 12271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = IRQ_HANDLED; 12281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mpsc_tx_intr(pi)) 12291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = IRQ_HANDLED; 12301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, iflags); 12311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr[%d]: SDMA Interrupt Handled\n", pi->port.line); 12331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 12381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * serial_core.c Interface routines 12401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 12421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12432e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic uint mpsc_tx_empty(struct uart_port *port) 12441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong iflags; 12471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint rc; 12481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, iflags); 12501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = mpsc_sdma_tx_active(pi) ? 0 : TIOCSER_TEMT; 12511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, iflags); 12521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12562e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_mctrl(struct uart_port *port, uint mctrl) 12571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Have no way to set modem control lines AFAICT */ 12591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12612e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic uint mpsc_get_mctrl(struct uart_port *port) 12621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 mflags, status; 12651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12662e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer status = (pi->mirror_regs) ? pi->MPSC_CHR_10_m 12672e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer : readl(pi->mpsc_base + MPSC_CHR_10); 12681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags = 0; 12701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (status & 0x1) 12711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags |= TIOCM_CTS; 12721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (status & 0x2) 12731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags |= TIOCM_CAR; 12741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return mflags | TIOCM_DSR; /* No way to tell if DSR asserted */ 12761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_stop_tx(struct uart_port *port) 12791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1282b129a8ccd53f74c43e4c83c8e0031a4990040830Russell King pr_debug("mpsc_stop_tx[%d]\n", port->line); 12831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_freeze(pi); 12851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_start_tx(struct uart_port *port) 12881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12901733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang unsigned long iflags; 12911733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 12921733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_irqsave(&pi->tx_lock, iflags); 12931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_unfreeze(pi); 12951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_copy_tx_data(pi); 12961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); 12971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12981733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_unlock_irqrestore(&pi->tx_lock, iflags); 12991733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 1300b129a8ccd53f74c43e4c83c8e0031a4990040830Russell King pr_debug("mpsc_start_tx[%d]\n", port->line); 13011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13032e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_start_rx(struct mpsc_port_info *pi) 13041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_start_rx[%d]: Starting...\n", pi->port.line); 13061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->rcv_data) { 13081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_enter_hunt(pi); 13091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_ERD); 13101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 13111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13132e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_stop_rx(struct uart_port *port) 13141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_stop_rx[%d]: Stopping...\n", port->line); 13181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13196c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez if (pi->mirror_regs) { 13206c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez writel(pi->MPSC_CHR_2_m | MPSC_CHR_2_RA, 13216c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez pi->mpsc_base + MPSC_CHR_2); 13226c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez /* Erratum prevents reading CHR_2 so just delay for a while */ 13236c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez udelay(100); 13242e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 13256c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_RA, 13262e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->mpsc_base + MPSC_CHR_2); 13276c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez 13286c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_RA) 13296c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez udelay(10); 13306c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez } 13316c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez 13321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_AR); 13331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13352e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_enable_ms(struct uart_port *port) 13361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_break_ctl(struct uart_port *port, int ctl) 13401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong flags; 13431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 13441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = ctl ? 0x00ff0000 : 0; 13461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, flags); 13481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 13491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = v; 13501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_CHR_1); 13511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, flags); 13521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13542e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_startup(struct uart_port *port) 13551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 flag = 0; 13581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 13591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_startup[%d]: Starting up MPSC, irq: %d\n", 13611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds port->line, pi->port.irq); 13621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((rc = mpsc_make_ready(pi)) == 0) { 13641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Setup IRQ handler */ 13651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 13661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If irq's are shared, need to set flag */ 13681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mpsc_ports[0].port.irq == mpsc_ports[1].port.irq) 136940663cc7f1c1ccf515d8af9470925a0cb2f59b5dThomas Gleixner flag = IRQF_SHARED; 13701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (request_irq(pi->port.irq, mpsc_sdma_intr, flag, 13722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "mpsc-sdma", pi)) 13731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Can't get SDMA IRQ %d\n", 13742e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.irq); 13751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_unmask(pi, 0xf); 13772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer mpsc_sdma_set_rx_ring(pi, (struct mpsc_rx_desc *)(pi->rxr_p 13782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->rxr_posn * MPSC_RXRE_SIZE))); 13791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 13801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 13821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13842e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_shutdown(struct uart_port *port) 13851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_shutdown[%d]: Shutting down MPSC\n", port->line); 13891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_stop(pi); 13911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds free_irq(pi->port.irq, pi); 13921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_termios(struct uart_port *port, struct ktermios *termios, 1395606d099cdd1080bbb50ea50dc52d98252f8f10a1Alan Cox struct ktermios *old) 13961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 baud; 13991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong flags; 14001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 chr_bits, stop_bits, par; 14011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->c_iflag = termios->c_iflag; 14031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->c_cflag = termios->c_cflag; 14041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (termios->c_cflag & CSIZE) { 14061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS5: 14071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_5; 14081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS6: 14101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_6; 14111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS7: 14131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_7; 14141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS8: 14161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds default: 14171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_8; 14181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & CSTOPB) 14221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds stop_bits = MPSC_MPCR_SBL_2; 14231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 14241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds stop_bits = MPSC_MPCR_SBL_1; 14251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_EVEN; 14271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARENB) 14281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARODD) 14291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_ODD; 14301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CMSPAR 14311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & CMSPAR) { 14321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARODD) 14331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_MARK; 14341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 14351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_SPACE; 14361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 14381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk); 14401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, flags); 14421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_update_timeout(port, termios->c_cflag, baud); 14441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_char_length(pi, chr_bits); 14461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_stop_bit_length(pi, stop_bits); 14471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_parity(pi, par); 14481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_baudrate(pi, baud); 14491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Characters/events to read */ 14511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.read_status_mask = SDMA_DESC_CMDSTAT_OR; 14521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & INPCK) 14542e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_PE 14552e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR; 14561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & (BRKINT | PARMRK)) 14581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_BR; 14591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Characters/events to ignore */ 14611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask = 0; 14621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNPAR) 14642e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_PE 14652e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR; 14661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNBRK) { 14681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_BR; 14691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNPAR) 14711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_OR; 14721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14745797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas if ((termios->c_cflag & CREAD)) { 14755797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas if (!pi->rcv_data) { 14765797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas pi->rcv_data = 1; 14775797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas mpsc_start_rx(pi); 14785797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas } 14795797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas } else if (pi->rcv_data) { 14805797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas mpsc_stop_rx(port); 14811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rcv_data = 0; 14825797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas } 14831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, flags); 14851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic const char *mpsc_type(struct uart_port *port) 14881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_type[%d]: port type: %s\n", port->line,MPSC_DRIVER_NAME); 14901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return MPSC_DRIVER_NAME; 14911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_request_port(struct uart_port *port) 14941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Should make chip/platform specific call */ 14961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 14971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14992e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_release_port(struct uart_port *port) 15001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 15021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->ready) { 15041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_uninit_rings(pi); 15051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_free_ring_mem(pi); 15061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->ready = 0; 15071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15102e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_config_port(struct uart_port *port, int flags) 15111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15142e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_verify_port(struct uart_port *port, struct serial_struct *ser) 15151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 15171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 15181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_verify_port[%d]: Verifying port data\n", pi->port.line); 15201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPSC) 15221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.irq != ser->irq) 15241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (ser->io_type != SERIAL_IO_MEM) 15261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.uartclk / 16 != ser->baud_base) /* Not sure */ 15281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if ((void *)pi->port.mapbase != ser->iomem_base) 15301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.iobase != ser->port) 15321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (ser->hub6 != 0) 15341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 15371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15383b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#ifdef CONFIG_CONSOLE_POLL 15393b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel/* Serial polling routines for writing and reading from the uart while 15403b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel * in an interrupt or debug context. 15413b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel */ 15423b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 15433b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wesselstatic char poll_buf[2048]; 15443b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wesselstatic int poll_ptr; 15453b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wesselstatic int poll_cnt; 15463b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wesselstatic void mpsc_put_poll_char(struct uart_port *port, 15473b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel unsigned char c); 15483b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 15493b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wesselstatic int mpsc_get_poll_char(struct uart_port *port) 15503b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel{ 15513b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 15523b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel struct mpsc_rx_desc *rxre; 15533b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel u32 cmdstat, bytes_in, i; 15543b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel u8 *bp; 15553b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 15563b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (!serial_polled) 15573b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel serial_polled = 1; 15583b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 15593b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel pr_debug("mpsc_rx_intr[%d]: Handling Rx intr\n", pi->port.line); 15603b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 15613b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (poll_cnt) { 15623b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_cnt--; 15633b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel return poll_buf[poll_ptr++]; 15643b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 15653b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_ptr = 0; 15663b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_cnt = 0; 15673b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 15683b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel while (poll_cnt == 0) { 15693b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel rxre = (struct mpsc_rx_desc *)(pi->rxr + 15703b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel (pi->rxr_posn*MPSC_RXRE_SIZE)); 15713b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel dma_cache_sync(pi->port.dev, (void *)rxre, 15723b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 15733b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 15743b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 15753b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel invalidate_dcache_range((ulong)rxre, 15763b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel (ulong)rxre + MPSC_RXRE_SIZE); 15773b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 15783b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel /* 15793b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel * Loop through Rx descriptors handling ones that have 15803b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel * been completed. 15813b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel */ 15823b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel while (poll_cnt == 0 && 15833b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel !((cmdstat = be32_to_cpu(rxre->cmdstat)) & 15843b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel SDMA_DESC_CMDSTAT_O)){ 15853b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel bytes_in = be16_to_cpu(rxre->bytecnt); 15863b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE); 15873b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel dma_cache_sync(pi->port.dev, (void *) bp, 15883b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel MPSC_RXBE_SIZE, DMA_FROM_DEVICE); 15893b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 15903b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 15913b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel invalidate_dcache_range((ulong)bp, 15923b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel (ulong)bp + MPSC_RXBE_SIZE); 15933b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 15943b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if ((unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR | 15953b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel SDMA_DESC_CMDSTAT_FR | SDMA_DESC_CMDSTAT_OR))) && 15963b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel !(cmdstat & pi->port.ignore_status_mask)) { 15973b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_buf[poll_cnt] = *bp; 15983b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_cnt++; 15993b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } else { 16003b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel for (i = 0; i < bytes_in; i++) { 16013b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_buf[poll_cnt] = *bp++; 16023b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_cnt++; 16033b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 16043b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel pi->port.icount.rx += bytes_in; 16053b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 16063b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel rxre->bytecnt = cpu_to_be16(0); 16073b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel wmb(); 16083b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | 16093b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel SDMA_DESC_CMDSTAT_EI | 16103b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel SDMA_DESC_CMDSTAT_F | 16113b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel SDMA_DESC_CMDSTAT_L); 16123b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel wmb(); 16133b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel dma_cache_sync(pi->port.dev, (void *)rxre, 16143b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel MPSC_RXRE_SIZE, DMA_BIDIRECTIONAL); 16153b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 16163b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 16173b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel flush_dcache_range((ulong)rxre, 16183b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel (ulong)rxre + MPSC_RXRE_SIZE); 16193b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 16203b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 16213b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel /* Advance to next descriptor */ 16223b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel pi->rxr_posn = (pi->rxr_posn + 1) & 16233b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel (MPSC_RXR_ENTRIES - 1); 16243b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel rxre = (struct mpsc_rx_desc *)(pi->rxr + 16253b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel (pi->rxr_posn * MPSC_RXRE_SIZE)); 16263b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel dma_cache_sync(pi->port.dev, (void *)rxre, 16273b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 16283b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 16293b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 16303b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel invalidate_dcache_range((ulong)rxre, 16313b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel (ulong)rxre + MPSC_RXRE_SIZE); 16323b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 16333b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 16343b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 16353b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel /* Restart rx engine, if its stopped */ 16363b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if ((readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_ERD) == 0) 16373b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel mpsc_start_rx(pi); 16383b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 16393b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel if (poll_cnt) { 16403b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel poll_cnt--; 16413b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel return poll_buf[poll_ptr++]; 16423b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel } 16433b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 16443b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel return 0; 16453b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel} 16463b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 16473b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 16483b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wesselstatic void mpsc_put_poll_char(struct uart_port *port, 16493b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel unsigned char c) 16503b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel{ 16513b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 16523b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel u32 data; 16533b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 16543b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel data = readl(pi->mpsc_base + MPSC_MPCR); 16553b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel writeb(c, pi->mpsc_base + MPSC_CHR_1); 16563b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel mb(); 16573b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel data = readl(pi->mpsc_base + MPSC_CHR_2); 16583b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel data |= MPSC_CHR_2_TTCS; 16593b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel writel(data, pi->mpsc_base + MPSC_CHR_2); 16603b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel mb(); 16613b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel 16623b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_TTCS); 16633b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel} 16643b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 16651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct uart_ops mpsc_pops = { 16672e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .tx_empty = mpsc_tx_empty, 16682e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .set_mctrl = mpsc_set_mctrl, 16692e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .get_mctrl = mpsc_get_mctrl, 16702e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .stop_tx = mpsc_stop_tx, 16712e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .start_tx = mpsc_start_tx, 16722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .stop_rx = mpsc_stop_rx, 16732e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .enable_ms = mpsc_enable_ms, 16742e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .break_ctl = mpsc_break_ctl, 16752e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .startup = mpsc_startup, 16762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .shutdown = mpsc_shutdown, 16772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .set_termios = mpsc_set_termios, 16782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .type = mpsc_type, 16792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .release_port = mpsc_release_port, 16802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .request_port = mpsc_request_port, 16812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .config_port = mpsc_config_port, 16822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .verify_port = mpsc_verify_port, 16833b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#ifdef CONFIG_CONSOLE_POLL 16843b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel .poll_get_char = mpsc_get_poll_char, 16853b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel .poll_put_char = mpsc_put_poll_char, 16863b216c9ed347924efb5e7a66b3257c40a5596d30Jason Wessel#endif 16871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 16881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 16901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 16911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 16921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Console Interface Routines 16931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 16941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 16951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 16961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_SERIAL_MPSC_CONSOLE 16982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_console_write(struct console *co, const char *s, uint count) 16991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = &mpsc_ports[co->index]; 17011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp, *dp, add_cr = 0; 17021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 17031733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang unsigned long iflags; 17041733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 17051733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_irqsave(&pi->tx_lock, iflags); 17061733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 17071733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang while (pi->txr_head != pi->txr_tail) { 17081733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang while (mpsc_sdma_tx_active(pi)) 17091733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang udelay(100); 17101733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang mpsc_sdma_intr_ack(pi); 17111733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang mpsc_tx_intr(pi); 17121733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang } 17131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (mpsc_sdma_tx_active(pi)) 17151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 17161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (count > 0) { 17181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = dp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 17191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_TXBE_SIZE; i++) { 17211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (count == 0) 17221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 17231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (add_cr) { 17251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(dp++) = '\r'; 17261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add_cr = 0; 17272e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 17281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(dp++) = *s; 17291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (*(s++) == '\n') { /* add '\r' after '\n' */ 17311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add_cr = 1; 17321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count++; 17331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count--; 17371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)bp, MPSC_TXBE_SIZE, 17402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 17411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 17421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 17431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)bp, 17442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)bp + MPSC_TXBE_SIZE); 17451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 17461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_setup_tx_desc(pi, i, 0); 17471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 17481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); 17491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (mpsc_sdma_tx_active(pi)) 17511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 17521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = (pi->txr_tail + 1) & (MPSC_TXR_ENTRIES - 1); 17541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17561733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_unlock_irqrestore(&pi->tx_lock, iflags); 17571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17592e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int __init mpsc_console_setup(struct console *co, char *options) 17601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi; 17621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int baud, bits, parity, flow; 17631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_console_setup[%d]: options: %s\n", co->index, options); 17651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (co->index >= MPSC_NUM_CTLRS) 17671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds co->index = 0; 17681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi = &mpsc_ports[co->index]; 17701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds baud = pi->default_baud; 17721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bits = pi->default_bits; 17731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds parity = pi->default_parity; 17741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flow = pi->default_flow; 17751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->port.ops) 17771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENODEV; 17781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_init(&pi->port.lock); /* Temporary fix--copied from 8250.c */ 17801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (options) 17821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_parse_options(options, &baud, &parity, &bits, &flow); 17831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return uart_set_options(&pi->port, co, baud, parity, bits, flow); 17851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct console mpsc_console = { 17882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .name = MPSC_DEV_NAME, 17892e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .write = mpsc_console_write, 17902e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .device = uart_console_device, 17912e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .setup = mpsc_console_setup, 17922e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .flags = CON_PRINTBUFFER, 17932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .index = -1, 17942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .data = &mpsc_reg, 17951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 17961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int __init mpsc_late_console_init(void) 17981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_late_console_init: Enter\n"); 18001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(mpsc_console.flags & CON_ENABLED)) 18021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds register_console(&mpsc_console); 18031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 18041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldslate_initcall(mpsc_late_console_init); 18071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_CONSOLE &mpsc_console 18091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 18101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_CONSOLE NULL 18111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 18121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 18131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 18141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 18151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Dummy Platform Driver to extract & map shared register regions 18161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 18171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 18181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 18192e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_resource_err(char *s) 18201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_WARNING "MPSC: Platform device resource error in %s\n", s); 18221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18242e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_shared_map_regs(struct platform_device *pd) 18251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct resource *r; 18271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 18292e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_BASE_ORDER)) 18302e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 18312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE, 18322e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "mpsc_routing_regs")) { 18331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base = ioremap(r->start, 18342e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE); 18351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base_p = r->start; 18362e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 18371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("MPSC routing base"); 18381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 18391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 18422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_INTR_BASE_ORDER)) 18432e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 18442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_INTR_REG_BLOCK_SIZE, 18452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "sdma_intr_regs")) { 18461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base = ioremap(r->start, 18471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_INTR_REG_BLOCK_SIZE); 18481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base_p = r->start; 18492e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 18501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.mpsc_routing_base); 18511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 18522e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE); 18531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("SDMA intr base"); 18541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 18551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 18581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18602e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_shared_unmap_regs(void) 18611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_shared_regs.mpsc_routing_base) { 18631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.mpsc_routing_base); 18641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 18652e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE); 18661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_shared_regs.sdma_intr_base) { 18681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.sdma_intr_base); 18691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.sdma_intr_base_p, 18702e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_INTR_REG_BLOCK_SIZE); 18711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18732c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_shared_regs.mpsc_routing_base = NULL; 18742c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_shared_regs.sdma_intr_base = NULL; 18751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base_p = 0; 18771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base_p = 0; 18781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_shared_drv_probe(struct platform_device *dev) 18811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_shared_pdata *pdata; 18831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 18841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18853ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id == 0) { 18862e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if (!(rc = mpsc_shared_map_regs(dev))) { 18872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pdata = (struct mpsc_shared_pdata *) 18882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dev->dev.platform_data; 18891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_MRR_m = pdata->mrr_val; 18911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_RCRR_m= pdata->rcrr_val; 18921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_TCRR_m= pdata->tcrr_val; 18931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_CAUSE_m = 18941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata->intr_cause_val; 18951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_MASK_m = 18961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata->intr_mask_val; 18971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 18991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 19031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19052e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_shared_drv_remove(struct platform_device *dev) 19061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 19081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19093ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id == 0) { 19101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_unmap_regs(); 19111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_MRR_m = 0; 19121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_RCRR_m = 0; 19131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_TCRR_m = 0; 19141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_CAUSE_m = 0; 19151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_MASK_m = 0; 19161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 19171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 19201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19223ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingstatic struct platform_driver mpsc_shared_driver = { 19231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .probe = mpsc_shared_drv_probe, 19241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .remove = mpsc_shared_drv_remove, 19253ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .driver = { 19262e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .name = MPSC_SHARED_NAME, 19273ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King }, 19281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 19291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 19311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 19321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 19331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Driver Interface Routines 19341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 19351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 19361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 19371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct uart_driver mpsc_reg = { 19382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .owner = THIS_MODULE, 19392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .driver_name = MPSC_DRIVER_NAME, 19402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .dev_name = MPSC_DEV_NAME, 19412e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .major = MPSC_MAJOR, 19422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .minor = MPSC_MINOR_START, 19432e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .nr = MPSC_NUM_CTLRS, 19442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .cons = MPSC_CONSOLE, 19451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 19461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19472e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_drv_map_regs(struct mpsc_port_info *pi, 19482e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct platform_device *pd) 19491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct resource *r; 19511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19522e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if ((r = platform_get_resource(pd, IORESOURCE_MEM, MPSC_BASE_ORDER)) 19532e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, MPSC_REG_BLOCK_SIZE, 19542e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "mpsc_regs")) { 19551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base = ioremap(r->start, MPSC_REG_BLOCK_SIZE); 19561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base_p = r->start; 19572e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 19581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("MPSC base"); 19592e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer goto err; 19601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 19632e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_BASE_ORDER)) 19642e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 19652e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_REG_BLOCK_SIZE, "sdma_regs")) { 19661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base = ioremap(r->start,MPSC_SDMA_REG_BLOCK_SIZE); 19671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base_p = r->start; 19682e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 19691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("SDMA base"); 1970a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->mpsc_base) { 1971a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->mpsc_base); 1972a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->mpsc_base = NULL; 1973a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 19742e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer goto err; 19751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd,IORESOURCE_MEM,MPSC_BRG_BASE_ORDER)) 19782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 19792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_BRG_REG_BLOCK_SIZE, "brg_regs")) { 19801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base = ioremap(r->start, MPSC_BRG_REG_BLOCK_SIZE); 19811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base_p = r->start; 19822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 19831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("BRG base"); 1984a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->mpsc_base) { 1985a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->mpsc_base); 1986a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->mpsc_base = NULL; 1987a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 1988a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->sdma_base) { 1989a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->sdma_base); 1990a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->sdma_base = NULL; 1991a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 19922e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer goto err; 19931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 19952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer 19962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greererr: 19972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer return -ENOMEM; 19981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20002e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_drv_unmap_regs(struct mpsc_port_info *pi) 20011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 20021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->mpsc_base) { 20031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->mpsc_base); 20041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->mpsc_base_p, MPSC_REG_BLOCK_SIZE); 20051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->sdma_base) { 20071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->sdma_base); 20081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->sdma_base_p, MPSC_SDMA_REG_BLOCK_SIZE); 20091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->brg_base) { 20111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->brg_base); 20121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->brg_base_p, MPSC_BRG_REG_BLOCK_SIZE); 20131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20152c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->mpsc_base = NULL; 20162c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->sdma_base = NULL; 20172c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->brg_base = NULL; 20181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base_p = 0; 20201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base_p = 0; 20211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base_p = 0; 20221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20242e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_drv_get_platform_data(struct mpsc_port_info *pi, 20252e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct platform_device *pd, int num) 20261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 20271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_pdata *pdata; 20281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata = (struct mpsc_pdata *)pd->dev.platform_data; 20301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.uartclk = pdata->brg_clk_freq; 20321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.iotype = UPIO_MEM; 20331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line = num; 20341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.type = PORT_MPSC; 20351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.fifosize = MPSC_TXBE_SIZE; 20361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.membase = pi->mpsc_base; 20371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.mapbase = (ulong)pi->mpsc_base; 20381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ops = &mpsc_pops; 20391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mirror_regs = pdata->mirror_regs; 20411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->cache_mgmt = pdata->cache_mgmt; 20421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_can_tune = pdata->brg_can_tune; 20431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_clk_src = pdata->brg_clk_src; 20441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_max_idle = pdata->max_idle; 20451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_baud = pdata->default_baud; 20461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_bits = pdata->default_bits; 20471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_parity = pdata->default_parity; 20481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_flow = pdata->default_flow; 20491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Initial values of mirrored regs */ 20511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = pdata->chr_1_val; 20521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = pdata->chr_2_val; 20531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_10_m = pdata->chr_10_val; 20541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = pdata->mpcr_val; 20551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = pdata->bcr_val; 20561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs = &mpsc_shared_regs; 20581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.irq = platform_get_irq(pd, 0); 20601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20622e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_drv_probe(struct platform_device *dev) 20631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 20641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi; 20651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 20661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20673ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pr_debug("mpsc_drv_probe: Adding MPSC %d\n", dev->id); 20681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20693ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id < MPSC_NUM_CTLRS) { 20703ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pi = &mpsc_ports[dev->id]; 20711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20723ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (!(rc = mpsc_drv_map_regs(pi, dev))) { 20733ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King mpsc_drv_get_platform_data(pi, dev, dev->id); 2074f467bc148d05a1465211102804858df9c667f8b9Corey Minyard pi->port.dev = &dev->dev; 20751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20761733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang if (!(rc = mpsc_make_ready(pi))) { 20771733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_init(&pi->tx_lock); 20781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(rc = uart_add_one_port(&mpsc_reg, 20792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer &pi->port))) { 20801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 20812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 20822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer mpsc_release_port((struct uart_port *) 20832e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi); 20841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_drv_unmap_regs(pi); 20851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20862e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 20871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_drv_unmap_regs(pi); 20882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 20891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 20931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_drv_remove(struct platform_device *dev) 20961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 20973ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pr_debug("mpsc_drv_exit: Removing MPSC %d\n", dev->id); 20981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20993ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id < MPSC_NUM_CTLRS) { 21003ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King uart_remove_one_port(&mpsc_reg, &mpsc_ports[dev->id].port); 21012e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer mpsc_release_port((struct uart_port *) 21022e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer &mpsc_ports[dev->id].port); 21033ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King mpsc_drv_unmap_regs(&mpsc_ports[dev->id]); 21041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 21052e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 21061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENODEV; 21072e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 21081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 21091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21103ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingstatic struct platform_driver mpsc_driver = { 21111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .probe = mpsc_drv_probe, 21121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .remove = mpsc_drv_remove, 21133ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .driver = { 21142e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .name = MPSC_CTLR_NAME, 2115e169c139642fb4c682ec12a409725508dbefa520Kay Sievers .owner = THIS_MODULE, 21163ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King }, 21171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 21181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21192e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int __init mpsc_drv_init(void) 21201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 21211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 21221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2123d87a6d951c6c09d191d9c10903deb3cc353fcd2cAdrian Bunk printk(KERN_INFO "Serial: MPSC driver\n"); 21241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(mpsc_ports, 0, sizeof(mpsc_ports)); 21261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); 21271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(rc = uart_register_driver(&mpsc_reg))) { 21293ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (!(rc = platform_driver_register(&mpsc_shared_driver))) { 21303ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if ((rc = platform_driver_register(&mpsc_driver))) { 21313ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_shared_driver); 21321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 21331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 21342e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 21351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 21362e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 21371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 21381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 21401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 21411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void __exit mpsc_drv_exit(void) 21431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 21443ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_driver); 21453ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_shared_driver); 21461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 21471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(mpsc_ports, 0, sizeof(mpsc_ports)); 21481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); 21491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 21501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_init(mpsc_drv_init); 21521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_exit(mpsc_drv_exit); 21531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_AUTHOR("Mark A. Greer <mgreer@mvista.com>"); 2155d87a6d951c6c09d191d9c10903deb3cc353fcd2cAdrian BunkMODULE_DESCRIPTION("Generic Marvell MPSC serial/UART driver"); 21561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_VERSION(MPSC_VERSION); 21571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_LICENSE("GPL"); 21581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_ALIAS_CHARDEV_MAJOR(MPSC_MAJOR); 2159e169c139642fb4c682ec12a409725508dbefa520Kay SieversMODULE_ALIAS("platform:" MPSC_CTLR_NAME); 2160