mpsc.c revision 7d12e780e003f93433d49ce78cfedf4b4c52adc5
11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Generic driver for the MPSC (UART mode) on Marvell parts (e.g., GT64240, 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * GT64260, MV64340, MV64360, GT96100, ... ). 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Author: Mark A. Greer <mgreer@mvista.com> 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Based on an old MPSC driver that was in the linuxppc tree. It appears to 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * have been created by Chris Zankel (formerly of MontaVista) but there 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * is no proper Copyright so I'm not sure. Apparently, parts were also 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * taken from PPCBoot (now U-Boot). Also based on drivers/serial/8250.c 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * by Russell King. 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2004 (c) MontaVista, Software, Inc. This file is licensed under 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the terms of the GNU General Public License version 2. This program 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * is licensed "as is" without any warranty of any kind, whether express 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * or implied. 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The MPSC interface is much like a typical network controller's interface. 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * That is, you set up separate rings of descriptors for transmitting and 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * receiving data. There is also a pool of buffers with (one buffer per 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * descriptor) that incoming data are dma'd into or outgoing data are dma'd 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * out of. 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The MPSC requires two other controllers to be able to work. The Baud Rate 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Generator (BRG) provides a clock at programmable frequencies which determines 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the baud rate. The Serial DMA Controller (SDMA) takes incoming data from the 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MPSC and DMA's it into memory or DMA's outgoing data and passes it to the 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MPSC. It is actually the SDMA interrupt that the driver uses to keep the 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * transmit and receive "engines" going (i.e., indicate data has been 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * transmitted or received). 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * NOTES: 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1) Some chips have an erratum where several regs cannot be 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * read. To work around that, we keep a local copy of those regs in 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 'mpsc_port_info'. 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2) Some chips have an erratum where the ctlr will hang when the SDMA ctlr 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * accesses system mem with coherency enabled. For that reason, the driver 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * assumes that coherency for that ctlr has been disabled. This means 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * that when in a cache coherent system, the driver has to manually manage 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the data cache on the areas that it touches because the dma_* macro are 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * basically no-ops. 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3) There is an erratum (on PPC) where you can't use the instruction to do 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * a DMA_TO_DEVICE/cache clean so DMA_BIDIRECTIONAL/flushes are used in places 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * where a DMA_TO_DEVICE/clean would have [otherwise] sufficed. 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4) AFAICT, hardware flow control isn't supported by the controller --MAG. 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 53e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 54e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#if defined(CONFIG_SERIAL_MPSC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 55e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SUPPORT_SYSRQ 56e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#endif 57e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 58e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/module.h> 59e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/moduleparam.h> 60e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/tty.h> 61e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/tty_flip.h> 62e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/ioport.h> 63e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/init.h> 64e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/console.h> 65e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/sysrq.h> 66e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/serial.h> 67e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/serial_core.h> 68e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/delay.h> 69e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/device.h> 70e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/dma-mapping.h> 71e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/mv643xx.h> 72d052d1beff706920e82c5d55006b08e256b5df09Russell King#include <linux/platform_device.h> 73d052d1beff706920e82c5d55006b08e256b5df09Russell King 74e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <asm/io.h> 75e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <asm/irq.h> 76e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 77e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#if defined(CONFIG_SERIAL_MPSC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 78e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SUPPORT_SYSRQ 79e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#endif 80e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 81e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_NUM_CTLRS 2 82e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 83e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* 84e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Descriptors and buffers must be cache line aligned. 85e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Buffers lengths must be multiple of cache line size. 86e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Number of Tx & Rx descriptors must be powers of 2. 87e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer */ 88e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXR_ENTRIES 32 89e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXRE_SIZE dma_get_cache_alignment() 90e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXR_SIZE (MPSC_RXR_ENTRIES * MPSC_RXRE_SIZE) 91e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXBE_SIZE dma_get_cache_alignment() 92e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXB_SIZE (MPSC_RXR_ENTRIES * MPSC_RXBE_SIZE) 93e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 94e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXR_ENTRIES 32 95e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXRE_SIZE dma_get_cache_alignment() 96e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXR_SIZE (MPSC_TXR_ENTRIES * MPSC_TXRE_SIZE) 97e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXBE_SIZE dma_get_cache_alignment() 98e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXB_SIZE (MPSC_TXR_ENTRIES * MPSC_TXBE_SIZE) 99e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 100e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_DMA_ALLOC_SIZE (MPSC_RXR_SIZE + MPSC_RXB_SIZE + \ 101e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer MPSC_TXR_SIZE + MPSC_TXB_SIZE + \ 102e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_get_cache_alignment() /* for alignment */) 103e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 104e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Rx and Tx Ring entry descriptors -- assume entry size is <= cacheline size */ 105e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_rx_desc { 106e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bufsize; 107e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bytecnt; 108e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 cmdstat; 109e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 link; 110e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 buf_ptr; 111e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer} __attribute((packed)); 112e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 113e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_tx_desc { 114e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bytecnt; 115e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 shadow; 116e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 cmdstat; 117e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 link; 118e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 buf_ptr; 119e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer} __attribute((packed)); 120e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 121e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* 122e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Some regs that have the erratum that you can't read them are are shared 123e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * between the two MPSC controllers. This struct contains those shared regs. 124e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer */ 125e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_shared_regs { 126e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t mpsc_routing_base_p; 127e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t sdma_intr_base_p; 128e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 129e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *mpsc_routing_base; 130e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *sdma_intr_base; 131e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 132e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_MRR_m; 133e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_RCRR_m; 134e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_TCRR_m; 135e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 SDMA_INTR_CAUSE_m; 136e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 SDMA_INTR_MASK_m; 137e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer}; 138e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 139e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* The main driver data structure */ 140e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info { 141e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer struct uart_port port; /* Overlay uart_port structure */ 142e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 143e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Internal driver state for this ctlr */ 144e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 ready; 145e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 rcv_data; 146e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer tcflag_t c_iflag; /* save termios->c_iflag */ 147e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer tcflag_t c_cflag; /* save termios->c_cflag */ 148e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 149e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Info passed in from platform */ 150e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 mirror_regs; /* Need to mirror regs? */ 151e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 cache_mgmt; /* Need manual cache mgmt? */ 152e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 brg_can_tune; /* BRG has baud tuning? */ 153e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 brg_clk_src; 154e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 mpsc_max_idle; 155e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_baud; 156e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_bits; 157e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_parity; 158e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_flow; 159e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 160e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Physical addresses of various blocks of registers (from platform) */ 161e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t mpsc_base_p; 162e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t sdma_base_p; 163e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t brg_base_p; 164e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 165e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Virtual addresses of various blocks of registers (from platform) */ 166e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *mpsc_base; 167e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *sdma_base; 168e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *brg_base; 169e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 170e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Descriptor ring and buffer allocations */ 171e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void *dma_region; 172e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t dma_region_p; 173e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 174e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t rxr; /* Rx descriptor ring */ 175e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t rxr_p; /* Phys addr of rxr */ 176e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *rxb; /* Rx Ring I/O buf */ 177e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *rxb_p; /* Phys addr of rxb */ 178e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 rxr_posn; /* First desc w/ Rx data */ 179e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 180e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t txr; /* Tx descriptor ring */ 181e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t txr_p; /* Phys addr of txr */ 182e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *txb; /* Tx Ring I/O buf */ 183e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *txb_p; /* Phys addr of txb */ 184e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int txr_head; /* Where new data goes */ 185e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int txr_tail; /* Where sent data comes off */ 186e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 187e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Mirrored values of regs we can't read (if 'mirror_regs' set) */ 188e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_MPCR_m; 189e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_1_m; 190e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_2_m; 191e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_10_m; 192e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 BRG_BCR_m; 193e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer struct mpsc_shared_regs *shared_regs; 194e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer}; 195e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 196e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Hooks to platform-specific code */ 197e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerint mpsc_platform_register_driver(void); 198e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greervoid mpsc_platform_unregister_driver(void); 199e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 200e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Hooks back in to mpsc common to be called by platform-specific code */ 201e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info *mpsc_device_probe(int index); 202e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info *mpsc_device_remove(int index); 203e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 204e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Main MPSC Configuration Register Offsets */ 205e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MMCRL 0x0000 206e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MMCRH 0x0004 207e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR 0x0008 208e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_1 0x000c 209e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2 0x0010 210e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_3 0x0014 211e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_4 0x0018 212e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_5 0x001c 213e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_6 0x0020 214e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_7 0x0024 215e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_8 0x0028 216e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_9 0x002c 217e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_10 0x0030 218e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_11 0x0034 219e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 220e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_FRZ (1 << 9) 221e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_5 0 222e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_6 1 223e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_7 2 224e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_8 3 225e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_SBL_1 0 226e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_SBL_2 1 227e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 228e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TEV (1<<1) 229e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TA (1<<7) 230e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TTCS (1<<9) 231e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_REV (1<<17) 232e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_RA (1<<23) 233e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_CRD (1<<25) 234e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_EH (1<<31) 235e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_ODD 0 236e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_SPACE 1 237e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_EVEN 2 238e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_MARK 3 239e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 240e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* MPSC Signal Routing */ 241e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MRR 0x0000 242e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RCRR 0x0004 243e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TCRR 0x0008 244e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 245e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Serial DMA Controller Interface Registers */ 246e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC 0x0000 247e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM 0x0008 248e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_RX_DESC 0x0800 249e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_RX_BUF_PTR 0x0808 250e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SCRDP 0x0810 251e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_TX_DESC 0x0c00 252e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SCTDP 0x0c10 253e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SFTDP 0x0c14 254e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 255e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_PE (1<<0) 256e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_CDL (1<<1) 257e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_FR (1<<3) 258e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_OR (1<<6) 259e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_BR (1<<9) 260e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_MI (1<<10) 261e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_A (1<<11) 262e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_AM (1<<12) 263e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_CT (1<<13) 264e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_C (1<<14) 265e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_ES (1<<15) 266e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_L (1<<16) 267e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_F (1<<17) 268e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_P (1<<18) 269e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_EI (1<<23) 270e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_O (1<<31) 271e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 272e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O | \ 273e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer SDMA_DESC_CMDSTAT_EI) 274e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 275e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_RFT (1<<0) 276e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_SFM (1<<1) 277e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_BLMR (1<<6) 278e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_BLMT (1<<7) 279e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_POVR (1<<8) 280e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_RIFB (1<<9) 281e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 282e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_ERD (1<<7) 283e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_AR (1<<15) 284e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_STD (1<<16) 285e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_TXD (1<<23) 286e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_AT (1<<31) 287e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 288e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_RXBUF (1<<0) 289e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_RXERR (1<<1) 290e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_TXBUF (1<<2) 291e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_TXEND (1<<3) 292e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_RXBUF (1<<8) 293e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_RXERR (1<<9) 294e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_TXBUF (1<<10) 295e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_TXEND (1<<11) 296e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 297e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR | \ 298e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR) 299e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND | \ 300e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND) 301e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 302e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* SDMA Interrupt registers */ 303e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_INTR_CAUSE 0x0000 304e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_INTR_MASK 0x0080 305e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 306e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Baud Rate Generator Interface Registers */ 307e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define BRG_BCR 0x0000 308e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define BRG_BTR 0x0004 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Define how this driver is known to the outside (we've been assigned a 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * range on the "Low-density serial ports" major). 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_MAJOR 204 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_MINOR_START 44 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_DRIVER_NAME "MPSC" 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_DEV_NAME "ttyMM" 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_VERSION "1.00" 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct mpsc_port_info mpsc_ports[MPSC_NUM_CTLRS]; 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct mpsc_shared_regs mpsc_shared_regs; 3224d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic struct uart_driver mpsc_reg; 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3244d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_start_rx(struct mpsc_port_info *pi); 3254d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_free_ring_mem(struct mpsc_port_info *pi); 3264d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_release_port(struct uart_port *port); 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Baud Rate Generator Routines (BRG) 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_brg_init(struct mpsc_port_info *pi, u32 clk_src) 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(0xf << 18)) | ((clk_src & 0xf) << 18); 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->brg_can_tune) 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~(1 << 25); 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(readl(pi->brg_base + BRG_BTR) & 0xffff0000, 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base + BRG_BTR); 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_brg_enable(struct mpsc_port_info *pi) 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= (1 << 16); 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_brg_disable(struct mpsc_port_info *pi) 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~(1 << 16); 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_set_baudrate(struct mpsc_port_info *pi, u32 baud) 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * To set the baud, we adjust the CDV field in the BRG_BCR reg. 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * From manual: Baud = clk / ((CDV+1)*2) ==> CDV = (clk / (baud*2)) - 1. 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * However, the input clock is divided by 16 in the MPSC b/c of how 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 'MPSC_MMCRH' was set up so we have to divide the 'clk' used in our 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * calculation by 16 to account for that. So the real calculation 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * that accounts for the way the mpsc is set up is: 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CDV = (clk / (baud*2*16)) - 1 ==> CDV = (clk / (baud << 5)) - 1. 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 cdv = (pi->port.uartclk / (baud << 5)) - 1; 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_disable(pi); 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & 0xffff0000) | (cdv & 0xffff); 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_enable(pi); 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Serial DMA Routines (SDMA) 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_burstsize(struct mpsc_port_info *pi, u32 burst_size) 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_burstsize[%d]: burst_size: %d\n", 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line, burst_size); 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds burst_size >>= 3; /* Divide by 8 b/c reg values are 8-byte chunks */ 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (burst_size < 2) 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x0; /* 1 64-bit word */ 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (burst_size < 4) 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x1; /* 2 64-bit words */ 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (burst_size < 8) 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x2; /* 4 64-bit words */ 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x3; /* 8 64-bit words */ 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((readl(pi->sdma_base + SDMA_SDC) & (0x3 << 12)) | (v << 12), 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base + SDMA_SDC); 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_init(struct mpsc_port_info *pi, u32 burst_size) 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_init[%d]: burst_size: %d\n", pi->port.line, 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds burst_size); 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((readl(pi->sdma_base + SDMA_SDC) & 0x3ff) | 0x03f, 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base + SDMA_SDC); 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_burstsize(pi, burst_size); 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline u32 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_intr_mask(struct mpsc_port_info *pi, u32 mask) 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 old, v; 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_mask[%d]: mask: 0x%x\n", pi->port.line, mask); 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds old = v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m : 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask &= 0xf; 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask <<= 8; 4661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~mask; 4671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_MASK_m = v; 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds old >>= 8; 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return old & 0xf; 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 4781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_intr_unmask(struct mpsc_port_info *pi, u32 mask) 4791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 4811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_unmask[%d]: mask: 0x%x\n", pi->port.line,mask); 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m : 4851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask &= 0xf; 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask <<= 8; 4901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= mask; 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_MASK_m = v; 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_intr_ack(struct mpsc_port_info *pi) 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_ack[%d]: Acknowledging IRQ\n", pi->port.line); 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_CAUSE_m = 0; 5051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->shared_regs->sdma_intr_base + SDMA_INTR_CAUSE); 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_set_rx_ring(struct mpsc_port_info *pi, struct mpsc_rx_desc *rxre_p) 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_set_rx_ring[%d]: rxre_p: 0x%x\n", 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line, (u32) rxre_p); 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)rxre_p, pi->sdma_base + SDMA_SCRDP); 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_set_tx_ring(struct mpsc_port_info *pi, struct mpsc_tx_desc *txre_p) 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)txre_p, pi->sdma_base + SDMA_SFTDP); 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)txre_p, pi->sdma_base + SDMA_SCTDP); 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_cmd(struct mpsc_port_info *pi, u32 val) 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->sdma_base + SDMA_SDCM); 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (val) 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= val; 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0; 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->sdma_base + SDMA_SDCM); 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline uint 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_tx_active(struct mpsc_port_info *pi) 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_TXD; 5471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 5501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_start_tx(struct mpsc_port_info *pi) 5511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre, *txre_p; 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If tx isn't running & there's a desc ready to go, start it */ 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_sdma_tx_active(pi)) { 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre = (struct mpsc_tx_desc *)(pi->txr + 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (pi->txr_tail * MPSC_TXRE_SIZE)); 5581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 5591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)txre + MPSC_TXRE_SIZE); 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O) { 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre_p = (struct mpsc_tx_desc *)(pi->txr_p + 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (pi->txr_tail * 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_TXRE_SIZE)); 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_set_tx_ring(pi, txre_p); 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_STD | SDMA_SDCM_TXD); 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 5791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_sdma_stop(struct mpsc_port_info *pi) 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_stop[%d]: Stopping SDMA\n", pi->port.line); 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Abort any SDMA transfers */ 5841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, 0); 5851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_AR | SDMA_SDCM_AT); 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Clear the SDMA current and first TX and RX pointers */ 5882c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_sdma_set_tx_ring(pi, NULL); 5892c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_sdma_set_rx_ring(pi, NULL); 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Disable interrupts */ 5921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_mask(pi, 0xf); 5931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 5941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 5961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Multi-Protocol Serial Controller Routines (MPSC) 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_hw_init(struct mpsc_port_info *pi) 6081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_hw_init[%d]: Initializing hardware\n", pi->port.line); 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Set up clock routing */ 6141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 6151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_MRR_m; 6161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~0x1c7; 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_MRR_m = v; 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR); 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_RCRR_m; 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_RCRR_m = v; 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_TCRR_m; 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_TCRR_m = v; 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_MRR); 6321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~0x1c7; 6331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR); 6341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 6381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 6421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Put MPSC in UART mode & enabel Tx/Rx egines */ 6451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0x000004c4, pi->mpsc_base + MPSC_MMCRL); 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* No preamble, 16x divider, low-latency, */ 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0x04400400, pi->mpsc_base + MPSC_MMCRH); 6491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 6511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = 0; 6521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = 0; 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_1); 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_2); 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(pi->mpsc_max_idle, pi->mpsc_base + MPSC_CHR_3); 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_4); 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_5); 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_6); 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_7); 6611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_8); 6621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_9); 6631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_10); 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 6661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_enter_hunt(struct mpsc_port_info *pi) 6701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_enter_hunt[%d]: Hunting...\n", pi->port.line); 6721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 6741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(pi->MPSC_CHR_2_m | MPSC_CHR_2_EH, 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base + MPSC_CHR_2); 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Erratum prevents reading CHR_2 so just delay for a while */ 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_EH, 6811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base + MPSC_CHR_2); 6821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_EH) 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 6881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 6911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_freeze(struct mpsc_port_info *pi) 6921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_freeze[%d]: Freezing\n", pi->port.line); 6961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 6981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 6991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= MPSC_MPCR_FRZ; 7001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 7031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 7041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 7051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 7081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_unfreeze(struct mpsc_port_info *pi) 7091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 7111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 7131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 7141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~MPSC_MPCR_FRZ; 7151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 7181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 7191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_unfreeze[%d]: Unfrozen\n", pi->port.line); 7211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 7221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 7251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_set_char_length(struct mpsc_port_info *pi, u32 len) 7261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 7281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_char_length[%d]: char len: %d\n", pi->port.line,len); 7301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 7321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 7331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(0x3 << 12)) | ((len & 0x3) << 12); 7341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 7371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 7381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 7391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 7421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_set_stop_bit_length(struct mpsc_port_info *pi, u32 len) 7431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 7451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_stop_bit_length[%d]: stop bits: %d\n", 7471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line, len); 7481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 7501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 7511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(1 << 14)) | ((len & 0x1) << 14); 7531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 7561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 7571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 7581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 7611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_set_parity(struct mpsc_port_info *pi, u32 p) 7621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 7641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_parity[%d]: parity bits: 0x%x\n", pi->port.line, p); 7661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_CHR_2_m : 7681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_CHR_2); 7691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p &= 0x3; 7711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xc000c) | (p << 18) | (p << 2); 7721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = v; 7751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_CHR_2); 7761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 7771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 7811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Driver Init Routines 7831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 7851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 7881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_init_hw(struct mpsc_port_info *pi) 7891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_init_hw[%d]: Initializing\n", pi->port.line); 7911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_init(pi, pi->brg_clk_src); 7931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_enable(pi); 7941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_init(pi, dma_get_cache_alignment()); /* burst a cacheline */ 7951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_stop(pi); 7961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_hw_init(pi); 7971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 7991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 8001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 8021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_alloc_ring_mem(struct mpsc_port_info *pi) 8031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 8041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 8051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_alloc_ring_mem[%d]: Allocating ring mem\n", 8071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line); 8081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->dma_region) { 8101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!dma_supported(pi->port.dev, 0xffffffff)) { 8111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Inadequate DMA support\n"); 8121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -ENXIO; 8131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if ((pi->dma_region = dma_alloc_noncoherent(pi->port.dev, 8151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_DMA_ALLOC_SIZE, &pi->dma_region_p, GFP_KERNEL)) 8161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds == NULL) { 8171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Can't alloc Desc region\n"); 8191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -ENOMEM; 8201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 8241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 8251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 8271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_free_ring_mem(struct mpsc_port_info *pi) 8281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 8291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_free_ring_mem[%d]: Freeing ring mem\n", pi->port.line); 8301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->dma_region) { 8321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_free_noncoherent(pi->port.dev, MPSC_DMA_ALLOC_SIZE, 8331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->dma_region, pi->dma_region_p); 8341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->dma_region = NULL; 8351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->dma_region_p = (dma_addr_t) NULL; 8361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 8391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 8401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 8421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_init_rings(struct mpsc_port_info *pi) 8431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 8441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_rx_desc *rxre; 8451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 8461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t dp, dp_p; 8471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp, *bp_p; 8481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 8491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_init_rings[%d]: Initializing rings\n", pi->port.line); 8511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG_ON(pi->dma_region == NULL); 8531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(pi->dma_region, 0, MPSC_DMA_ALLOC_SIZE); 8551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 8571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Descriptors & buffers are multiples of cacheline size and must be 8581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * cacheline aligned. 8591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp = ALIGN((u32) pi->dma_region, dma_get_cache_alignment()); 8611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p = ALIGN((u32) pi->dma_region_p, dma_get_cache_alignment()); 8621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 8641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Partition dma region into rx ring descriptor, rx buffers, 8651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * tx ring descriptors, and tx buffers. 8661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr = dp; 8681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_p = dp_p; 8691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXR_SIZE; 8701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXR_SIZE; 8711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb = (u8 *) dp; 8731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb_p = (u8 *) dp_p; 8741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXB_SIZE; 8751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXB_SIZE; 8761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = 0; 8781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr = dp; 8801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_p = dp_p; 8811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_TXR_SIZE; 8821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_TXR_SIZE; 8831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb = (u8 *) dp; 8851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb_p = (u8 *) dp_p; 8861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = 0; 8881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = 0; 8891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Init rx ring descriptors */ 8911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp = pi->rxr; 8921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p = pi->rxr_p; 8931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->rxb; 8941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p = pi->rxb_p; 8951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_RXR_ENTRIES; i++) { 8971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre = (struct mpsc_rx_desc *)dp; 8981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bufsize = cpu_to_be16(MPSC_RXBE_SIZE); 9001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bytecnt = cpu_to_be16(0); 9011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | 9021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_EI | 9031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_F | 9041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_L); 9051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->link = cpu_to_be32(dp_p + MPSC_RXRE_SIZE); 9061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->buf_ptr = cpu_to_be32(bp_p); 9071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXRE_SIZE; 9091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXRE_SIZE; 9101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp += MPSC_RXBE_SIZE; 9111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p += MPSC_RXBE_SIZE; 9121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 9131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->link = cpu_to_be32(pi->rxr_p); /* Wrap last back to first */ 9141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Init tx ring descriptors */ 9161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp = pi->txr; 9171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p = pi->txr_p; 9181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb; 9191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p = pi->txb_p; 9201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_TXR_ENTRIES; i++) { 9221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre = (struct mpsc_tx_desc *)dp; 9231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->link = cpu_to_be32(dp_p + MPSC_TXRE_SIZE); 9251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->buf_ptr = cpu_to_be32(bp_p); 9261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_TXRE_SIZE; 9281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_TXRE_SIZE; 9291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp += MPSC_TXBE_SIZE; 9301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p += MPSC_TXBE_SIZE; 9311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 9321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->link = cpu_to_be32(pi->txr_p); /* Wrap last back to first */ 9331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) pi->dma_region, MPSC_DMA_ALLOC_SIZE, 9351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DMA_BIDIRECTIONAL); 9361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 9371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 9381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)pi->dma_region, 9391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)pi->dma_region + MPSC_DMA_ALLOC_SIZE); 9401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 9411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 9431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 9441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 9461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_uninit_rings(struct mpsc_port_info *pi) 9471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 9481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_uninit_rings[%d]: Uninitializing rings\n",pi->port.line); 9491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG_ON(pi->dma_region == NULL); 9511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr = 0; 9531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_p = 0; 9541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb = NULL; 9551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb_p = NULL; 9561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = 0; 9571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr = 0; 9591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_p = 0; 9601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb = NULL; 9611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb_p = NULL; 9621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = 0; 9631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = 0; 9641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 9661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 9671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 9691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_make_ready(struct mpsc_port_info *pi) 9701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 9711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 9721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_make_ready[%d]: Making cltr ready\n", pi->port.line); 9741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->ready) { 9761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_init_hw(pi); 9771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((rc = mpsc_alloc_ring_mem(pi))) 9781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 9791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_init_rings(pi); 9801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->ready = 1; 9811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 9821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 9841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 9851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 9881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt Handling Routines 9901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 9921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline int 9957d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsmpsc_rx_intr(struct mpsc_port_info *pi) 9961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 9971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_rx_desc *rxre; 9981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct tty_struct *tty = pi->port.info->tty; 9991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 cmdstat, bytes_in, i; 10001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 10011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp; 10021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char flag = TTY_NORMAL; 10031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_rx_intr[%d]: Handling Rx intr\n", pi->port.line); 10051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre = (struct mpsc_rx_desc *)(pi->rxr + (pi->rxr_posn*MPSC_RXRE_SIZE)); 10071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 10091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 10101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 10111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)rxre, 10121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)rxre + MPSC_RXRE_SIZE); 10131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 10141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 10161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Loop through Rx descriptors handling ones that have been completed. 10171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (!((cmdstat = be32_to_cpu(rxre->cmdstat)) & SDMA_DESC_CMDSTAT_O)){ 10191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bytes_in = be16_to_cpu(rxre->bytecnt); 10201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Following use of tty struct directly is deprecated */ 102233f0f88f1c51ae5c2d593d26960c760ea154c2e2Alan Cox if (unlikely(tty_buffer_request_room(tty, bytes_in) < bytes_in)) { 10231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (tty->low_latency) 10241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_flip_buffer_push(tty); 10251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 102633f0f88f1c51ae5c2d593d26960c760ea154c2e2Alan Cox * If this failed then we will throw away the bytes 102733f0f88f1c51ae5c2d593d26960c760ea154c2e2Alan Cox * but must do so to clear interrupts. 10281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE); 10321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) bp, MPSC_RXBE_SIZE, DMA_FROM_DEVICE); 10331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 10341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 10351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)bp, 10361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)bp + MPSC_RXBE_SIZE); 10371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 10381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 10401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Other than for parity error, the manual provides little 10411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * info on what data will be in a frame flagged by any of 10421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * these errors. For parity error, it is the last byte in 10431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the buffer that had the error. As for the rest, I guess 10441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * we'll assume there is no data in the buffer. 10451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * If there is...it gets lost. 10461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 10471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR | 10481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_FR | SDMA_DESC_CMDSTAT_OR))) { 10491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.rx++; 10511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (cmdstat & SDMA_DESC_CMDSTAT_BR) { /* Break */ 10531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.brk++; 10541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (uart_handle_break(&pi->port)) 10561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds goto next_frame; 10571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_FR)/* Framing */ 10591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.frame++; 10601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_OR) /* Overrun */ 10611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.overrun++; 10621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds cmdstat &= pi->port.read_status_mask; 10641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (cmdstat & SDMA_DESC_CMDSTAT_BR) 10661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_BREAK; 10671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_FR) 10681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_FRAME; 10691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_OR) 10701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_OVERRUN; 10711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_PE) 10721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_PARITY; 10731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10757d12e780e003f93433d49ce78cfedf4b4c52adc5David Howells if (uart_handle_sysrq_char(&pi->port, *bp)) { 10761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp++; 10771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bytes_in--; 10781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds goto next_frame; 10791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR | 10821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_FR | SDMA_DESC_CMDSTAT_OR))) && 10831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds !(cmdstat & pi->port.ignore_status_mask)) 10841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_insert_flip_char(tty, *bp, flag); 10861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 10871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i=0; i<bytes_in; i++) 10881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_insert_flip_char(tty, *bp++, TTY_NORMAL); 10891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.rx += bytes_in; 10911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsnext_frame: 10941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bytecnt = cpu_to_be16(0); 10951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 10961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | 10971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_EI | 10981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_F | 10991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_L); 11001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 11011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *)rxre, MPSC_RXRE_SIZE, DMA_BIDIRECTIONAL); 11021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)rxre, 11051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)rxre + MPSC_RXRE_SIZE); 11061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Advance to next descriptor */ 11091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = (pi->rxr_posn + 1) & (MPSC_RXR_ENTRIES - 1); 11101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre = (struct mpsc_rx_desc *)(pi->rxr + 11111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (pi->rxr_posn * MPSC_RXRE_SIZE)); 11121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 11131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)rxre, 11161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)rxre + MPSC_RXRE_SIZE); 11171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 1; 11201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 11211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Restart rx engine, if its stopped */ 11231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_ERD) == 0) 11241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_start_rx(pi); 11251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_flip_buffer_push(tty); 11271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 11281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 11311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr) 11321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 11331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 11341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre = (struct mpsc_tx_desc *)(pi->txr + 11361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (pi->txr_head * MPSC_TXRE_SIZE)); 11371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->bytecnt = cpu_to_be16(count); 11391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->shadow = txre->bytecnt; 11401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); /* ensure cmdstat is last field updated */ 11411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | SDMA_DESC_CMDSTAT_F | 11421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_L | ((intr) ? 11431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_EI 11441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds : 0)); 11451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 11461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, DMA_BIDIRECTIONAL); 11471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)txre, 11501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)txre + MPSC_TXRE_SIZE); 11511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 11541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void 11571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_copy_tx_data(struct mpsc_port_info *pi) 11581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 11591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct circ_buf *xmit = &pi->port.info->xmit; 11601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp; 11611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 i; 11621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Make sure the desc ring isn't full */ 11641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (CIRC_CNT(pi->txr_head, pi->txr_tail, MPSC_TXR_ENTRIES) < 11651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (MPSC_TXR_ENTRIES - 1)) { 11661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.x_char) { 11671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 11681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Ideally, we should use the TCS field in 11691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_1 to put the x_char out immediately but 11701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * errata prevents us from being able to read 11711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_2 to know that its safe to write to 11721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_1. Instead, just put it in-band with 11731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * all the other Tx data. 11741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 11761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *bp = pi->port.x_char; 11771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.x_char = 0; 11781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds i = 1; 11791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 11801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (!uart_circ_empty(xmit) && !uart_tx_stopped(&pi->port)){ 11811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds i = min((u32) MPSC_TXBE_SIZE, 11821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (u32) uart_circ_chars_pending(xmit)); 11831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds i = min(i, (u32) CIRC_CNT_TO_END(xmit->head, xmit->tail, 11841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds UART_XMIT_SIZE)); 11851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 11861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memcpy(bp, &xmit->buf[xmit->tail], i); 11871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds xmit->tail = (xmit->tail + i) & (UART_XMIT_SIZE - 1); 11881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 11901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_write_wakeup(&pi->port); 11911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 11921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else /* All tx data copied into ring bufs */ 11931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 11941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL); 11961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)bp, 11991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)bp + MPSC_TXBE_SIZE); 12001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 12011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_setup_tx_desc(pi, i, 1); 12021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Advance to next descriptor */ 12041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 12051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 12061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 12081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline int 12111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_tx_intr(struct mpsc_port_info *pi) 12121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 12141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 12151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_sdma_tx_active(pi)) { 12171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre = (struct mpsc_tx_desc *)(pi->txr + 12181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (pi->txr_tail * MPSC_TXRE_SIZE)); 12191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 12211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 12221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 12231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 12241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)txre + MPSC_TXRE_SIZE); 12251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 12261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (!(be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O)) { 12281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 1; 12291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.tx += be16_to_cpu(txre->bytecnt); 12301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = (pi->txr_tail+1) & (MPSC_TXR_ENTRIES-1); 12311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If no more data to tx, fall out of loop */ 12331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->txr_head == pi->txr_tail) 12341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 12351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre = (struct mpsc_tx_desc *)(pi->txr + 12371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (pi->txr_tail * MPSC_TXRE_SIZE)); 12381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, 12391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds DMA_FROM_DEVICE); 12401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 12411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 12421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 12431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)txre + MPSC_TXRE_SIZE); 12441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 12451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 12461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_copy_tx_data(pi); 12481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); /* start next desc if ready */ 12491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 12501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This is the driver's interrupt handler. To avoid a race, we first clear 12561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the interrupt, then handle any completed Rx/Tx descriptors. When done 12571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * handling those descriptors, we restart the Rx/Tx engines if they're stopped. 12581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic irqreturn_t 12607d12e780e003f93433d49ce78cfedf4b4c52adc5David Howellsmpsc_sdma_intr(int irq, void *dev_id) 12611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = dev_id; 12631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong iflags; 12641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = IRQ_NONE; 12651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr[%d]: SDMA Interrupt Received\n",pi->port.line); 12671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, iflags); 12691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 12707d12e780e003f93433d49ce78cfedf4b4c52adc5David Howells if (mpsc_rx_intr(pi)) 12711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = IRQ_HANDLED; 12721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mpsc_tx_intr(pi)) 12731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = IRQ_HANDLED; 12741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, iflags); 12751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr[%d]: SDMA Interrupt Handled\n", pi->port.line); 12771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 12821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * serial_core.c Interface routines 12841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 12861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic uint 12881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_tx_empty(struct uart_port *port) 12891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong iflags; 12921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint rc; 12931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, iflags); 12951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = mpsc_sdma_tx_active(pi) ? 0 : TIOCSER_TEMT; 12961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, iflags); 12971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 13021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_set_mctrl(struct uart_port *port, uint mctrl) 13031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Have no way to set modem control lines AFAICT */ 13051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 13061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic uint 13091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_get_mctrl(struct uart_port *port) 13101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 mflags, status; 13131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds status = (pi->mirror_regs) ? pi->MPSC_CHR_10_m : 13151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_CHR_10); 13161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags = 0; 13181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (status & 0x1) 13191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags |= TIOCM_CTS; 13201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (status & 0x2) 13211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags |= TIOCM_CAR; 13221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return mflags | TIOCM_DSR; /* No way to tell if DSR asserted */ 13241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 1327b129a8ccd53f74c43e4c83c8e0031a4990040830Russell Kingmpsc_stop_tx(struct uart_port *port) 13281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1331b129a8ccd53f74c43e4c83c8e0031a4990040830Russell King pr_debug("mpsc_stop_tx[%d]\n", port->line); 13321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_freeze(pi); 13341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 13351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 1338b129a8ccd53f74c43e4c83c8e0031a4990040830Russell Kingmpsc_start_tx(struct uart_port *port) 13391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_unfreeze(pi); 13431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_copy_tx_data(pi); 13441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); 13451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1346b129a8ccd53f74c43e4c83c8e0031a4990040830Russell King pr_debug("mpsc_start_tx[%d]\n", port->line); 13471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 13481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 13511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_start_rx(struct mpsc_port_info *pi) 13521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_start_rx[%d]: Starting...\n", pi->port.line); 13541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1355f7232056bff5fe2d3bfeab35252a66ebaeb5bbdeCarlos Sanchez /* Issue a Receive Abort to clear any receive errors */ 1356f7232056bff5fe2d3bfeab35252a66ebaeb5bbdeCarlos Sanchez writel(MPSC_CHR_2_RA, pi->mpsc_base + MPSC_CHR_2); 13571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->rcv_data) { 13581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_enter_hunt(pi); 13591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_ERD); 13601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 13611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 13621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 13651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_stop_rx(struct uart_port *port) 13661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_stop_rx[%d]: Stopping...\n", port->line); 13701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_AR); 13721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 13731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 13761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_enable_ms(struct uart_port *port) 13771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; /* Not supported */ 13791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 13821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_break_ctl(struct uart_port *port, int ctl) 13831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong flags; 13861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 13871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = ctl ? 0x00ff0000 : 0; 13891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, flags); 13911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 13921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = v; 13931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_CHR_1); 13941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, flags); 13951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 13971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 14001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_startup(struct uart_port *port) 14011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 14031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 flag = 0; 14041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 14051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_startup[%d]: Starting up MPSC, irq: %d\n", 14071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds port->line, pi->port.irq); 14081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((rc = mpsc_make_ready(pi)) == 0) { 14101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Setup IRQ handler */ 14111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 14121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If irq's are shared, need to set flag */ 14141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mpsc_ports[0].port.irq == mpsc_ports[1].port.irq) 141540663cc7f1c1ccf515d8af9470925a0cb2f59b5dThomas Gleixner flag = IRQF_SHARED; 14161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (request_irq(pi->port.irq, mpsc_sdma_intr, flag, 1418a30ff2e348af9d3a1782103130c88960550a773fMark A. Greer "mpsc-sdma", pi)) 14191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Can't get SDMA IRQ %d\n", 14201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.irq); 14211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_unmask(pi, 0xf); 14231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_set_rx_ring(pi, (struct mpsc_rx_desc *)(pi->rxr_p + 14241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (pi->rxr_posn * MPSC_RXRE_SIZE))); 14251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 14281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 14311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_shutdown(struct uart_port *port) 14321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 14341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_shutdown[%d]: Shutting down MPSC\n", port->line); 14361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_stop(pi); 14381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds free_irq(pi->port.irq, pi); 14391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 14401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 14431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_set_termios(struct uart_port *port, struct termios *termios, 14441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct termios *old) 14451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 14471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 baud; 14481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong flags; 14491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 chr_bits, stop_bits, par; 14501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->c_iflag = termios->c_iflag; 14521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->c_cflag = termios->c_cflag; 14531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (termios->c_cflag & CSIZE) { 14551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS5: 14561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_5; 14571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS6: 14591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_6; 14601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS7: 14621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_7; 14631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS8: 14651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds default: 14661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_8; 14671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & CSTOPB) 14711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds stop_bits = MPSC_MPCR_SBL_2; 14721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 14731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds stop_bits = MPSC_MPCR_SBL_1; 14741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_EVEN; 14761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARENB) 14771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARODD) 14781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_ODD; 14791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CMSPAR 14801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & CMSPAR) { 14811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARODD) 14821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_MARK; 14831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 14841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_SPACE; 14851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 14871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk); 14891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, flags); 14911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_update_timeout(port, termios->c_cflag, baud); 14931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_char_length(pi, chr_bits); 14951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_stop_bit_length(pi, stop_bits); 14961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_parity(pi, par); 14971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_baudrate(pi, baud); 14981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Characters/events to read */ 15001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rcv_data = 1; 15011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.read_status_mask = SDMA_DESC_CMDSTAT_OR; 15021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & INPCK) 15041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_PE | 15051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_FR; 15061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & (BRKINT | PARMRK)) 15081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_BR; 15091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Characters/events to ignore */ 15111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask = 0; 15121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNPAR) 15141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_PE | 15151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SDMA_DESC_CMDSTAT_FR; 15161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNBRK) { 15181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_BR; 15191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNPAR) 15211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_OR; 15221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Ignore all chars if CREAD not set */ 15251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(termios->c_cflag & CREAD)) 15261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rcv_data = 0; 15271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 15281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_start_rx(pi); 15291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, flags); 15311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 15321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic const char * 15351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_type(struct uart_port *port) 15361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_type[%d]: port type: %s\n", port->line,MPSC_DRIVER_NAME); 15381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return MPSC_DRIVER_NAME; 15391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 15421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_request_port(struct uart_port *port) 15431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Should make chip/platform specific call */ 15451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 15461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 15491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_release_port(struct uart_port *port) 15501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 15521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->ready) { 15541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_uninit_rings(pi); 15551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_free_ring_mem(pi); 15561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->ready = 0; 15571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 15601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 15631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_config_port(struct uart_port *port, int flags) 15641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 15661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 15691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_verify_port(struct uart_port *port, struct serial_struct *ser) 15701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 15721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 15731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_verify_port[%d]: Verifying port data\n", pi->port.line); 15751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPSC) 15771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.irq != ser->irq) 15791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (ser->io_type != SERIAL_IO_MEM) 15811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.uartclk / 16 != ser->baud_base) /* Not sure */ 15831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if ((void *)pi->port.mapbase != ser->iomem_base) 15851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.iobase != ser->port) 15871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (ser->hub6 != 0) 15891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 15921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct uart_ops mpsc_pops = { 15951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .tx_empty = mpsc_tx_empty, 15961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .set_mctrl = mpsc_set_mctrl, 15971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .get_mctrl = mpsc_get_mctrl, 15981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .stop_tx = mpsc_stop_tx, 15991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .start_tx = mpsc_start_tx, 16001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .stop_rx = mpsc_stop_rx, 16011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .enable_ms = mpsc_enable_ms, 16021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .break_ctl = mpsc_break_ctl, 16031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .startup = mpsc_startup, 16041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .shutdown = mpsc_shutdown, 16051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .set_termios = mpsc_set_termios, 16061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .type = mpsc_type, 16071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .release_port = mpsc_release_port, 16081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .request_port = mpsc_request_port, 16091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .config_port = mpsc_config_port, 16101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .verify_port = mpsc_verify_port, 16111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 16121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 16141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 16151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 16161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Console Interface Routines 16171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 16181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 16191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 16201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_SERIAL_MPSC_CONSOLE 16221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 16231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_console_write(struct console *co, const char *s, uint count) 16241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 16251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = &mpsc_ports[co->index]; 16261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp, *dp, add_cr = 0; 16271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 16281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (mpsc_sdma_tx_active(pi)) 16301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 16311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (count > 0) { 16331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = dp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 16341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_TXBE_SIZE; i++) { 16361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (count == 0) 16371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 16381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (add_cr) { 16401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(dp++) = '\r'; 16411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add_cr = 0; 16421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 16431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 16441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(dp++) = *s; 16451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (*(s++) == '\n') { /* add '\r' after '\n' */ 16471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add_cr = 1; 16481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count++; 16491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 16501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 16511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count--; 16531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 16541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_cache_sync((void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL); 16561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 16571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 16581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)bp, 16591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (ulong)bp + MPSC_TXBE_SIZE); 16601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 16611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_setup_tx_desc(pi, i, 0); 16621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 16631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); 16641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (mpsc_sdma_tx_active(pi)) 16661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 16671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = (pi->txr_tail + 1) & (MPSC_TXR_ENTRIES - 1); 16691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 16701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 16721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 16731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int __init 16751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_console_setup(struct console *co, char *options) 16761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 16771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi; 16781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int baud, bits, parity, flow; 16791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_console_setup[%d]: options: %s\n", co->index, options); 16811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (co->index >= MPSC_NUM_CTLRS) 16831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds co->index = 0; 16841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi = &mpsc_ports[co->index]; 16861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds baud = pi->default_baud; 16881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bits = pi->default_bits; 16891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds parity = pi->default_parity; 16901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flow = pi->default_flow; 16911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->port.ops) 16931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENODEV; 16941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_init(&pi->port.lock); /* Temporary fix--copied from 8250.c */ 16961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (options) 16981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_parse_options(options, &baud, &parity, &bits, &flow); 16991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return uart_set_options(&pi->port, co, baud, parity, bits, flow); 17011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct console mpsc_console = { 17041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .name = MPSC_DEV_NAME, 17051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .write = mpsc_console_write, 17061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .device = uart_console_device, 17071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .setup = mpsc_console_setup, 17081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .flags = CON_PRINTBUFFER, 17091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .index = -1, 17101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .data = &mpsc_reg, 17111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 17121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int __init 17141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_late_console_init(void) 17151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_late_console_init: Enter\n"); 17171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(mpsc_console.flags & CON_ENABLED)) 17191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds register_console(&mpsc_console); 17201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 17211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldslate_initcall(mpsc_late_console_init); 17241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_CONSOLE &mpsc_console 17261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 17271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_CONSOLE NULL 17281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 17291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 17301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 17311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 17321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Dummy Platform Driver to extract & map shared register regions 17331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 17341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 17351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 17361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 17371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_resource_err(char *s) 17381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_WARNING "MPSC: Platform device resource error in %s\n", s); 17401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 17411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 17441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_shared_map_regs(struct platform_device *pd) 17451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct resource *r; 17471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 17491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_ROUTING_BASE_ORDER)) && request_mem_region(r->start, 17501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_ROUTING_REG_BLOCK_SIZE, "mpsc_routing_regs")) { 17511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base = ioremap(r->start, 17531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_ROUTING_REG_BLOCK_SIZE); 17541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base_p = r->start; 17551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 17571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("MPSC routing base"); 17581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 17591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 17621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_INTR_BASE_ORDER)) && request_mem_region(r->start, 17631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_INTR_REG_BLOCK_SIZE, "sdma_intr_regs")) { 17641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base = ioremap(r->start, 17661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_INTR_REG_BLOCK_SIZE); 17671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base_p = r->start; 17681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 17701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.mpsc_routing_base); 17711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 17721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_ROUTING_REG_BLOCK_SIZE); 17731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("SDMA intr base"); 17741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 17751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 17781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 17811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_shared_unmap_regs(void) 17821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_shared_regs.mpsc_routing_base) { 17841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.mpsc_routing_base); 17851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 17861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_ROUTING_REG_BLOCK_SIZE); 17871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_shared_regs.sdma_intr_base) { 17891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.sdma_intr_base); 17901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.sdma_intr_base_p, 17911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_INTR_REG_BLOCK_SIZE); 17921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17942c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_shared_regs.mpsc_routing_base = NULL; 17952c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_shared_regs.sdma_intr_base = NULL; 17961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base_p = 0; 17981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base_p = 0; 17991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 18011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 18043ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingmpsc_shared_drv_probe(struct platform_device *dev) 18051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_shared_pdata *pdata; 18071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 18081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18093ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id == 0) { 18103ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (!(rc = mpsc_shared_map_regs(dev))) { 18113ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pdata = (struct mpsc_shared_pdata *)dev->dev.platform_data; 18121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_MRR_m = pdata->mrr_val; 18141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_RCRR_m= pdata->rcrr_val; 18151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_TCRR_m= pdata->tcrr_val; 18161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_CAUSE_m = 18171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata->intr_cause_val; 18181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_MASK_m = 18191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata->intr_mask_val; 18201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 18221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 18261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 18293ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingmpsc_shared_drv_remove(struct platform_device *dev) 18301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 18321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18333ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id == 0) { 18341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_unmap_regs(); 18351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_MRR_m = 0; 18361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_RCRR_m = 0; 18371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_TCRR_m = 0; 18381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_CAUSE_m = 0; 18391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_MASK_m = 0; 18401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 18411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 18441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18463ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingstatic struct platform_driver mpsc_shared_driver = { 18471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .probe = mpsc_shared_drv_probe, 18481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .remove = mpsc_shared_drv_remove, 18493ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .driver = { 18503ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .name = MPSC_SHARED_NAME, 18513ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King }, 18521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 18531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 18551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 18561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 18571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Driver Interface Routines 18581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 18591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 18601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 18611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct uart_driver mpsc_reg = { 18621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .owner = THIS_MODULE, 18631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .driver_name = MPSC_DRIVER_NAME, 18641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .dev_name = MPSC_DEV_NAME, 18651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .major = MPSC_MAJOR, 18661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .minor = MPSC_MINOR_START, 18671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .nr = MPSC_NUM_CTLRS, 18681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .cons = MPSC_CONSOLE, 18691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 18701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 18721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_drv_map_regs(struct mpsc_port_info *pi, struct platform_device *pd) 18731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct resource *r; 18751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, MPSC_BASE_ORDER)) && 18771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds request_mem_region(r->start, MPSC_REG_BLOCK_SIZE, "mpsc_regs")){ 18781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base = ioremap(r->start, MPSC_REG_BLOCK_SIZE); 18801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base_p = r->start; 18811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 18831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("MPSC base"); 18841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 18851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 18881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_BASE_ORDER)) && request_mem_region(r->start, 18891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_REG_BLOCK_SIZE, "sdma_regs")) { 18901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base = ioremap(r->start,MPSC_SDMA_REG_BLOCK_SIZE); 18921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base_p = r->start; 18931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 18951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("SDMA base"); 1896a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->mpsc_base) { 1897a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->mpsc_base); 1898a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->mpsc_base = NULL; 1899a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 19001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 19011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd,IORESOURCE_MEM,MPSC_BRG_BASE_ORDER)) 19041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds && request_mem_region(r->start, MPSC_BRG_REG_BLOCK_SIZE, 19051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds "brg_regs")) { 19061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base = ioremap(r->start, MPSC_BRG_REG_BLOCK_SIZE); 19081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base_p = r->start; 19091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 19111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("BRG base"); 1912a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->mpsc_base) { 1913a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->mpsc_base); 1914a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->mpsc_base = NULL; 1915a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 1916a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->sdma_base) { 1917a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->sdma_base); 1918a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->sdma_base = NULL; 1919a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 19201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 19211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 19241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 19271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_drv_unmap_regs(struct mpsc_port_info *pi) 19281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->mpsc_base) { 19301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->mpsc_base); 19311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->mpsc_base_p, MPSC_REG_BLOCK_SIZE); 19321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->sdma_base) { 19341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->sdma_base); 19351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->sdma_base_p, MPSC_SDMA_REG_BLOCK_SIZE); 19361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->brg_base) { 19381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->brg_base); 19391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->brg_base_p, MPSC_BRG_REG_BLOCK_SIZE); 19401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19422c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->mpsc_base = NULL; 19432c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->sdma_base = NULL; 19442c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->brg_base = NULL; 19451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base_p = 0; 19471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base_p = 0; 19481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base_p = 0; 19491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 19511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void 19541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_drv_get_platform_data(struct mpsc_port_info *pi, 19551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct platform_device *pd, int num) 19561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_pdata *pdata; 19581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata = (struct mpsc_pdata *)pd->dev.platform_data; 19601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.uartclk = pdata->brg_clk_freq; 19621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.iotype = UPIO_MEM; 19631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line = num; 19641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.type = PORT_MPSC; 19651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.fifosize = MPSC_TXBE_SIZE; 19661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.membase = pi->mpsc_base; 19671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.mapbase = (ulong)pi->mpsc_base; 19681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ops = &mpsc_pops; 19691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mirror_regs = pdata->mirror_regs; 19711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->cache_mgmt = pdata->cache_mgmt; 19721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_can_tune = pdata->brg_can_tune; 19731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_clk_src = pdata->brg_clk_src; 19741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_max_idle = pdata->max_idle; 19751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_baud = pdata->default_baud; 19761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_bits = pdata->default_bits; 19771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_parity = pdata->default_parity; 19781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_flow = pdata->default_flow; 19791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Initial values of mirrored regs */ 19811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = pdata->chr_1_val; 19821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = pdata->chr_2_val; 19831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_10_m = pdata->chr_10_val; 19841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = pdata->mpcr_val; 19851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = pdata->bcr_val; 19861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs = &mpsc_shared_regs; 19881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.irq = platform_get_irq(pd, 0); 19901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 19921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 19953ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingmpsc_drv_probe(struct platform_device *dev) 19961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi; 19981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 19991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20003ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pr_debug("mpsc_drv_probe: Adding MPSC %d\n", dev->id); 20011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20023ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id < MPSC_NUM_CTLRS) { 20033ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pi = &mpsc_ports[dev->id]; 20041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20053ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (!(rc = mpsc_drv_map_regs(pi, dev))) { 20063ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King mpsc_drv_get_platform_data(pi, dev, dev->id); 20071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(rc = mpsc_make_ready(pi))) 20091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(rc = uart_add_one_port(&mpsc_reg, 20101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds &pi->port))) 20111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 20121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 20131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_release_port( 20141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (struct uart_port *)pi); 20151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_drv_unmap_regs(pi); 20161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 20181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_drv_unmap_regs(pi); 20191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 20231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int 20263ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingmpsc_drv_remove(struct platform_device *dev) 20271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 20283ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pr_debug("mpsc_drv_exit: Removing MPSC %d\n", dev->id); 20291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20303ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id < MPSC_NUM_CTLRS) { 20313ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King uart_remove_one_port(&mpsc_reg, &mpsc_ports[dev->id].port); 20323ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King mpsc_release_port((struct uart_port *)&mpsc_ports[dev->id].port); 20333ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King mpsc_drv_unmap_regs(&mpsc_ports[dev->id]); 20341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 20351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 20371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENODEV; 20381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20403ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingstatic struct platform_driver mpsc_driver = { 20411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .probe = mpsc_drv_probe, 20421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .remove = mpsc_drv_remove, 20433ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .driver = { 20443ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .name = MPSC_CTLR_NAME, 20453ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King }, 20461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 20471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic int __init 20491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_drv_init(void) 20501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 20511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 20521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Serial: MPSC driver $Revision: 1.00 $\n"); 20541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(mpsc_ports, 0, sizeof(mpsc_ports)); 20561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); 20571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(rc = uart_register_driver(&mpsc_reg))) { 20593ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (!(rc = platform_driver_register(&mpsc_shared_driver))) { 20603ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if ((rc = platform_driver_register(&mpsc_driver))) { 20613ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_shared_driver); 20621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 20631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 20661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 20671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 20681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 20701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic void __exit 20741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmpsc_drv_exit(void) 20751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 20763ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_driver); 20773ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_shared_driver); 20781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 20791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(mpsc_ports, 0, sizeof(mpsc_ports)); 20801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); 20811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 20821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_init(mpsc_drv_init); 20851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_exit(mpsc_drv_exit); 20861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_AUTHOR("Mark A. Greer <mgreer@mvista.com>"); 20881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_DESCRIPTION("Generic Marvell MPSC serial/UART driver $Revision: 1.00 $"); 20891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_VERSION(MPSC_VERSION); 20901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_LICENSE("GPL"); 20911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_ALIAS_CHARDEV_MAJOR(MPSC_MAJOR); 2092