mpsc.c revision e169c139642fb4c682ec12a409725508dbefa520
11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Generic driver for the MPSC (UART mode) on Marvell parts (e.g., GT64240, 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * GT64260, MV64340, MV64360, GT96100, ... ). 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Author: Mark A. Greer <mgreer@mvista.com> 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Based on an old MPSC driver that was in the linuxppc tree. It appears to 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * have been created by Chris Zankel (formerly of MontaVista) but there 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * is no proper Copyright so I'm not sure. Apparently, parts were also 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * taken from PPCBoot (now U-Boot). Also based on drivers/serial/8250.c 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * by Russell King. 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2004 (c) MontaVista, Software, Inc. This file is licensed under 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the terms of the GNU General Public License version 2. This program 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * is licensed "as is" without any warranty of any kind, whether express 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * or implied. 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The MPSC interface is much like a typical network controller's interface. 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * That is, you set up separate rings of descriptors for transmitting and 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * receiving data. There is also a pool of buffers with (one buffer per 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * descriptor) that incoming data are dma'd into or outgoing data are dma'd 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * out of. 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The MPSC requires two other controllers to be able to work. The Baud Rate 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Generator (BRG) provides a clock at programmable frequencies which determines 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the baud rate. The Serial DMA Controller (SDMA) takes incoming data from the 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MPSC and DMA's it into memory or DMA's outgoing data and passes it to the 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MPSC. It is actually the SDMA interrupt that the driver uses to keep the 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * transmit and receive "engines" going (i.e., indicate data has been 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * transmitted or received). 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * NOTES: 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 1) Some chips have an erratum where several regs cannot be 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * read. To work around that, we keep a local copy of those regs in 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 'mpsc_port_info'. 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 2) Some chips have an erratum where the ctlr will hang when the SDMA ctlr 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * accesses system mem with coherency enabled. For that reason, the driver 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * assumes that coherency for that ctlr has been disabled. This means 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * that when in a cache coherent system, the driver has to manually manage 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the data cache on the areas that it touches because the dma_* macro are 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * basically no-ops. 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3) There is an erratum (on PPC) where you can't use the instruction to do 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * a DMA_TO_DEVICE/cache clean so DMA_BIDIRECTIONAL/flushes are used in places 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * where a DMA_TO_DEVICE/clean would have [otherwise] sufficed. 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4) AFAICT, hardware flow control isn't supported by the controller --MAG. 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 53e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 54e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#if defined(CONFIG_SERIAL_MPSC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 55e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SUPPORT_SYSRQ 56e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#endif 57e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 58e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/module.h> 59e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/moduleparam.h> 60e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/tty.h> 61e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/tty_flip.h> 62e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/ioport.h> 63e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/init.h> 64e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/console.h> 65e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/sysrq.h> 66e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/serial.h> 67e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/serial_core.h> 68e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/delay.h> 69e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/device.h> 70e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/dma-mapping.h> 71e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <linux/mv643xx.h> 72d052d1beff706920e82c5d55006b08e256b5df09Russell King#include <linux/platform_device.h> 73d052d1beff706920e82c5d55006b08e256b5df09Russell King 74e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <asm/io.h> 75e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#include <asm/irq.h> 76e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 77e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_NUM_CTLRS 2 78e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 79e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* 80e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Descriptors and buffers must be cache line aligned. 81e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Buffers lengths must be multiple of cache line size. 82e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Number of Tx & Rx descriptors must be powers of 2. 83e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer */ 84e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXR_ENTRIES 32 85e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXRE_SIZE dma_get_cache_alignment() 86e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXR_SIZE (MPSC_RXR_ENTRIES * MPSC_RXRE_SIZE) 87e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXBE_SIZE dma_get_cache_alignment() 88e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RXB_SIZE (MPSC_RXR_ENTRIES * MPSC_RXBE_SIZE) 89e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 90e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXR_ENTRIES 32 91e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXRE_SIZE dma_get_cache_alignment() 92e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXR_SIZE (MPSC_TXR_ENTRIES * MPSC_TXRE_SIZE) 93e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXBE_SIZE dma_get_cache_alignment() 94e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TXB_SIZE (MPSC_TXR_ENTRIES * MPSC_TXBE_SIZE) 95e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_DMA_ALLOC_SIZE (MPSC_RXR_SIZE + MPSC_RXB_SIZE + MPSC_TXR_SIZE \ 972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + MPSC_TXB_SIZE + dma_get_cache_alignment() /* for alignment */) 98e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 99e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Rx and Tx Ring entry descriptors -- assume entry size is <= cacheline size */ 100e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_rx_desc { 101e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bufsize; 102e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bytecnt; 103e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 cmdstat; 104e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 link; 105e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 buf_ptr; 106e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer} __attribute((packed)); 107e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 108e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_tx_desc { 109e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 bytecnt; 110e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 shadow; 111e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 cmdstat; 112e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 link; 113e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 buf_ptr; 114e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer} __attribute((packed)); 115e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 116e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* 117e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * Some regs that have the erratum that you can't read them are are shared 118e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer * between the two MPSC controllers. This struct contains those shared regs. 119e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer */ 120e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_shared_regs { 121e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t mpsc_routing_base_p; 122e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t sdma_intr_base_p; 123e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 124e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *mpsc_routing_base; 125e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *sdma_intr_base; 126e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 127e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_MRR_m; 128e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_RCRR_m; 129e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_TCRR_m; 130e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 SDMA_INTR_CAUSE_m; 131e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 SDMA_INTR_MASK_m; 132e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer}; 133e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 134e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* The main driver data structure */ 135e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info { 136e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer struct uart_port port; /* Overlay uart_port structure */ 137e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 138e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Internal driver state for this ctlr */ 139e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 ready; 140e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 rcv_data; 141e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer tcflag_t c_iflag; /* save termios->c_iflag */ 142e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer tcflag_t c_cflag; /* save termios->c_cflag */ 143e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 144e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Info passed in from platform */ 145e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 mirror_regs; /* Need to mirror regs? */ 146e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 cache_mgmt; /* Need manual cache mgmt? */ 147e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 brg_can_tune; /* BRG has baud tuning? */ 148e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 brg_clk_src; 149e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u16 mpsc_max_idle; 150e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_baud; 151e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_bits; 152e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_parity; 153e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int default_flow; 154e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 155e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Physical addresses of various blocks of registers (from platform) */ 156e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t mpsc_base_p; 157e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t sdma_base_p; 158e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer phys_addr_t brg_base_p; 159e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 160e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Virtual addresses of various blocks of registers (from platform) */ 161e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *mpsc_base; 162e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *sdma_base; 163e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void __iomem *brg_base; 164e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 165e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Descriptor ring and buffer allocations */ 166e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer void *dma_region; 167e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t dma_region_p; 168e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 169e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t rxr; /* Rx descriptor ring */ 170e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t rxr_p; /* Phys addr of rxr */ 171e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *rxb; /* Rx Ring I/O buf */ 172e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *rxb_p; /* Phys addr of rxb */ 173e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 rxr_posn; /* First desc w/ Rx data */ 174e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 175e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t txr; /* Tx descriptor ring */ 176e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer dma_addr_t txr_p; /* Phys addr of txr */ 177e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *txb; /* Tx Ring I/O buf */ 178e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u8 *txb_p; /* Phys addr of txb */ 179e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int txr_head; /* Where new data goes */ 180e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer int txr_tail; /* Where sent data comes off */ 1811733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spinlock_t tx_lock; /* transmit lock */ 182e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 183e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer /* Mirrored values of regs we can't read (if 'mirror_regs' set) */ 184e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_MPCR_m; 185e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_1_m; 186e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_2_m; 187e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 MPSC_CHR_10_m; 188e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer u32 BRG_BCR_m; 189e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer struct mpsc_shared_regs *shared_regs; 190e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer}; 191e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 192e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Hooks to platform-specific code */ 193e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerint mpsc_platform_register_driver(void); 194e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greervoid mpsc_platform_unregister_driver(void); 195e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 196e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Hooks back in to mpsc common to be called by platform-specific code */ 197e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info *mpsc_device_probe(int index); 198e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greerstruct mpsc_port_info *mpsc_device_remove(int index); 199e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 200e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Main MPSC Configuration Register Offsets */ 201e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MMCRL 0x0000 202e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MMCRH 0x0004 203e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR 0x0008 204e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_1 0x000c 205e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2 0x0010 206e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_3 0x0014 207e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_4 0x0018 208e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_5 0x001c 209e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_6 0x0020 210e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_7 0x0024 211e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_8 0x0028 212e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_9 0x002c 213e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_10 0x0030 214e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_11 0x0034 215e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 216e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_FRZ (1 << 9) 217e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_5 0 218e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_6 1 219e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_7 2 220e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_CL_8 3 221e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_SBL_1 0 222e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MPCR_SBL_2 1 223e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 224e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TEV (1<<1) 225e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TA (1<<7) 226e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_TTCS (1<<9) 227e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_REV (1<<17) 228e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_RA (1<<23) 229e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_CRD (1<<25) 230e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_EH (1<<31) 231e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_ODD 0 232e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_SPACE 1 233e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_EVEN 2 234e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_CHR_2_PAR_MARK 3 235e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 236e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* MPSC Signal Routing */ 237e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_MRR 0x0000 238e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_RCRR 0x0004 239e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define MPSC_TCRR 0x0008 240e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 241e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Serial DMA Controller Interface Registers */ 242e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC 0x0000 243e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM 0x0008 244e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_RX_DESC 0x0800 245e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_RX_BUF_PTR 0x0808 246e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SCRDP 0x0810 247e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_TX_DESC 0x0c00 248e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SCTDP 0x0c10 249e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SFTDP 0x0c14 250e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 251e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_PE (1<<0) 252e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_CDL (1<<1) 253e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_FR (1<<3) 254e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_OR (1<<6) 255e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_BR (1<<9) 256e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_MI (1<<10) 257e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_A (1<<11) 258e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_AM (1<<12) 259e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_CT (1<<13) 260e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_C (1<<14) 261e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_ES (1<<15) 262e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_L (1<<16) 263e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_F (1<<17) 264e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_P (1<<18) 265e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_EI (1<<23) 266e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_DESC_CMDSTAT_O (1<<31) 267e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 2682e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O \ 2692e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_EI) 270e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 271e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_RFT (1<<0) 272e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_SFM (1<<1) 273e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_BLMR (1<<6) 274e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_BLMT (1<<7) 275e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_POVR (1<<8) 276e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDC_RIFB (1<<9) 277e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 278e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_ERD (1<<7) 279e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_AR (1<<15) 280e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_STD (1<<16) 281e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_TXD (1<<23) 282e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_SDCM_AT (1<<31) 283e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 284e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_RXBUF (1<<0) 285e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_RXERR (1<<1) 286e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_TXBUF (1<<2) 287e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_0_CAUSE_TXEND (1<<3) 288e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_RXBUF (1<<8) 289e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_RXERR (1<<9) 290e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_TXBUF (1<<10) 291e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_1_CAUSE_TXEND (1<<11) 292e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 2932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR \ 2942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR) 2952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND \ 2962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND) 297e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 298e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* SDMA Interrupt registers */ 299e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_INTR_CAUSE 0x0000 300e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define SDMA_INTR_MASK 0x0080 301e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer 302e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer/* Baud Rate Generator Interface Registers */ 303e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define BRG_BCR 0x0000 304e4294b3ecd1da9abeb66709c89f71b1ba888b3b1Mark A. Greer#define BRG_BTR 0x0004 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Define how this driver is known to the outside (we've been assigned a 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * range on the "Low-density serial ports" major). 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3102e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_MAJOR 204 3112e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_MINOR_START 44 3122e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_DRIVER_NAME "MPSC" 3132e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_DEV_NAME "ttyMM" 3142e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer#define MPSC_VERSION "1.00" 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct mpsc_port_info mpsc_ports[MPSC_NUM_CTLRS]; 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct mpsc_shared_regs mpsc_shared_regs; 3184d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic struct uart_driver mpsc_reg; 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3204d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_start_rx(struct mpsc_port_info *pi); 3214d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_free_ring_mem(struct mpsc_port_info *pi); 3224d0145a7deab4027a0f0a7de74c2d103b8f029cfLee Nicksstatic void mpsc_release_port(struct uart_port *port); 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Baud Rate Generator Routines (BRG) 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3302e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_brg_init(struct mpsc_port_info *pi, u32 clk_src) 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(0xf << 18)) | ((clk_src & 0xf) << 18); 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->brg_can_tune) 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~(1 << 25); 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(readl(pi->brg_base + BRG_BTR) & 0xffff0000, 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base + BRG_BTR); 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3482e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_brg_enable(struct mpsc_port_info *pi) 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= (1 << 16); 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3602e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_brg_disable(struct mpsc_port_info *pi) 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~(1 << 16); 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer/* 3732e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * To set the baud, we adjust the CDV field in the BRG_BCR reg. 3742e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * From manual: Baud = clk / ((CDV+1)*2) ==> CDV = (clk / (baud*2)) - 1. 3752e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * However, the input clock is divided by 16 in the MPSC b/c of how 3762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * 'MPSC_MMCRH' was set up so we have to divide the 'clk' used in our 3772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * calculation by 16 to account for that. So the real calculation 3782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * that accounts for the way the mpsc is set up is: 3792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer * CDV = (clk / (baud*2*16)) - 1 ==> CDV = (clk / (baud << 5)) - 1. 3802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer */ 3812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_baudrate(struct mpsc_port_info *pi, u32 baud) 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 cdv = (pi->port.uartclk / (baud << 5)) - 1; 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_disable(pi); 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->BRG_BCR_m : readl(pi->brg_base + BRG_BCR); 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & 0xffff0000) | (cdv & 0xffff); 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = v; 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->brg_base + BRG_BCR); 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_enable(pi); 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Serial DMA Routines (SDMA) 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4042e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_burstsize(struct mpsc_port_info *pi, u32 burst_size) 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_burstsize[%d]: burst_size: %d\n", 4092e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.line, burst_size); 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds burst_size >>= 3; /* Divide by 8 b/c reg values are 8-byte chunks */ 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (burst_size < 2) 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x0; /* 1 64-bit word */ 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (burst_size < 4) 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x1; /* 2 64-bit words */ 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (burst_size < 8) 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x2; /* 4 64-bit words */ 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0x3; /* 8 64-bit words */ 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((readl(pi->sdma_base + SDMA_SDC) & (0x3 << 12)) | (v << 12), 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base + SDMA_SDC); 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4262e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_init(struct mpsc_port_info *pi, u32 burst_size) 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_init[%d]: burst_size: %d\n", pi->port.line, 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds burst_size); 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((readl(pi->sdma_base + SDMA_SDC) & 0x3ff) | 0x03f, 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base + SDMA_SDC); 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_burstsize(pi, burst_size); 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4362e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic u32 mpsc_sdma_intr_mask(struct mpsc_port_info *pi, u32 mask) 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 old, v; 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_mask[%d]: mask: 0x%x\n", pi->port.line, mask); 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds old = v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m : 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask &= 0xf; 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask <<= 8; 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~mask; 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_MASK_m = v; 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds old >>= 8; 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return old & 0xf; 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4592e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_intr_unmask(struct mpsc_port_info *pi, u32 mask) 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 4621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_unmask[%d]: mask: 0x%x\n", pi->port.line,mask); 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4652e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m 4662e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer : readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask &= 0xf; 4691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.line) 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mask <<= 8; 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= mask; 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_MASK_m = v; 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_intr_ack(struct mpsc_port_info *pi) 4791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr_ack[%d]: Acknowledging IRQ\n", pi->port.line); 4811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->SDMA_INTR_CAUSE_m = 0; 4842e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer writeb(0x00, pi->shared_regs->sdma_intr_base + SDMA_INTR_CAUSE 4852e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + pi->port.line); 4861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_set_rx_ring(struct mpsc_port_info *pi, 4892e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct mpsc_rx_desc *rxre_p) 4901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_set_rx_ring[%d]: rxre_p: 0x%x\n", 4922e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.line, (u32)rxre_p); 4931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)rxre_p, pi->sdma_base + SDMA_SCRDP); 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_set_tx_ring(struct mpsc_port_info *pi, 4982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct mpsc_tx_desc *txre_p) 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)txre_p, pi->sdma_base + SDMA_SFTDP); 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((u32)txre_p, pi->sdma_base + SDMA_SCTDP); 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5042e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_cmd(struct mpsc_port_info *pi, u32 val) 5051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->sdma_base + SDMA_SDCM); 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (val) 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= val; 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = 0; 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->sdma_base + SDMA_SDCM); 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5182e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic uint mpsc_sdma_tx_active(struct mpsc_port_info *pi) 5191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_TXD; 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5232e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_start_tx(struct mpsc_port_info *pi) 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre, *txre_p; 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If tx isn't running & there's a desc ready to go, start it */ 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_sdma_tx_active(pi)) { 5292e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 5302e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_tail * MPSC_TXRE_SIZE)); 5312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, 5322e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 5362e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O) { 5402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre_p = (struct mpsc_tx_desc *) 5412e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (pi->txr_p + (pi->txr_tail * MPSC_TXRE_SIZE)); 5421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_set_tx_ring(pi, txre_p); 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_STD | SDMA_SDCM_TXD); 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5492e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_sdma_stop(struct mpsc_port_info *pi) 5501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_stop[%d]: Stopping SDMA\n", pi->port.line); 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Abort any SDMA transfers */ 5541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, 0); 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_AR | SDMA_SDCM_AT); 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Clear the SDMA current and first TX and RX pointers */ 5582c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_sdma_set_tx_ring(pi, NULL); 5592c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_sdma_set_rx_ring(pi, NULL); 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Disable interrupts */ 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_mask(pi, 0xf); 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Multi-Protocol Serial Controller Routines (MPSC) 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5742e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_hw_init(struct mpsc_port_info *pi) 5751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_hw_init[%d]: Initializing hardware\n", pi->port.line); 5791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Set up clock routing */ 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_MRR_m; 5831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~0x1c7; 5841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_MRR_m = v; 5851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR); 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_RCRR_m; 5881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 5891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_RCRR_m = v; 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 5911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = pi->shared_regs->MPSC_TCRR_m; 5931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 5941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs->MPSC_TCRR_m = v; 5951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 5962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 5971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_MRR); 5981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~0x1c7; 5991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR); 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_RCRR); 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = readl(pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xf0f) | 0x100; 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 6081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Put MPSC in UART mode & enabel Tx/Rx egines */ 6111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0x000004c4, pi->mpsc_base + MPSC_MMCRL); 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6132e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer /* No preamble, 16x divider, low-latency, */ 6141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0x04400400, pi->mpsc_base + MPSC_MMCRH); 6157bbdc3d51cf793dd81c38f794f4cb73df58d1527Mark A. Greer mpsc_set_baudrate(pi, pi->default_baud); 6161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = 0; 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = 0; 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_1); 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_2); 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(pi->mpsc_max_idle, pi->mpsc_base + MPSC_CHR_3); 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_4); 6251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_5); 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_6); 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_7); 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_8); 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_9); 6301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(0, pi->mpsc_base + MPSC_CHR_10); 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6332e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_enter_hunt(struct mpsc_port_info *pi) 6341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_enter_hunt[%d]: Hunting...\n", pi->port.line); 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) { 6381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(pi->MPSC_CHR_2_m | MPSC_CHR_2_EH, 6391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base + MPSC_CHR_2); 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Erratum prevents reading CHR_2 so just delay for a while */ 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 6422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 6431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_EH, 6442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->mpsc_base + MPSC_CHR_2); 6451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_EH) 6471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6512e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_freeze(struct mpsc_port_info *pi) 6521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_freeze[%d]: Freezing\n", pi->port.line); 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v |= MPSC_MPCR_FRZ; 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 6621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 6631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6662e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_unfreeze(struct mpsc_port_info *pi) 6671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 6711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 6721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v &= ~MPSC_MPCR_FRZ; 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_unfreeze[%d]: Unfrozen\n", pi->port.line); 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_char_length(struct mpsc_port_info *pi, u32 len) 6821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_char_length[%d]: char len: %d\n", pi->port.line,len); 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 6881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 6891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(0x3 << 12)) | ((len & 0x3) << 12); 6901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 6921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 6931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 6941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_stop_bit_length(struct mpsc_port_info *pi, u32 len) 6971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 6981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 6991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_stop_bit_length[%d]: stop bits: %d\n", 7011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line, len); 7021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_MPCR_m : 7041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_MPCR); 7051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~(1 << 14)) | ((len & 0x1) << 14); 7071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = v; 7101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_MPCR); 7111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7132e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_parity(struct mpsc_port_info *pi, u32 p) 7141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 7161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_set_parity[%d]: parity bits: 0x%x\n", pi->port.line, p); 7181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (pi->mirror_regs) ? pi->MPSC_CHR_2_m : 7201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds readl(pi->mpsc_base + MPSC_CHR_2); 7211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds p &= 0x3; 7231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = (v & ~0xc000c) | (p << 18) | (p << 2); 7241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 7261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = v; 7271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_CHR_2); 7281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 7321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Driver Init Routines 7341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 7351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 7361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_init_hw(struct mpsc_port_info *pi) 7391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_init_hw[%d]: Initializing\n", pi->port.line); 7411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_init(pi, pi->brg_clk_src); 7431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_brg_enable(pi); 7441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_init(pi, dma_get_cache_alignment()); /* burst a cacheline */ 7451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_stop(pi); 7461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_hw_init(pi); 7471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7492e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_alloc_ring_mem(struct mpsc_port_info *pi) 7501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 7521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_alloc_ring_mem[%d]: Allocating ring mem\n", 7541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line); 7551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->dma_region) { 7571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!dma_supported(pi->port.dev, 0xffffffff)) { 7581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Inadequate DMA support\n"); 7591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -ENXIO; 7602e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if ((pi->dma_region = dma_alloc_noncoherent(pi->port.dev, 7612e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_DMA_ALLOC_SIZE, 7622e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer &pi->dma_region_p, GFP_KERNEL)) 7632e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer == NULL) { 7641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Can't alloc Desc region\n"); 7651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -ENOMEM; 7661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 7671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 7681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 7701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_free_ring_mem(struct mpsc_port_info *pi) 7731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_free_ring_mem[%d]: Freeing ring mem\n", pi->port.line); 7751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->dma_region) { 7771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_free_noncoherent(pi->port.dev, MPSC_DMA_ALLOC_SIZE, 7782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->dma_region, pi->dma_region_p); 7791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->dma_region = NULL; 7802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->dma_region_p = (dma_addr_t)NULL; 7811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 7821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7842e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_init_rings(struct mpsc_port_info *pi) 7851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 7861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_rx_desc *rxre; 7871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 7881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t dp, dp_p; 7891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp, *bp_p; 7901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 7911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_init_rings[%d]: Initializing rings\n", pi->port.line); 7931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG_ON(pi->dma_region == NULL); 7951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(pi->dma_region, 0, MPSC_DMA_ALLOC_SIZE); 7971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 7991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Descriptors & buffers are multiples of cacheline size and must be 8001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * cacheline aligned. 8011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8022e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dp = ALIGN((u32)pi->dma_region, dma_get_cache_alignment()); 8032e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dp_p = ALIGN((u32)pi->dma_region_p, dma_get_cache_alignment()); 8041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 8061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Partition dma region into rx ring descriptor, rx buffers, 8071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * tx ring descriptors, and tx buffers. 8081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr = dp; 8101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_p = dp_p; 8111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXR_SIZE; 8121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXR_SIZE; 8131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8142e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->rxb = (u8 *)dp; 8152e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->rxb_p = (u8 *)dp_p; 8161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXB_SIZE; 8171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXB_SIZE; 8181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = 0; 8201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr = dp; 8221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_p = dp_p; 8231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_TXR_SIZE; 8241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_TXR_SIZE; 8251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8262e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->txb = (u8 *)dp; 8272e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->txb_p = (u8 *)dp_p; 8281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = 0; 8301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = 0; 8311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Init rx ring descriptors */ 8331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp = pi->rxr; 8341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p = pi->rxr_p; 8351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->rxb; 8361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p = pi->rxb_p; 8371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_RXR_ENTRIES; i++) { 8391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre = (struct mpsc_rx_desc *)dp; 8401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bufsize = cpu_to_be16(MPSC_RXBE_SIZE); 8421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bytecnt = cpu_to_be16(0); 8432e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O 8442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_EI | SDMA_DESC_CMDSTAT_F 8452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_L); 8461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->link = cpu_to_be32(dp_p + MPSC_RXRE_SIZE); 8471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->buf_ptr = cpu_to_be32(bp_p); 8481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_RXRE_SIZE; 8501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_RXRE_SIZE; 8511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp += MPSC_RXBE_SIZE; 8521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p += MPSC_RXBE_SIZE; 8531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->link = cpu_to_be32(pi->rxr_p); /* Wrap last back to first */ 8551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Init tx ring descriptors */ 8571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp = pi->txr; 8581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p = pi->txr_p; 8591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb; 8601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p = pi->txb_p; 8611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_TXR_ENTRIES; i++) { 8631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre = (struct mpsc_tx_desc *)dp; 8641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->link = cpu_to_be32(dp_p + MPSC_TXRE_SIZE); 8661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->buf_ptr = cpu_to_be32(bp_p); 8671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp += MPSC_TXRE_SIZE; 8691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dp_p += MPSC_TXRE_SIZE; 8701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp += MPSC_TXBE_SIZE; 8711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp_p += MPSC_TXBE_SIZE; 8721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 8731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->link = cpu_to_be32(pi->txr_p); /* Wrap last back to first */ 8741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8752e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)pi->dma_region, 8762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_DMA_ALLOC_SIZE, DMA_BIDIRECTIONAL); 8771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 8781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 8791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)pi->dma_region, 8802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)pi->dma_region 8812e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + MPSC_DMA_ALLOC_SIZE); 8821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 8831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 8851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 8861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_uninit_rings(struct mpsc_port_info *pi) 8881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 8891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_uninit_rings[%d]: Uninitializing rings\n",pi->port.line); 8901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG_ON(pi->dma_region == NULL); 8921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr = 0; 8941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_p = 0; 8951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb = NULL; 8961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxb_p = NULL; 8971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = 0; 8981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr = 0; 9001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_p = 0; 9011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb = NULL; 9021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txb_p = NULL; 9031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = 0; 9041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = 0; 9051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 9061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9072e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_make_ready(struct mpsc_port_info *pi) 9081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 9091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 9101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_make_ready[%d]: Making cltr ready\n", pi->port.line); 9121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->ready) { 9141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_init_hw(pi); 9151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((rc = mpsc_alloc_ring_mem(pi))) 9161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 9171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_init_rings(pi); 9181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->ready = 1; 9191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 9201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 9221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 9231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 9261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Interrupt Handling Routines 9281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 9291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 9301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9322e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_rx_intr(struct mpsc_port_info *pi) 9331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 9341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_rx_desc *rxre; 9351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct tty_struct *tty = pi->port.info->tty; 9361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 cmdstat, bytes_in, i; 9371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 9381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp; 9391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds char flag = TTY_NORMAL; 9401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_rx_intr[%d]: Handling Rx intr\n", pi->port.line); 9421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre = (struct mpsc_rx_desc *)(pi->rxr + (pi->rxr_posn*MPSC_RXRE_SIZE)); 9441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, 9462e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 9471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 9481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 9491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)rxre, 9502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)rxre + MPSC_RXRE_SIZE); 9511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 9521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 9541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Loop through Rx descriptors handling ones that have been completed. 9551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9562e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer while (!((cmdstat = be32_to_cpu(rxre->cmdstat)) 9572e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer & SDMA_DESC_CMDSTAT_O)) { 9581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bytes_in = be16_to_cpu(rxre->bytecnt); 9591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Following use of tty struct directly is deprecated */ 9612e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if (unlikely(tty_buffer_request_room(tty, bytes_in) 9622e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer < bytes_in)) { 9631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (tty->low_latency) 9641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_flip_buffer_push(tty); 9651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 96633f0f88f1c51ae5c2d593d26960c760ea154c2e2Alan Cox * If this failed then we will throw away the bytes 96733f0f88f1c51ae5c2d593d26960c760ea154c2e2Alan Cox * but must do so to clear interrupts. 9681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 9701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE); 9722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)bp, MPSC_RXBE_SIZE, 9732e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 9741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 9751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 9761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)bp, 9772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)bp + MPSC_RXBE_SIZE); 9781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 9791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 9811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Other than for parity error, the manual provides little 9821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * info on what data will be in a frame flagged by any of 9831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * these errors. For parity error, it is the last byte in 9841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the buffer that had the error. As for the rest, I guess 9851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * we'll assume there is no data in the buffer. 9861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * If there is...it gets lost. 9871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if (unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR 9892e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR 9902e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_OR))) { 9911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.rx++; 9931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (cmdstat & SDMA_DESC_CMDSTAT_BR) { /* Break */ 9951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.brk++; 9961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (uart_handle_break(&pi->port)) 9981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds goto next_frame; 9992e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if (cmdstat & SDMA_DESC_CMDSTAT_FR) { 10001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.frame++; 10012e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if (cmdstat & SDMA_DESC_CMDSTAT_OR) { 10021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.overrun++; 10032e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 10041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds cmdstat &= pi->port.read_status_mask; 10061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (cmdstat & SDMA_DESC_CMDSTAT_BR) 10081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_BREAK; 10091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_FR) 10101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_FRAME; 10111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_OR) 10121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_OVERRUN; 10131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (cmdstat & SDMA_DESC_CMDSTAT_PE) 10141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flag = TTY_PARITY; 10151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10177d12e780e003f93433d49ce78cfedf4b4c52adc5David Howells if (uart_handle_sysrq_char(&pi->port, *bp)) { 10181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp++; 10191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bytes_in--; 10201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds goto next_frame; 10211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10232e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if ((unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR 10242e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR 10252e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_OR))) 10262e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && !(cmdstat & pi->port.ignore_status_mask)) { 10271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_insert_flip_char(tty, *bp, flag); 10282e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 10291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i=0; i<bytes_in; i++) 10301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_insert_flip_char(tty, *bp++, TTY_NORMAL); 10311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.rx += bytes_in; 10331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsnext_frame: 10361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rxre->bytecnt = cpu_to_be16(0); 10371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 10382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O 10392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_EI | SDMA_DESC_CMDSTAT_F 10402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_L); 10411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 10422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, 10432e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 10441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 10451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 10461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)rxre, 10472e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)rxre + MPSC_RXRE_SIZE); 10481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 10491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Advance to next descriptor */ 10511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rxr_posn = (pi->rxr_posn + 1) & (MPSC_RXR_ENTRIES - 1); 10522e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer rxre = (struct mpsc_rx_desc *) 10532e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (pi->rxr + (pi->rxr_posn * MPSC_RXRE_SIZE)); 10542e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, 10552e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 10561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 10571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 10581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)rxre, 10592e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)rxre + MPSC_RXRE_SIZE); 10601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 10611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 1; 10621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 10631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Restart rx engine, if its stopped */ 10651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_ERD) == 0) 10661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_start_rx(pi); 10671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tty_flip_buffer_push(tty); 10691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 10701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 10711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr) 10731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 10741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 10751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 10772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_head * MPSC_TXRE_SIZE)); 10781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->bytecnt = cpu_to_be16(count); 10801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds txre->shadow = txre->bytecnt; 10811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); /* ensure cmdstat is last field updated */ 10822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | SDMA_DESC_CMDSTAT_F 10832e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_L 10842e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | ((intr) ? SDMA_DESC_CMDSTAT_EI : 0)); 10851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wmb(); 10862e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, 10872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 10881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 10891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 10901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)txre, 10912e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 10921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 10931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 10941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_copy_tx_data(struct mpsc_port_info *pi) 10961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 10971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct circ_buf *xmit = &pi->port.info->xmit; 10981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp; 10991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 i; 11001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Make sure the desc ring isn't full */ 11022e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer while (CIRC_CNT(pi->txr_head, pi->txr_tail, MPSC_TXR_ENTRIES) 11032e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer < (MPSC_TXR_ENTRIES - 1)) { 11041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->port.x_char) { 11051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* 11061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Ideally, we should use the TCS field in 11071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_1 to put the x_char out immediately but 11081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * errata prevents us from being able to read 11091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_2 to know that its safe to write to 11101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHR_1. Instead, just put it in-band with 11111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * all the other Tx data. 11121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 11131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 11141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *bp = pi->port.x_char; 11151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.x_char = 0; 11161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds i = 1; 11172e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else if (!uart_circ_empty(xmit) 11182e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && !uart_tx_stopped(&pi->port)) { 11192e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer i = min((u32)MPSC_TXBE_SIZE, 11202e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (u32)uart_circ_chars_pending(xmit)); 11212e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer i = min(i, (u32)CIRC_CNT_TO_END(xmit->head, xmit->tail, 11221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds UART_XMIT_SIZE)); 11231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 11241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memcpy(bp, &xmit->buf[xmit->tail], i); 11251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds xmit->tail = (xmit->tail + i) & (UART_XMIT_SIZE - 1); 11261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 11281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_write_wakeup(&pi->port); 11292e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { /* All tx data copied into ring bufs */ 11301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 11312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 11321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11332e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)bp, MPSC_TXBE_SIZE, 11342e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 11351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)bp, 11382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)bp + MPSC_TXBE_SIZE); 11391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_setup_tx_desc(pi, i, 1); 11411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Advance to next descriptor */ 11431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 11441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 11451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11472e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_tx_intr(struct mpsc_port_info *pi) 11481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 11491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_tx_desc *txre; 11501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 11511733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang unsigned long iflags; 11521733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 11531733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_irqsave(&pi->tx_lock, iflags); 11541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_sdma_tx_active(pi)) { 11562e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 11572e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_tail * MPSC_TXRE_SIZE)); 11581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11592e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE, 11602e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_FROM_DEVICE); 11611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 11642e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 11651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (!(be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O)) { 11681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 1; 11691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.icount.tx += be16_to_cpu(txre->bytecnt); 11701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = (pi->txr_tail+1) & (MPSC_TXR_ENTRIES-1); 11711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If no more data to tx, fall out of loop */ 11731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->txr_head == pi->txr_tail) 11741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 11751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11762e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer txre = (struct mpsc_tx_desc *)(pi->txr 11772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->txr_tail * MPSC_TXRE_SIZE)); 11782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)txre, 11792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 11801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 11811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 11821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds invalidate_dcache_range((ulong)txre, 11832e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)txre + MPSC_TXRE_SIZE); 11841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 11851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 11861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_copy_tx_data(pi); 11881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); /* start next desc if ready */ 11891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 11901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11911733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_unlock_irqrestore(&pi->tx_lock, iflags); 11921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 11931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 11961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This is the driver's interrupt handler. To avoid a race, we first clear 11971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the interrupt, then handle any completed Rx/Tx descriptors. When done 11981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * handling those descriptors, we restart the Rx/Tx engines if they're stopped. 11991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12002e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic irqreturn_t mpsc_sdma_intr(int irq, void *dev_id) 12011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = dev_id; 12031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong iflags; 12041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = IRQ_NONE; 12051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr[%d]: SDMA Interrupt Received\n",pi->port.line); 12071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, iflags); 12091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 12107d12e780e003f93433d49ce78cfedf4b4c52adc5David Howells if (mpsc_rx_intr(pi)) 12111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = IRQ_HANDLED; 12121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mpsc_tx_intr(pi)) 12131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = IRQ_HANDLED; 12141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, iflags); 12151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_sdma_intr[%d]: SDMA Interrupt Handled\n", pi->port.line); 12171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 12221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * serial_core.c Interface routines 12241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 12251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 12261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12272e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic uint mpsc_tx_empty(struct uart_port *port) 12281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong iflags; 12311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint rc; 12321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, iflags); 12341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = mpsc_sdma_tx_active(pi) ? 0 : TIOCSER_TEMT; 12351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, iflags); 12361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 12381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_mctrl(struct uart_port *port, uint mctrl) 12411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Have no way to set modem control lines AFAICT */ 12431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic uint mpsc_get_mctrl(struct uart_port *port) 12461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 mflags, status; 12491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer status = (pi->mirror_regs) ? pi->MPSC_CHR_10_m 12512e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer : readl(pi->mpsc_base + MPSC_CHR_10); 12521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags = 0; 12541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (status & 0x1) 12551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags |= TIOCM_CTS; 12561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (status & 0x2) 12571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mflags |= TIOCM_CAR; 12581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return mflags | TIOCM_DSR; /* No way to tell if DSR asserted */ 12601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12622e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_stop_tx(struct uart_port *port) 12631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1266b129a8ccd53f74c43e4c83c8e0031a4990040830Russell King pr_debug("mpsc_stop_tx[%d]\n", port->line); 12671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_freeze(pi); 12691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12712e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_start_tx(struct uart_port *port) 12721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 12741733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang unsigned long iflags; 12751733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 12761733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_irqsave(&pi->tx_lock, iflags); 12771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_unfreeze(pi); 12791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_copy_tx_data(pi); 12801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); 12811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12821733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_unlock_irqrestore(&pi->tx_lock, iflags); 12831733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 1284b129a8ccd53f74c43e4c83c8e0031a4990040830Russell King pr_debug("mpsc_start_tx[%d]\n", port->line); 12851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_start_rx(struct mpsc_port_info *pi) 12881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_start_rx[%d]: Starting...\n", pi->port.line); 12901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->rcv_data) { 12921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_enter_hunt(pi); 12931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_ERD); 12941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 12951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 12961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_stop_rx(struct uart_port *port) 12981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 12991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_stop_rx[%d]: Stopping...\n", port->line); 13021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13036c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez if (pi->mirror_regs) { 13046c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez writel(pi->MPSC_CHR_2_m | MPSC_CHR_2_RA, 13056c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez pi->mpsc_base + MPSC_CHR_2); 13066c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez /* Erratum prevents reading CHR_2 so just delay for a while */ 13076c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez udelay(100); 13082e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 13096c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_RA, 13102e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->mpsc_base + MPSC_CHR_2); 13116c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez 13126c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_RA) 13136c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez udelay(10); 13146c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez } 13156c1ead5e77c4e41d58ae6e6c3285ad38275df4a8Carlos Sanchez 13161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_cmd(pi, SDMA_SDCM_AR); 13171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13192e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_enable_ms(struct uart_port *port) 13201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13232e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_break_ctl(struct uart_port *port, int ctl) 13241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong flags; 13271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 v; 13281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds v = ctl ? 0x00ff0000 : 0; 13301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, flags); 13321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->mirror_regs) 13331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = v; 13341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel(v, pi->mpsc_base + MPSC_CHR_1); 13351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, flags); 13361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_startup(struct uart_port *port) 13391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 flag = 0; 13421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 13431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_startup[%d]: Starting up MPSC, irq: %d\n", 13451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds port->line, pi->port.irq); 13461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((rc = mpsc_make_ready(pi)) == 0) { 13481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Setup IRQ handler */ 13491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_ack(pi); 13501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* If irq's are shared, need to set flag */ 13521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (mpsc_ports[0].port.irq == mpsc_ports[1].port.irq) 135340663cc7f1c1ccf515d8af9470925a0cb2f59b5dThomas Gleixner flag = IRQF_SHARED; 13541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (request_irq(pi->port.irq, mpsc_sdma_intr, flag, 13562e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "mpsc-sdma", pi)) 13571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "MPSC: Can't get SDMA IRQ %d\n", 13582e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.irq); 13591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_intr_unmask(pi, 0xf); 13612e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer mpsc_sdma_set_rx_ring(pi, (struct mpsc_rx_desc *)(pi->rxr_p 13622e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer + (pi->rxr_posn * MPSC_RXRE_SIZE))); 13631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 13641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 13661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13682e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_shutdown(struct uart_port *port) 13691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_shutdown[%d]: Shutting down MPSC\n", port->line); 13731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_stop(pi); 13751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds free_irq(pi->port.irq, pi); 13761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_set_termios(struct uart_port *port, struct ktermios *termios, 1379606d099cdd1080bbb50ea50dc52d98252f8f10a1Alan Cox struct ktermios *old) 13801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 13811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 13821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 baud; 13831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ulong flags; 13841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 chr_bits, stop_bits, par; 13851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->c_iflag = termios->c_iflag; 13871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->c_cflag = termios->c_cflag; 13881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds switch (termios->c_cflag & CSIZE) { 13901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS5: 13911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_5; 13921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 13931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS6: 13941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_6; 13951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 13961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS7: 13971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_7; 13981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 13991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case CS8: 14001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds default: 14011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds chr_bits = MPSC_MPCR_CL_8; 14021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 14031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & CSTOPB) 14061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds stop_bits = MPSC_MPCR_SBL_2; 14071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 14081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds stop_bits = MPSC_MPCR_SBL_1; 14091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_EVEN; 14111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARENB) 14121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARODD) 14131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_ODD; 14141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CMSPAR 14151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & CMSPAR) { 14161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_cflag & PARODD) 14171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_MARK; 14181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 14191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds par = MPSC_CHR_2_PAR_SPACE; 14201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 14221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk); 14241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_irqsave(&pi->port.lock, flags); 14261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_update_timeout(port, termios->c_cflag, baud); 14281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_char_length(pi, chr_bits); 14301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_stop_bit_length(pi, stop_bits); 14311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_parity(pi, par); 14321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_set_baudrate(pi, baud); 14331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Characters/events to read */ 14351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.read_status_mask = SDMA_DESC_CMDSTAT_OR; 14361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & INPCK) 14382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_PE 14392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR; 14401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & (BRKINT | PARMRK)) 14421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_BR; 14431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Characters/events to ignore */ 14451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask = 0; 14461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNPAR) 14482e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_PE 14492e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer | SDMA_DESC_CMDSTAT_FR; 14501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNBRK) { 14521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_BR; 14531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (termios->c_iflag & IGNPAR) 14551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_OR; 14561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14585797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas if ((termios->c_cflag & CREAD)) { 14595797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas if (!pi->rcv_data) { 14605797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas pi->rcv_data = 1; 14615797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas mpsc_start_rx(pi); 14625797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas } 14635797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas } else if (pi->rcv_data) { 14645797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas mpsc_stop_rx(port); 14651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->rcv_data = 0; 14665797ae364c35db8c184f38b37595be59bf761e93Stephane Chazelas } 14671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_unlock_irqrestore(&pi->port.lock, flags); 14691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14712e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic const char *mpsc_type(struct uart_port *port) 14721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_type[%d]: port type: %s\n", port->line,MPSC_DRIVER_NAME); 14741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return MPSC_DRIVER_NAME; 14751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_request_port(struct uart_port *port) 14781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Should make chip/platform specific call */ 14801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 14811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14832e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_release_port(struct uart_port *port) 14841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 14861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->ready) { 14881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_uninit_rings(pi); 14891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_free_ring_mem(pi); 14901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->ready = 0; 14911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 14921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_config_port(struct uart_port *port, int flags) 14951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 14961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 14971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_verify_port(struct uart_port *port, struct serial_struct *ser) 14991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 15011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = 0; 15021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_verify_port[%d]: Verifying port data\n", pi->port.line); 15041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPSC) 15061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.irq != ser->irq) 15081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (ser->io_type != SERIAL_IO_MEM) 15101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.uartclk / 16 != ser->baud_base) /* Not sure */ 15121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if ((void *)pi->port.mapbase != ser->iomem_base) 15141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (pi->port.iobase != ser->port) 15161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (ser->hub6 != 0) 15181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = -EINVAL; 15191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 15211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct uart_ops mpsc_pops = { 15242e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .tx_empty = mpsc_tx_empty, 15252e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .set_mctrl = mpsc_set_mctrl, 15262e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .get_mctrl = mpsc_get_mctrl, 15272e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .stop_tx = mpsc_stop_tx, 15282e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .start_tx = mpsc_start_tx, 15292e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .stop_rx = mpsc_stop_rx, 15302e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .enable_ms = mpsc_enable_ms, 15312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .break_ctl = mpsc_break_ctl, 15322e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .startup = mpsc_startup, 15332e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .shutdown = mpsc_shutdown, 15342e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .set_termios = mpsc_set_termios, 15352e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .type = mpsc_type, 15362e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .release_port = mpsc_release_port, 15372e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .request_port = mpsc_request_port, 15382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .config_port = mpsc_config_port, 15392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .verify_port = mpsc_verify_port, 15401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 15411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 15431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 15441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 15451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Console Interface Routines 15461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 15471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 15481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 15491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_SERIAL_MPSC_CONSOLE 15512e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_console_write(struct console *co, const char *s, uint count) 15521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi = &mpsc_ports[co->index]; 15541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 *bp, *dp, add_cr = 0; 15551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 15561733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang unsigned long iflags; 15571733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 15581733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_irqsave(&pi->tx_lock, iflags); 15591733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang 15601733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang while (pi->txr_head != pi->txr_tail) { 15611733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang while (mpsc_sdma_tx_active(pi)) 15621733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang udelay(100); 15631733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang mpsc_sdma_intr_ack(pi); 15641733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang mpsc_tx_intr(pi); 15651733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang } 15661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (mpsc_sdma_tx_active(pi)) 15681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 15691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (count > 0) { 15711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bp = dp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 15721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < MPSC_TXBE_SIZE; i++) { 15741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (count == 0) 15751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 15761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (add_cr) { 15781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(dp++) = '\r'; 15791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add_cr = 0; 15802e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 15811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *(dp++) = *s; 15821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (*(s++) == '\n') { /* add '\r' after '\n' */ 15841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds add_cr = 1; 15851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count++; 15861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds count--; 15901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15922e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dma_cache_sync(pi->port.dev, (void *)bp, MPSC_TXBE_SIZE, 15932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer DMA_BIDIRECTIONAL); 15941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 15951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 15961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flush_dcache_range((ulong)bp, 15972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer (ulong)bp + MPSC_TXBE_SIZE); 15981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 15991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_setup_tx_desc(pi, i, 0); 16001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 16011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_sdma_start_tx(pi); 16021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (mpsc_sdma_tx_active(pi)) 16041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(100); 16051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->txr_tail = (pi->txr_tail + 1) & (MPSC_TXR_ENTRIES - 1); 16071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 16081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16091733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_unlock_irqrestore(&pi->tx_lock, iflags); 16101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 16111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16122e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int __init mpsc_console_setup(struct console *co, char *options) 16131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 16141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi; 16151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int baud, bits, parity, flow; 16161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_console_setup[%d]: options: %s\n", co->index, options); 16181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (co->index >= MPSC_NUM_CTLRS) 16201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds co->index = 0; 16211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi = &mpsc_ports[co->index]; 16231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds baud = pi->default_baud; 16251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds bits = pi->default_bits; 16261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds parity = pi->default_parity; 16271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds flow = pi->default_flow; 16281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->port.ops) 16301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENODEV; 16311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spin_lock_init(&pi->port.lock); /* Temporary fix--copied from 8250.c */ 16331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (options) 16351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_parse_options(options, &baud, &parity, &bits, &flow); 16361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return uart_set_options(&pi->port, co, baud, parity, bits, flow); 16381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 16391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct console mpsc_console = { 16412e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .name = MPSC_DEV_NAME, 16422e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .write = mpsc_console_write, 16432e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .device = uart_console_device, 16442e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .setup = mpsc_console_setup, 16452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .flags = CON_PRINTBUFFER, 16462e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .index = -1, 16472e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .data = &mpsc_reg, 16481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 16491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int __init mpsc_late_console_init(void) 16511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 16521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pr_debug("mpsc_late_console_init: Enter\n"); 16531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(mpsc_console.flags & CON_ENABLED)) 16551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds register_console(&mpsc_console); 16561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 16571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 16581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldslate_initcall(mpsc_late_console_init); 16601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_CONSOLE &mpsc_console 16621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 16631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MPSC_CONSOLE NULL 16641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 16651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 16661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 16671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 16681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Dummy Platform Driver to extract & map shared register regions 16691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 16701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 16711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 16722e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_resource_err(char *s) 16731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 16741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_WARNING "MPSC: Platform device resource error in %s\n", s); 16751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 16761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_shared_map_regs(struct platform_device *pd) 16781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 16791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct resource *r; 16801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 16822e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_BASE_ORDER)) 16832e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 16842e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE, 16852e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "mpsc_routing_regs")) { 16861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base = ioremap(r->start, 16872e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE); 16881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base_p = r->start; 16892e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 16901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("MPSC routing base"); 16911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 16921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 16931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 16941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 16952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_INTR_BASE_ORDER)) 16962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 16972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_INTR_REG_BLOCK_SIZE, 16982e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "sdma_intr_regs")) { 16991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base = ioremap(r->start, 17001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MPSC_SDMA_INTR_REG_BLOCK_SIZE); 17011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base_p = r->start; 17022e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 17031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.mpsc_routing_base); 17041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 17052e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE); 17061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("SDMA intr base"); 17071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENOMEM; 17081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 17111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17132e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_shared_unmap_regs(void) 17141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_shared_regs.mpsc_routing_base) { 17161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.mpsc_routing_base); 17171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 17182e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_ROUTING_REG_BLOCK_SIZE); 17191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!mpsc_shared_regs.sdma_intr_base) { 17211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(mpsc_shared_regs.sdma_intr_base); 17221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(mpsc_shared_regs.sdma_intr_base_p, 17232e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_INTR_REG_BLOCK_SIZE); 17241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17262c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_shared_regs.mpsc_routing_base = NULL; 17272c6e75999000ebc942526466dbd0de37bfac73a4Al Viro mpsc_shared_regs.sdma_intr_base = NULL; 17281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.mpsc_routing_base_p = 0; 17301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.sdma_intr_base_p = 0; 17311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17332e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_shared_drv_probe(struct platform_device *dev) 17341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_shared_pdata *pdata; 17361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 17371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17383ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id == 0) { 17392e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if (!(rc = mpsc_shared_map_regs(dev))) { 17402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pdata = (struct mpsc_shared_pdata *) 17412e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer dev->dev.platform_data; 17421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_MRR_m = pdata->mrr_val; 17441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_RCRR_m= pdata->rcrr_val; 17451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_TCRR_m= pdata->tcrr_val; 17461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_CAUSE_m = 17471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata->intr_cause_val; 17481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_MASK_m = 17491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata->intr_mask_val; 17501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 17521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 17561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17582e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_shared_drv_remove(struct platform_device *dev) 17591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 17601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 17611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17623ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id == 0) { 17631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_unmap_regs(); 17641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_MRR_m = 0; 17651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_RCRR_m = 0; 17661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.MPSC_TCRR_m = 0; 17671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_CAUSE_m = 0; 17681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_shared_regs.SDMA_INTR_MASK_m = 0; 17691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 17701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 17711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 17731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 17741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17753ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingstatic struct platform_driver mpsc_shared_driver = { 17761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .probe = mpsc_shared_drv_probe, 17771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .remove = mpsc_shared_drv_remove, 17783ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .driver = { 17792e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .name = MPSC_SHARED_NAME, 17803ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King }, 17811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 17821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 17841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 17851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 17861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Driver Interface Routines 17871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 17881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ****************************************************************************** 17891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 17901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct uart_driver mpsc_reg = { 17912e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .owner = THIS_MODULE, 17922e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .driver_name = MPSC_DRIVER_NAME, 17932e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .dev_name = MPSC_DEV_NAME, 17942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .major = MPSC_MAJOR, 17952e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .minor = MPSC_MINOR_START, 17962e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .nr = MPSC_NUM_CTLRS, 17972e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .cons = MPSC_CONSOLE, 17981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 17991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18002e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_drv_map_regs(struct mpsc_port_info *pi, 18012e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct platform_device *pd) 18021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct resource *r; 18041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18052e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer if ((r = platform_get_resource(pd, IORESOURCE_MEM, MPSC_BASE_ORDER)) 18062e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, MPSC_REG_BLOCK_SIZE, 18072e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer "mpsc_regs")) { 18081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base = ioremap(r->start, MPSC_REG_BLOCK_SIZE); 18091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base_p = r->start; 18102e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 18111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("MPSC base"); 18122e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer goto err; 18131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd, IORESOURCE_MEM, 18162e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_BASE_ORDER)) 18172e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 18182e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_SDMA_REG_BLOCK_SIZE, "sdma_regs")) { 18191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base = ioremap(r->start,MPSC_SDMA_REG_BLOCK_SIZE); 18201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base_p = r->start; 18212e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 18221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("SDMA base"); 1823a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->mpsc_base) { 1824a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->mpsc_base); 1825a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->mpsc_base = NULL; 1826a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 18272e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer goto err; 18281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((r = platform_get_resource(pd,IORESOURCE_MEM,MPSC_BRG_BASE_ORDER)) 18312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer && request_mem_region(r->start, 18322e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer MPSC_BRG_REG_BLOCK_SIZE, "brg_regs")) { 18331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base = ioremap(r->start, MPSC_BRG_REG_BLOCK_SIZE); 18341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base_p = r->start; 18352e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 18361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_resource_err("BRG base"); 1837a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->mpsc_base) { 1838a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->mpsc_base); 1839a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->mpsc_base = NULL; 1840a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 1841a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad if (pi->sdma_base) { 1842a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad iounmap(pi->sdma_base); 1843a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad pi->sdma_base = NULL; 1844a141a04330bd6eadf7081a0860dc786be7d09c46Amol Lad } 18452e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer goto err; 18461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 18482e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer 18492e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greererr: 18502e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer return -ENOMEM; 18511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18532e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_drv_unmap_regs(struct mpsc_port_info *pi) 18541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->mpsc_base) { 18561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->mpsc_base); 18571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->mpsc_base_p, MPSC_REG_BLOCK_SIZE); 18581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->sdma_base) { 18601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->sdma_base); 18611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->sdma_base_p, MPSC_SDMA_REG_BLOCK_SIZE); 18621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!pi->brg_base) { 18641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds iounmap(pi->brg_base); 18651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds release_mem_region(pi->brg_base_p, MPSC_BRG_REG_BLOCK_SIZE); 18661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 18671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18682c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->mpsc_base = NULL; 18692c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->sdma_base = NULL; 18702c6e75999000ebc942526466dbd0de37bfac73a4Al Viro pi->brg_base = NULL; 18711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_base_p = 0; 18731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->sdma_base_p = 0; 18741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_base_p = 0; 18751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 18761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18772e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void mpsc_drv_get_platform_data(struct mpsc_port_info *pi, 18782e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer struct platform_device *pd, int num) 18791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 18801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_pdata *pdata; 18811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pdata = (struct mpsc_pdata *)pd->dev.platform_data; 18831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.uartclk = pdata->brg_clk_freq; 18851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.iotype = UPIO_MEM; 18861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.line = num; 18871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.type = PORT_MPSC; 18881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.fifosize = MPSC_TXBE_SIZE; 18891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.membase = pi->mpsc_base; 18901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.mapbase = (ulong)pi->mpsc_base; 18911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.ops = &mpsc_pops; 18921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 18931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mirror_regs = pdata->mirror_regs; 18941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->cache_mgmt = pdata->cache_mgmt; 18951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_can_tune = pdata->brg_can_tune; 18961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->brg_clk_src = pdata->brg_clk_src; 18971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->mpsc_max_idle = pdata->max_idle; 18981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_baud = pdata->default_baud; 18991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_bits = pdata->default_bits; 19001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_parity = pdata->default_parity; 19011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->default_flow = pdata->default_flow; 19021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Initial values of mirrored regs */ 19041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_1_m = pdata->chr_1_val; 19051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_2_m = pdata->chr_2_val; 19061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_CHR_10_m = pdata->chr_10_val; 19071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->MPSC_MPCR_m = pdata->mpcr_val; 19081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->BRG_BCR_m = pdata->bcr_val; 19091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->shared_regs = &mpsc_shared_regs; 19111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds pi->port.irq = platform_get_irq(pd, 0); 19131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19152e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_drv_probe(struct platform_device *dev) 19161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mpsc_port_info *pi; 19181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc = -ENODEV; 19191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19203ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pr_debug("mpsc_drv_probe: Adding MPSC %d\n", dev->id); 19211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19223ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id < MPSC_NUM_CTLRS) { 19233ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pi = &mpsc_ports[dev->id]; 19241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19253ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (!(rc = mpsc_drv_map_regs(pi, dev))) { 19263ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King mpsc_drv_get_platform_data(pi, dev, dev->id); 19271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19281733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang if (!(rc = mpsc_make_ready(pi))) { 19291733310bb762cb926669f2c10f6f8719bb20ed91Dave Jiang spin_lock_init(&pi->tx_lock); 19301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(rc = uart_add_one_port(&mpsc_reg, 19312e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer &pi->port))) { 19321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rc = 0; 19332e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 19342e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer mpsc_release_port((struct uart_port *) 19352e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer pi); 19361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_drv_unmap_regs(pi); 19371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19382e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 19391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mpsc_drv_unmap_regs(pi); 19402e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 19411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 19451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19472e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int mpsc_drv_remove(struct platform_device *dev) 19481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19493ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King pr_debug("mpsc_drv_exit: Removing MPSC %d\n", dev->id); 19501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19513ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (dev->id < MPSC_NUM_CTLRS) { 19523ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King uart_remove_one_port(&mpsc_reg, &mpsc_ports[dev->id].port); 19532e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer mpsc_release_port((struct uart_port *) 19542e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer &mpsc_ports[dev->id].port); 19553ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King mpsc_drv_unmap_regs(&mpsc_ports[dev->id]); 19561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 19572e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 19581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return -ENODEV; 19592e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 19601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19623ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell Kingstatic struct platform_driver mpsc_driver = { 19631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .probe = mpsc_drv_probe, 19641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .remove = mpsc_drv_remove, 19653ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King .driver = { 19662e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer .name = MPSC_CTLR_NAME, 1967e169c139642fb4c682ec12a409725508dbefa520Kay Sievers .owner = THIS_MODULE, 19683ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King }, 19691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 19701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19712e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic int __init mpsc_drv_init(void) 19721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rc; 19741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_INFO "Serial: MPSC driver $Revision: 1.00 $\n"); 19761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(mpsc_ports, 0, sizeof(mpsc_ports)); 19781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); 19791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(rc = uart_register_driver(&mpsc_reg))) { 19813ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if (!(rc = platform_driver_register(&mpsc_shared_driver))) { 19823ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King if ((rc = platform_driver_register(&mpsc_driver))) { 19833ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_shared_driver); 19841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 19851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19862e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } else { 19871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 19882e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greer } 19891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 19901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return rc; 19921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 19931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 19942e89db75aee14f3f195836560e0973c9ff215f94Mark A. Greerstatic void __exit mpsc_drv_exit(void) 19951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 19963ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_driver); 19973ae5eaec1d2d9c0cf53745352e7d4b152810ba24Russell King platform_driver_unregister(&mpsc_shared_driver); 19981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uart_unregister_driver(&mpsc_reg); 19991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(mpsc_ports, 0, sizeof(mpsc_ports)); 20001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); 20011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 20021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_init(mpsc_drv_init); 20041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsmodule_exit(mpsc_drv_exit); 20051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 20061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_AUTHOR("Mark A. Greer <mgreer@mvista.com>"); 20071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_DESCRIPTION("Generic Marvell MPSC serial/UART driver $Revision: 1.00 $"); 20081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_VERSION(MPSC_VERSION); 20091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_LICENSE("GPL"); 20101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_ALIAS_CHARDEV_MAJOR(MPSC_MAJOR); 2011e169c139642fb4c682ec12a409725508dbefa520Kay SieversMODULE_ALIAS("platform:" MPSC_CTLR_NAME); 2012