Lines Matching refs:clock
170 * In UDMA3 or higher we have to clock switch for the duration of the
185 void __iomem *clock = master + 0x11;
192 iowrite8(ioread8(clock) | sel66, clock);
194 iowrite8(ioread8(clock) & ~sel66, clock);
220 * After a DMA completes we need to put the clock back to 33MHz for
234 /* The clock bits are in the same register for both channels */
236 void __iomem *clock = master + 0x11;
242 iowrite8(ioread8(clock) & ~sel66, clock);
246 iowrite8(ioread8(clock) & ~sel66, clock);