Cross Reference: /drivers/ata/pata

Lines Matching defs:pd
63 	struct pata_pxa_data *pd = qc->ap->private_data;
74 		pd->dma_desc[pd->dma_desc_id].ddadr = pd->dma_desc_addr +
75 			((pd->dma_desc_id + 1) * sizeof(struct pxa_dma_desc));
77 		pd->dma_desc[pd->dma_desc_id].dcmd = DCMD_BURST32 |
81 			pd->dma_desc[pd->dma_desc_id].dsadr = cpu_addr;
82 			pd->dma_desc[pd->dma_desc_id].dtadr = pd->dma_io_addr;
83 			pd->dma_desc[pd->dma_desc_id].dcmd |= DCMD_INCSRCADDR |
86 			pd->dma_desc[pd->dma_desc_id].dsadr = pd->dma_io_addr;
87 			pd->dma_desc[pd->dma_desc_id].dtadr = cpu_addr;
88 			pd->dma_desc[pd->dma_desc_id].dcmd |= DCMD_INCTRGADDR |
94 		pd->dma_desc_id++;
100 		DALGN |= (1 << pd->dma_dreq);
108 	struct pata_pxa_data *pd = qc->ap->private_data;
115 	pd->dma_desc_id = 0;
117 	DCSR(pd->dma_channel) = 0;
118 	DALGN &= ~(1 << pd->dma_dreq);
123 	pd->dma_desc[pd->dma_desc_id - 1].ddadr = DDADR_STOP;
126 	pd->dma_desc[pd->dma_desc_id - 1].dcmd |= DCMD_ENDIRQEN;
128 	DDADR(pd->dma_channel) = pd->dma_desc_addr;
129 	DRCMR(pd->dma_dreq) = DRCMR_MAPVLD | pd->dma_channel;
147 	struct pata_pxa_data *pd = qc->ap->private_data;
148 	init_completion(&pd->dma_done);
149 	DCSR(pd->dma_channel) = DCSR_RUN;
157 	struct pata_pxa_data *pd = qc->ap->private_data;
159 	if ((DCSR(pd->dma_channel) & DCSR_RUN) &&
160 		wait_for_completion_timeout(&pd->dma_done, HZ))
163 	DCSR(pd->dma_channel) = 0;
172 	struct pata_pxa_data *pd = ap->private_data;
175 	if (pd->dma_dcsr & DCSR_BUSERR)
223 	struct pata_pxa_data *pd = ap->private_data;
225 	pd->dma_dcsr = DCSR(dma);
226 	DCSR(dma) = pd->dma_dcsr;
228 	if (pd->dma_dcsr & DCSR_STOPSTATE)
229 		complete(&pd->dma_done);