Lines Matching defs:addr
416 BMDMA_PRD_LOW = 0x22c, /* bmdma PRD addr 31:0 */
417 BMDMA_PRD_HIGH = 0x230, /* bmdma PRD addr 63:32 */
485 __le32 addr;
501 __le32 addr;
846 static inline void writelfl(unsigned long data, void __iomem *addr)
848 writel(data, addr);
849 (void) readl(addr); /* flush to avoid PCI posted write */
945 * @addr: hardware address of the register
952 static inline void mv_write_cached_reg(void __iomem *addr, u32 *old, u32 new)
966 laddr = (long)addr & 0xffff;
970 writelfl(new, addr); /* read after write */
974 writel(new, addr); /* unaffected by the errata */
1350 void __iomem *addr = mv_ap_base(link->ap) + ofs;
1365 if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1)
1368 writelfl(val, addr);
1765 dma_addr_t addr = sg_dma_address(sg);
1769 u32 offset = addr & 0xffff;
1775 mv_sg->addr = cpu_to_le32(addr & 0xffffffff);
1776 mv_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16);
1781 addr += len;
1793 static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
1795 u16 tmp = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS |
1863 /* load PRD table addr. */
2134 crqb->addr = cpu_to_le32(pp->sg_tbl_dma[qc->tag] & 0xffffffff);
3030 void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no);
3034 *val = readl(addr + ofs);
3044 void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no);
3048 writelfl(val, addr + ofs);