Lines Matching refs:bridge

195 		curr->bridge->driver->free_by_type(curr);
199 if (curr->bridge->driver->agp_destroy_pages) {
200 curr->bridge->driver->agp_destroy_pages(curr);
204 curr->bridge->driver->agp_destroy_page(
209 curr->bridge->driver->agp_destroy_page(
229 * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which
234 struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge,
242 if (!bridge)
245 cur_memory = atomic_read(&bridge->current_memory_agp);
246 if ((cur_memory + page_count > bridge->max_memory_agp) ||
253 new->bridge = bridge;
258 new = bridge->driver->alloc_by_type(page_count, type);
260 new->bridge = bridge;
271 if (bridge->driver->agp_alloc_pages) {
272 if (bridge->driver->agp_alloc_pages(bridge, new, page_count)) {
276 new->bridge = bridge;
281 struct page *page = bridge->driver->agp_alloc_page(bridge);
290 new->bridge = bridge;
372 * agp_copy_info - copy bridge state information
376 * This function copies information about the agp bridge device and the state of
379 int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
382 if (!bridge) {
387 info->version.major = bridge->version->major;
388 info->version.minor = bridge->version->minor;
390 info->device = bridge->dev;
391 if (bridge->mode & AGPSTAT_MODE_3_0)
392 info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
394 info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
395 info->aper_base = bridge->gart_bus_addr;
397 info->max_memory = bridge->max_memory_agp;
398 info->current_memory = atomic_read(&bridge->current_memory_agp);
399 info->cant_use_aperture = bridge->driver->cant_use_aperture;
400 info->vm_ops = bridge->vm_ops;
435 curr->bridge->driver->cache_flush();
439 ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
475 ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type);
482 spin_lock(&curr->bridge->mapped_lock);
484 spin_unlock(&curr->bridge->mapped_lock);
517 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate. "
522 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate. "
594 * bridge_agpstat = PCI_AGP_STATUS from agp bridge.
665 printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm);
674 /* All set, bridge & device can do AGP x8*/
687 * the graphics card, and the bridge can do x8, and use if so.
692 "supported by bridge & card (x8).\n");
698 printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n",
729 * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
731 * @bridge_agpstat: current agp_stat from AGP bridge.
734 * the requested mode to the capabilities of both the bridge and the card.
736 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat)
804 void get_agp_version(struct agp_bridge_data *bridge)
809 if (bridge->major_version != 0)
812 pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid);
813 bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
814 bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
819 void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
825 dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
839 if (bridge->major_version >= 3) {
840 if (bridge->mode & AGPSTAT_MODE_3_0) {
842 if (bridge->minor_version >= 5)
843 agp_3_5_enable(bridge);
849 pci_read_config_dword(bridge->dev,
850 bridge->capndx+AGPCTRL, &temp);
852 pci_write_config_dword(bridge->dev,
853 bridge->capndx+AGPCTRL, temp);
855 dev_info(&bridge->dev->dev, "bridge is in legacy mode, falling back to 2.x\n");
865 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)
877 if (bridge->driver->size_type == LVL2_APER_SIZE)
881 i = bridge->aperture_size_idx;
882 temp = bridge->current_size;
885 if (bridge->driver->size_type != FIXED_APER_SIZE) {
887 switch (bridge->driver->size_type) {
917 switch (bridge->driver->size_type) {
919 bridge->current_size = A_IDX8(bridge);
922 bridge->current_size = A_IDX16(bridge);
925 bridge->current_size = A_IDX32(bridge);
933 temp = bridge->current_size;
935 bridge->aperture_size_idx = i;
937 } while (!table && (i < bridge->driver->num_aperture_sizes));
953 bridge->gatt_table_real = (u32 *) table;
956 bridge->driver->cache_flush();
961 bridge->gatt_table = (void *)table;
963 bridge->gatt_table = ioremap_nocache(virt_to_phys(table),
965 bridge->driver->cache_flush();
968 if (bridge->gatt_table == NULL) {
976 bridge->gatt_bus_addr = virt_to_phys(bridge->gatt_table_real);
980 writel(bridge->scratch_page, bridge->gatt_table+i);
981 readl(bridge->gatt_table+i); /* PCI Posting. */
988 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)
995 temp = bridge->current_size;
997 switch (bridge->driver->size_type) {
1024 set_memory_wb((unsigned long)bridge->gatt_table, 1 << page_order);
1026 iounmap(bridge->gatt_table);
1028 table = (char *) bridge->gatt_table_real;
1034 free_gatt_pages(bridge->gatt_table_real, page_order);
1037 bridge->gatt_table = NULL;
1038 bridge->gatt_table_real = NULL;
1039 bridge->gatt_bus_addr = 0;
1052 struct agp_bridge_data *bridge;
1055 bridge = mem->bridge;
1056 if (!bridge)
1062 temp = bridge->current_size;
1064 switch (bridge->driver->size_type) {
1092 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1105 if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
1111 bridge->driver->cache_flush();
1116 writel(bridge->driver->mask_memory(bridge,
1119 bridge->gatt_table+j);
1121 readl(bridge->gatt_table+j-1); /* PCI Posting. */
1123 bridge->driver->tlb_flush(mem);
1132 struct agp_bridge_data *bridge;
1135 bridge = mem->bridge;
1136 if (!bridge)
1150 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1158 writel(bridge->scratch_page, bridge->gatt_table+i);
1160 readl(bridge->gatt_table+i-1); /* PCI Posting. */
1162 bridge->driver->tlb_flush(mem);
1209 int agp_generic_alloc_pages(struct agp_bridge_data *bridge, struct agp_memory *mem, size_t num_pages)
1239 struct page *agp_generic_alloc_page(struct agp_bridge_data *bridge)
1305 void agp_enable(struct agp_bridge_data *bridge, u32 mode)
1307 if (!bridge)
1309 bridge->driver->agp_enable(bridge, mode);
1337 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
1341 if (bridge->driver->masks)
1342 return addr | bridge->driver->masks[0].mask;
1348 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,