Lines Matching refs:clock
720 /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
721 static void mdfld_clock(int refclk, struct mrst_clock_t *clock)
723 clock->dot = (refclk * clock->m) / clock->p1;
727 * Returns a set of divisors for the desired target clock with the given refclk,
734 struct mrst_clock_t clock;
740 for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) {
741 for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max;
742 clock.p1++) {
745 mdfld_clock(refclk, &clock);
747 this_err = abs(clock.dot - target);
749 *best_clock = clock;
785 struct mrst_clock_t clock;
869 adjusted_mode->clock);
1012 clk = adjusted_mode->clock;
1056 dev_dbg(dev->dev, "adjusted_mode->clock = %d, clk_tmp = %d.\n",
1057 adjusted_mode->clock, clk_tmp);
1059 ok = mdfldFindBestPLL(crtc, clk_tmp, refclk, &clock);
1065 m_conv = mdfld_m_converts[(clock.m - MDFLD_M_MIN)];
1067 dev_dbg(dev->dev, "dot clock = %d,"
1069 clock.dot, clock.m,
1070 clock.p1, m_conv);
1117 dpll |= (1 << (clock.p1 - 2)) << 17;