Lines Matching refs:base
46 if (obj->base.dev != dev ||
47 !atomic_read(&obj->base.refcount.refcount)) {
52 (obj->base.read_domains & I915_GEM_GPU_DOMAINS) == 0) {
56 obj->base.read_domains);
58 } else if (obj->base.write_domain && list_empty(&obj->gpu_write_list)) {
61 obj->base.write_domain,
68 if (obj->base.dev != dev ||
69 !atomic_read(&obj->base.refcount.refcount)) {
74 (obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0 ||
79 obj->base.write_domain,
86 if (obj->base.dev != dev ||
87 !atomic_read(&obj->base.refcount.refcount)) {
92 (obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0) {
96 obj->base.write_domain);
102 if (obj->base.dev != dev ||
103 !atomic_read(&obj->base.refcount.refcount)) {
108 (obj->base.write_domain & I915_GEM_GPU_DOMAINS)) {
112 obj->base.write_domain);
118 if (obj->base.dev != dev ||
119 !atomic_read(&obj->base.refcount.refcount)) {
124 (obj->base.write_domain & I915_GEM_GPU_DOMAINS)) {
128 obj->base.write_domain);
141 struct drm_device *dev = obj->base.dev;
151 gtt_mapping = ioremap(dev->agp->base + obj->gtt_offset, obj->base.size);