Lines Matching refs:iir
501 /* disable master interrupt before clearing iir */
587 /* disable master interrupt before clearing iir */
1285 u32 iir, new_iir;
1296 iir = I915_READ(IIR);
1304 irq_received = iir != 0;
1306 /* Can't rely on pipestat interrupt bit in iir as it might
1308 * It doesn't set the bit in iir again, but it still produces
1312 if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
1339 (iir & I915_DISPLAY_PORT_INTERRUPT)) {
1352 I915_WRITE(IIR, iir);
1362 if (iir & I915_USER_INTERRUPT)
1364 if (iir & I915_BSD_USER_INTERRUPT)
1367 if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) {
1373 if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) {
1394 if (blc_event || (iir & I915_ASLE_INTERRUPT))
1397 /* With MSI, interrupts are only generated when iir
1399 * set while we were handling the existing iir bits, then
1412 iir = new_iir;