Cross Reference: /drivers/media/video/cx18/cx18-i2c.c

Lines Matching defs:cx
86 static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
90 	struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
102 		init_data->name = cx->card_name;
111 int cx18_i2c_register(struct cx18 *cx, unsigned idx)
115 	struct i2c_adapter *adap = &cx->i2c_adap[bus];
124 		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
125 				adap, type, 0, cx->card_i2c->radio);
128 		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
129 				adap, type, 0, cx->card_i2c->demod);
132 		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
133 				adap, type, 0, cx->card_i2c->tv);
140 		return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
147 	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
155 struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
160 	spin_lock(&cx->v4l2_dev.lock);
161 	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
167 	spin_unlock(&cx->v4l2_dev.lock);
173 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
176 	u32 r = cx18_read_reg(cx, addr);
179 		cx18_write_reg(cx, r | SETSCL_BIT, addr);
181 		cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
186 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
189 	u32 r = cx18_read_reg(cx, addr);
192 		cx18_write_reg(cx, r | SETSDL_BIT, addr);
194 		cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
199 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
203 	return cx18_read_reg(cx, addr) & GETSCL_BIT;
208 	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
212 	return cx18_read_reg(cx, addr) & GETSDL_BIT;
236 int init_cx18_i2c(struct cx18 *cx)
243 		memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
245 		cx->i2c_algo_cb_data[i].cx = cx;
246 		cx->i2c_algo_cb_data[i].bus_index = i;
247 		cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
250 		memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
252 		cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
253 		sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
254 				" #%d-%d", cx->instance, i);
255 		i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
256 		cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
259 	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
262 		cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
265 		cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
269 	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
271 	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
273 	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
277 	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
279 	cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
283 	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
284 	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
285 	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
288 	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
289 	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
290 	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
292 	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
295 	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
298 	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
304 	i2c_del_adapter(&cx->i2c_adap[0]);
309 void exit_cx18_i2c(struct cx18 *cx)
313 	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
315 	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
319 		i2c_del_adapter(&cx->i2c_adap[i]);