Lines Matching refs:risc
293 cx25821_sram_channel_setup(dev, channel, buf->bpl, buf->risc.dma);
355 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
356 prev->risc.jmp[2] = cpu_to_le32(0); /* Bits 63 - 32 */
403 /* risc op code error */
405 pr_warn("%s, %s: video risc op code error\n",
630 cx25821_risc_buffer(dev->pci, &buf->risc,
635 cx25821_risc_buffer(dev->pci, &buf->risc,
645 cx25821_risc_buffer(dev->pci, &buf->risc,
651 cx25821_risc_buffer(dev->pci, &buf->risc,
657 cx25821_risc_buffer(dev->pci, &buf->risc,
669 fh->fmt->name, (unsigned long)buf->risc.dma);
729 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
730 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
731 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
733 dprintk(2, "jmp to stopper (0x%x)\n", buf->risc.jmp[1]);
759 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
762 prev->risc.jmp[2] = cpu_to_le32(0);
922 /* stop the risc engine and fifo */