164 static int	mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
166 static int	mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
169 static int	mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
170 static void	mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
171 static void	mpt_adapter_disable(MPT_ADAPTER *ioc);
172 static void	mpt_adapter_dispose(MPT_ADAPTER *ioc);
174 static void	MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
175 static int	MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
176 static int	GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
177 static int	GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
178 static int	SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
179 static int	SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
180 static int	mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
181 static int	mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
182 static int	mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
183 static int	KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
184 static int	SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
185 static int	PrimeIocFifos(MPT_ADAPTER *ioc);
186 static int	WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
187 static int	WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
188 static int	WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
189 static int	GetLanConfigPages(MPT_ADAPTER *ioc);
190 static int	GetIoUnitPage2(MPT_ADAPTER *ioc);
191 int		mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
192 static int	mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
193 static int	mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
194 static void 	mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
195 static void 	mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
196 static void	mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
197 static int	SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch,
199 static int	SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
200 static int	mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
201 static int	mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
208 static void	mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
210 static int	ProcessEventNotification(MPT_ADAPTER *ioc,
212 static void	mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
213 static void	mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
214 static void	mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
215 static void	mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info , u8 cb_idx);
216 static int	mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
217 static void	mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
252 	MPT_ADAPTER *ioc;
257 	list_for_each_entry(ioc, &ioc_list, list)
258 		ioc->debug_level = mpt_debug_level;
281  * @ioc: per adatper instance
286 mpt_is_discovery_complete(MPT_ADAPTER *ioc)
302 	if ((mpt_config(ioc, &cfg)))
307 	buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
315 	if ((mpt_config(ioc, &cfg)))
323 	pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
331  *  mpt_remove_dead_ioc_func - kthread context to remove dead ioc
332  * @arg: input argument, used to derive ioc
339 	MPT_ADAPTER *ioc = (MPT_ADAPTER *)arg;
342 	if ((ioc == NULL))
345 	pdev = ioc->pcidev;
356  *	mpt_fault_reset_work - work performed on workq after ioc fault
357  *	@work: input argument, used to derive ioc
363 	MPT_ADAPTER	*ioc =
371 	if (ioc->ioc_reset_in_progress || !ioc->active)
375 	ioc_raw_state = mpt_GetIocState(ioc, 0);
378 		    ioc->name, __func__);
385 		 * since dead ioc will never return any command back from HW.
387 		hd = shost_priv(ioc->sh);
388 		ioc->schedule_dead_ioc_flush_running_cmds(hd);
391 		p = kthread_run(mpt_remove_dead_ioc_func, ioc,
392 				"mpt_dead_ioc_%d", ioc->id);
396 				ioc->name, __func__);
400 				ioc->name, __func__);
408 		       ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
410 		       ioc->name, __func__);
411 		rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
412 		printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
414 		ioc_raw_state = mpt_GetIocState(ioc, 0);
417 			    "reset (%04xh)\n", ioc->name, ioc_raw_state &
419 	} else if (ioc->bus_type == SAS && ioc->sas_discovery_quiesce_io) {
420 		if ((mpt_is_discovery_complete(ioc))) {
421 			devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "clearing "
422 			    "discovery_quiesce_io flag\n", ioc->name));
423 			ioc->sas_discovery_quiesce_io = 0;
431 	if (ioc->alt_ioc)
432 		ioc = ioc->alt_ioc;
435 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
436 	if (ioc->reset_work_q)
437 		queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
439 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
447 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
454 	dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
455 				ioc->name, pa));
461 		mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
476 			mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
477 			mpt_free_msg_frame(ioc, mf);
497 				__func__, ioc->name, cb_idx);
501 	if (MptCallbacks[cb_idx](ioc, mf, mr))
502 		mpt_free_msg_frame(ioc, mf);
508 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
530 	mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
531 			 (reply_dma_low - ioc->reply_frames_low_dma));
535 	mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
537 	dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
538 			ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
539 	DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
546 		if (ioc->bus_type == FC)
547 			mpt_fc_log_info(ioc, log_info);
548 		else if (ioc->bus_type == SPI)
549 			mpt_spi_log_info(ioc, log_info);
550 		else if (ioc->bus_type == SAS)
551 			mpt_sas_log_info(ioc, log_info, cb_idx);
555 		mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
561 				__func__, ioc->name, cb_idx);
566 	freeme = MptCallbacks[cb_idx](ioc, mf, mr);
570 	CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
573 		mpt_free_msg_frame(ioc, mf);
597 	MPT_ADAPTER *ioc = bus_id;
598 	u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
608 			mpt_reply(ioc, pa);
610 			mpt_turbo_reply(ioc, pa);
611 		pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
620  *	@ioc: Pointer to MPT_ADAPTER structure
632 mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply)
643 		ProcessEventNotification(ioc, pEventReply, &evHandlers);
651 		ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_COMMAND_GOOD;
653 			ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_RF_VALID;
654 			memcpy(ioc->mptbase_cmds.reply, reply,
658 		if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
659 			ioc->mptbase_cmds.status &= ~MPT_MGMT_STATUS_PENDING;
660 			complete(&ioc->mptbase_cmds.done);
663 		if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_FREE_MF)
667 		devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
668 		    "EventAck reply received\n", ioc->name));
673 		    ioc->name, reply->u.hdr.Function);
837 	MPT_ADAPTER	*ioc;
846 	list_for_each_entry(ioc, &ioc_list, list) {
847 		id = ioc->pcidev->driver ?
848 		    ioc->pcidev->driver->id_table : NULL;
850 			dd_cbfunc->probe(ioc->pcidev, id);
865 	MPT_ADAPTER	*ioc;
872 	list_for_each_entry(ioc, &ioc_list, list) {
874 			dd_cbfunc->remove(ioc->pcidev);
885  *	@ioc: Pointer to MPT adapter structure
894 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
900 	/* validate handle and ioc identifier */
903 	if (!ioc->active)
905 		    "returning NULL!\n", ioc->name);
909 	if (!ioc->active)
912 	spin_lock_irqsave(&ioc->FreeQlock, flags);
913 	if (!list_empty(&ioc->FreeQ)) {
916 		mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
921 		req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
923 		req_idx = req_offset / ioc->req_sz;
927 		ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
929 		ioc->mfcnt++;
934 	spin_unlock_irqrestore(&ioc->FreeQlock, flags);
939 		    "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
940 		    ioc->req_depth);
943 		printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
944 		    ioc->mfcnt, ioc->req_depth);
947 	dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
948 	    ioc->name, cb_idx, ioc->id, mf));
956  *	@ioc: Pointer to MPT adapter structure
963 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
971 	req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
973 	req_idx = req_offset / ioc->req_sz;
977 	DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
979 	mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
980 	dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
981 	    "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
982 	    ioc->RequestNB[req_idx]));
983 	CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
989  *	@ioc: Pointer to MPT adapter structure
999 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
1007 	req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
1008 	req_idx = req_offset / ioc->req_sz;
1012 	DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
1014 	mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
1015 	dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
1016 		ioc->name, mf_dma_addr, req_idx));
1017 	CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
1023  *	@ioc: Pointer to MPT adapter structure
1030 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
1035 	spin_lock_irqsave(&ioc->FreeQlock, flags);
1040 	list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
1042 	ioc->mfcnt--;
1045 	spin_unlock_irqrestore(&ioc->FreeQlock, flags);
1174  *	@ioc: Pointer to MPT adapter structure
1188 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
1204 	ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
1205 	if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
1212 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1214 	CHIPREG_WRITE32(&ioc->chip->Doorbell,
1219 	if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1224 	if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1227 	dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1228 		ioc->name, ii));
1230 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1232 	if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1245 		CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1246 		if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1252 	if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1258 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1266  * @ioc: Pointer to MPT adapter structure
1283 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1288 	if (CHIPREG_READ32(&ioc->chip->Doorbell)
1292 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1294 	CHIPREG_WRITE32(&ioc->chip->Doorbell,
1300 	if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1309  *	@ioc: Pointer to pointer to IOC adapter
1310  *	@ioc_init: Pointer to ioc init config page
1316 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1322 	if(!ioc->HostPageBuffer) {
1325 		    le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1333 			if((ioc->HostPageBuffer = pci_alloc_consistent(
1334 			    ioc->pcidev,
1336 			    &ioc->HostPageBuffer_dma)) != NULL) {
1338 				dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1340 				    ioc->name, ioc->HostPageBuffer,
1341 				    (u32)ioc->HostPageBuffer_dma,
1343 				ioc->alloc_total += host_page_buffer_sz;
1344 				ioc->HostPageBuffer_sz = host_page_buffer_sz;
1352 	if(!ioc->HostPageBuffer) {
1355 		    ioc->name);
1365 	flags_length |= ioc->HostPageBuffer_sz;
1366 	ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1367 	ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1387 	MPT_ADAPTER *ioc;
1389 	list_for_each_entry(ioc,&ioc_list,list) {
1390 		if (ioc->id == iocid) {
1391 			*iocpp =ioc;
1644  *	@ioc: Pointer to pointer to IOC adapter
1648 mpt_mapresources(MPT_ADAPTER *ioc)
1660 	pdev = ioc->pcidev;
1661 	ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1664 		    "failed\n", ioc->name);
1667 	if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1669 		    "MEM failed\n", ioc->name);
1682 			ioc->dma_mask = DMA_BIT_MASK(64);
1683 			dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1685 				ioc->name));
1689 			ioc->dma_mask = DMA_BIT_MASK(32);
1690 			dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1692 				ioc->name));
1695 			    ioc->name, pci_name(pdev));
1696 			pci_release_selected_regions(pdev, ioc->bars);
1703 			ioc->dma_mask = DMA_BIT_MASK(32);
1704 			dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1706 				ioc->name));
1709 			    ioc->name, pci_name(pdev));
1710 			pci_release_selected_regions(pdev, ioc->bars);
1732 	ioc->mem_size = msize;
1740 			" memory!\n", ioc->name);
1741 		pci_release_selected_regions(pdev, ioc->bars);
1744 	ioc->memmap = mem;
1745 	dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1746 	    ioc->name, mem, (unsigned long long)mem_phys));
1748 	ioc->mem_phys = mem_phys;
1749 	ioc->chip = (SYSIF_REGS __iomem *)mem;
1752 	ioc->pio_mem_phys = port;
1753 	ioc->pio_chip = (SYSIF_REGS __iomem *)port;
1779 	MPT_ADAPTER	*ioc;
1789 	ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1790 	if (ioc == NULL) {
1795 	ioc->id = mpt_ids++;
1796 	sprintf(ioc->name, "ioc%d", ioc->id);
1797 	dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1804 	ioc->debug_level = mpt_debug_level;
1808 	dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1810 	ioc->pcidev = pdev;
1811 	if (mpt_mapresources(ioc)) {
1812 		kfree(ioc);
1819 	if (ioc->dma_mask == DMA_BIT_MASK(64)) {
1821 			ioc->add_sge = &mpt_add_sge_64bit_1078;
1823 			ioc->add_sge = &mpt_add_sge_64bit;
1824 		ioc->add_chain = &mpt_add_chain_64bit;
1825 		ioc->sg_addr_size = 8;
1827 		ioc->add_sge = &mpt_add_sge;
1828 		ioc->add_chain = &mpt_add_chain;
1829 		ioc->sg_addr_size = 4;
1831 	ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
1833 	ioc->alloc_total = sizeof(MPT_ADAPTER);
1834 	ioc->req_sz = MPT_DEFAULT_FRAME_SIZE;		/* avoid div by zero! */
1835 	ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1838 	spin_lock_init(&ioc->taskmgmt_lock);
1839 	mutex_init(&ioc->internal_cmds.mutex);
1840 	init_completion(&ioc->internal_cmds.done);
1841 	mutex_init(&ioc->mptbase_cmds.mutex);
1842 	init_completion(&ioc->mptbase_cmds.done);
1843 	mutex_init(&ioc->taskmgmt_cmds.mutex);
1844 	init_completion(&ioc->taskmgmt_cmds.done);
1848 	ioc->eventTypes = 0;	/* None */
1849 	ioc->eventContext = 0;
1850 	ioc->eventLogSize = 0;
1851 	ioc->events = NULL;
1854 	ioc->mfcnt = 0;
1857 	ioc->sh = NULL;
1858 	ioc->cached_fw = NULL;
1862 	memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1866 	INIT_LIST_HEAD(&ioc->fc_rports);
1869 	INIT_LIST_HEAD(&ioc->list);
1873 	INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
1875 	snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
1876 		 "mpt_poll_%d", ioc->id);
1877 	ioc->reset_work_q =
1878 		create_singlethread_workqueue(ioc->reset_work_q_name);
1879 	if (!ioc->reset_work_q) {
1881 		    ioc->name);
1882 		pci_release_selected_regions(pdev, ioc->bars);
1883 		kfree(ioc);
1887 	dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1888 	    ioc->name, &ioc->facts, &ioc->pfacts[0]));
1891 	mpt_get_product_name(pdev->vendor, pdev->device, revision, ioc->prod_name);
1897 		ioc->errata_flag_1064 = 1;
1902 		ioc->bus_type = FC;
1920 		ioc->bus_type = FC;
1930 		ioc->bus_type = FC;
1944 		ioc->bus_type = SPI;
1949 		ioc->errata_flag_1064 = 1;
1950 		ioc->bus_type = SAS;
1956 		ioc->bus_type = SAS;
1961 	switch (ioc->bus_type) {
1964 		ioc->msi_enable = mpt_msi_enable_sas;
1968 		ioc->msi_enable = mpt_msi_enable_spi;
1972 		ioc->msi_enable = mpt_msi_enable_fc;
1976 		ioc->msi_enable = 0;
1980 	ioc->fw_events_off = 1;
1982 	if (ioc->errata_flag_1064)
1985 	spin_lock_init(&ioc->FreeQlock);
1988 	CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1989 	ioc->active = 0;
1990 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1993 	pci_set_drvdata(ioc->pcidev, ioc);
1996 	list_add_tail(&ioc->list, &ioc_list);
2000 	mpt_detect_bound_ports(ioc, pdev);
2002 	INIT_LIST_HEAD(&ioc->fw_event_list);
2003 	spin_lock_init(&ioc->fw_event_lock);
2004 	snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
2005 	ioc->fw_event_q = create_singlethread_workqueue(ioc->fw_event_q_name);
2007 	if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2010 		    ioc->name, r);
2012 		list_del(&ioc->list);
2013 		if (ioc->alt_ioc)
2014 			ioc->alt_ioc->alt_ioc = NULL;
2015 		iounmap(ioc->memmap);
2017 			pci_release_selected_regions(pdev, ioc->bars);
2019 		destroy_workqueue(ioc->reset_work_q);
2020 		ioc->reset_work_q = NULL;
2022 		kfree(ioc);
2039 	dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
2041 		proc_create_data("info", S_IRUGO, dent, &mpt_iocinfo_proc_fops, ioc);
2042 		proc_create_data("summary", S_IRUGO, dent, &mpt_summary_proc_fops, ioc);
2046 	if (!ioc->alt_ioc)
2047 		queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
2062 	MPT_ADAPTER 	*ioc = pci_get_drvdata(pdev);
2069 	 * Stop polling ioc for fault condition
2071 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2072 	wq = ioc->reset_work_q;
2073 	ioc->reset_work_q = NULL;
2074 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2075 	cancel_delayed_work(&ioc->fault_reset_work);
2078 	spin_lock_irqsave(&ioc->fw_event_lock, flags);
2079 	wq = ioc->fw_event_q;
2080 	ioc->fw_event_q = NULL;
2081 	spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2084 	sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
2086 	sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
2088 	sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
2100 	CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2102 	ioc->active = 0;
2106 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2108 	CHIPREG_READ32(&ioc->chip->IntStatus);
2110 	mpt_adapter_dispose(ioc);
2128 	MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2132 	    "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2135 	/* put ioc into READY_STATE */
2136 	if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
2138 		"pci-suspend:  IOC msg unit reset failed!\n", ioc->name);
2142 	CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2143 	ioc->active = 0;
2146 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2148 	free_irq(ioc->pci_irq, ioc);
2149 	if (ioc->msi_enable)
2150 		pci_disable_msi(ioc->pcidev);
2151 	ioc->pci_irq = -1;
2154 	pci_release_selected_regions(pdev, ioc->bars);
2167 	MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2173 	    "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2179 	ioc->pcidev = pdev;
2180 	err = mpt_mapresources(ioc);
2184 	if (ioc->dma_mask == DMA_BIT_MASK(64)) {
2186 			ioc->add_sge = &mpt_add_sge_64bit_1078;
2188 			ioc->add_sge = &mpt_add_sge_64bit;
2189 		ioc->add_chain = &mpt_add_chain_64bit;
2190 		ioc->sg_addr_size = 8;
2193 		ioc->add_sge = &mpt_add_sge;
2194 		ioc->add_chain = &mpt_add_chain;
2195 		ioc->sg_addr_size = 4;
2197 	ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
2199 	printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
2200 	    ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
2201 	    CHIPREG_READ32(&ioc->chip->Doorbell));
2210 	if (ioc->bus_type == SAS && (pdev->device ==
2213 		if (KickStart(ioc, 1, CAN_SLEEP) < 0) {
2215 			    ioc->name);
2220 	/* bring ioc to operational state */
2221 	printk(MYIOC_s_INFO_FMT "Sending mpt_do_ioc_recovery\n", ioc->name);
2222 	recovery_state = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2226 		    "error:[%x]\n", ioc->name, recovery_state);
2229 		    "pci-resume: success\n", ioc->name);
2237 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
2240 	     ioc->bus_type != SPI) ||
2242 	     ioc->bus_type != FC) ||
2244 	     ioc->bus_type != SAS))
2248 	return (MptResetHandlers[index])(ioc, reset_phase);
2254  *	@ioc: Pointer to MPT adapter structure
2274 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
2286 	printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
2290 	CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2291 	ioc->active = 0;
2293 	if (ioc->alt_ioc) {
2294 		if (ioc->alt_ioc->active ||
2300 			CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2302 			ioc->alt_ioc->active = 0;
2310 	if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
2313 			    ioc->name);
2315 			if (reset_alt_ioc_active && ioc->alt_ioc) {
2317 				dprintk(ioc, printk(MYIOC_s_INFO_FMT
2318 				    "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
2319 				CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2320 				ioc->alt_ioc->active = 1;
2325 			    "NOT READY WARNING!\n", ioc->name);
2334 	if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
2335 		if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
2339 			    ": alt-ioc Not ready WARNING!\n",
2340 			    ioc->alt_ioc->name);
2345 		if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
2351 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2352 		    "Retry IocFacts failed rc=%x\n", ioc->name, rc));
2355 		MptDisplayIocCapabilities(ioc);
2359 		if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
2360 			dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2362 			    ioc->name, rc));
2365 			rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
2368 			dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2369 			    "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
2373 			MptDisplayIocCapabilities(ioc->alt_ioc);
2378 	    (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2379 		pci_release_selected_regions(ioc->pcidev, ioc->bars);
2380 		ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2382 		if (pci_enable_device(ioc->pcidev))
2384 		if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2395 		ioc->pci_irq = -1;
2396 		if (ioc->pcidev->irq) {
2397 			if (ioc->msi_enable && !pci_enable_msi(ioc->pcidev))
2399 				    ioc->name);
2401 				ioc->msi_enable = 0;
2402 			rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2403 			    IRQF_SHARED, ioc->name, ioc);
2407 				    ioc->name, ioc->pcidev->irq);
2408 				if (ioc->msi_enable)
2409 					pci_disable_msi(ioc->pcidev);
2414 			ioc->pci_irq = ioc->pcidev->irq;
2415 			pci_set_master(ioc->pcidev);		/* ?? */
2416 			pci_set_drvdata(ioc->pcidev, ioc);
2417 			dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2418 			    "installed at interrupt %d\n", ioc->name,
2419 			    ioc->pcidev->irq));
2426 	 * If fails, continue with alt-ioc processing
2428 	dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "PrimeIocFifos\n",
2429 	    ioc->name));
2430 	if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2434 	 * If fails, continue with alt-ioc processing
2436 	dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "SendIocInit\n",
2437 	    ioc->name));
2438 	if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2441 	if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2443 		    ": alt-ioc (%d) FIFO mgmt alloc WARNING!\n",
2444 		    ioc->alt_ioc->name, rc);
2450 		if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2454 				": alt-ioc: (%d) init failure WARNING!\n",
2455 					ioc->alt_ioc->name, rc);
2460 		if (ioc->upload_fw) {
2461 			ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2462 			    "firmware upload required!\n", ioc->name));
2467 				rc = mpt_do_upload(ioc, sleepFlag);
2469 					if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2477 						ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2479 						    ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2480 						ioc->cached_fw = NULL;
2484 					    "firmware upload failure!\n", ioc->name);
2494 	if ((ret == 0) && (!ioc->facts.EventState)) {
2495 		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2497 		    ioc->name));
2498 		ret = SendEventNotification(ioc, 1, sleepFlag);	/* 1=Enable */
2501 	if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2502 		rc = SendEventNotification(ioc->alt_ioc, 1, sleepFlag);
2506 		CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2507 		ioc->active = 1;
2509 	if (rc == 0) {	/* alt ioc */
2510 		if (reset_alt_ioc_active && ioc->alt_ioc) {
2512 			dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "alt-ioc"
2514 				ioc->alt_ioc->name));
2515 			CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2517 			ioc->alt_ioc->active = 1;
2533 		mutex_init(&ioc->raid_data.inactive_list_mutex);
2534 		INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2536 		switch (ioc->bus_type) {
2540 			if(ioc->facts.IOCExceptions &
2542 				ret = mptbase_sas_persist_operation(ioc,
2550 			mpt_findImVolumes(ioc);
2554 			mpt_read_ioc_pg_1(ioc);
2559 			if ((ioc->pfacts[0].ProtocolFlags &
2561 			    (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2566 				(void) GetLanConfigPages(ioc);
2567 				a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2568 				dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2571 					ioc->name, a[5], a[4],
2579 			mpt_GetScsiPortSettings(ioc, 0);
2583 			mpt_readScsiDevicePageHeaders(ioc, 0);
2587 			if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2588 				mpt_findImVolumes(ioc);
2592 			mpt_read_ioc_pg_1(ioc);
2594 			mpt_read_ioc_pg_4(ioc);
2599 		GetIoUnitPage2(ioc);
2600 		mpt_get_manufacturing_pg_0(ioc);
2605 		free_irq(ioc->pci_irq, ioc);
2606 		if (ioc->msi_enable)
2607 			pci_disable_msi(ioc->pcidev);
2615  *	@ioc: Pointer to MPT adapter structure
2626 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2633 	dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2635 	    ioc->name, pci_name(pdev), pdev->bus->number,
2649 			if (ioc->alt_ioc != NULL) {
2652 				    ioc->name, ioc->name, ioc->alt_ioc->name);
2661 			dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2663 				ioc->name, ioc->name, ioc_srch->name));
2664 			ioc_srch->alt_ioc = ioc;
2665 			ioc->alt_ioc = ioc_srch;
2674  *	@ioc: Pointer to MPT adapter structure
2677 mpt_adapter_disable(MPT_ADAPTER *ioc)
2682 	if (ioc->cached_fw != NULL) {
2683 		ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2684 			"%s: Pushing FW onto adapter\n", __func__, ioc->name));
2685 		if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2686 		    ioc->cached_fw, CAN_SLEEP)) < 0) {
2689 			    ioc->name, ret);
2696 	if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY) {
2697 		if (!SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET,
2699 			if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY)
2701 				    "reset failed to put ioc in ready state!\n",
2702 				    ioc->name, __func__);
2705 			    "failed!\n", ioc->name, __func__);
2710 	synchronize_irq(ioc->pcidev->irq);
2711 	CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2712 	ioc->active = 0;
2715 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2716 	CHIPREG_READ32(&ioc->chip->IntStatus);
2718 	if (ioc->alloc != NULL) {
2719 		sz = ioc->alloc_sz;
2720 		dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free  @ %p, sz=%d bytes\n",
2721 		    ioc->name, ioc->alloc, ioc->alloc_sz));
2722 		pci_free_consistent(ioc->pcidev, sz,
2723 				ioc->alloc, ioc->alloc_dma);
2724 		ioc->reply_frames = NULL;
2725 		ioc->req_frames = NULL;
2726 		ioc->alloc = NULL;
2727 		ioc->alloc_total -= sz;
2730 	if (ioc->sense_buf_pool != NULL) {
2731 		sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2732 		pci_free_consistent(ioc->pcidev, sz,
2733 				ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2734 		ioc->sense_buf_pool = NULL;
2735 		ioc->alloc_total -= sz;
2738 	if (ioc->events != NULL){
2740 		kfree(ioc->events);
2741 		ioc->events = NULL;
2742 		ioc->alloc_total -= sz;
2745 	mpt_free_fw_memory(ioc);
2747 	kfree(ioc->spi_data.nvram);
2748 	mpt_inactive_raid_list_free(ioc);
2749 	kfree(ioc->raid_data.pIocPg2);
2750 	kfree(ioc->raid_data.pIocPg3);
2751 	ioc->spi_data.nvram = NULL;
2752 	ioc->raid_data.pIocPg3 = NULL;
2754 	if (ioc->spi_data.pIocPg4 != NULL) {
2755 		sz = ioc->spi_data.IocPg4Sz;
2756 		pci_free_consistent(ioc->pcidev, sz,
2757 			ioc->spi_data.pIocPg4,
2758 			ioc->spi_data.IocPg4_dma);
2759 		ioc->spi_data.pIocPg4 = NULL;
2760 		ioc->alloc_total -= sz;
2763 	if (ioc->ReqToChain != NULL) {
2764 		kfree(ioc->ReqToChain);
2765 		kfree(ioc->RequestNB);
2766 		ioc->ReqToChain = NULL;
2769 	kfree(ioc->ChainToChain);
2770 	ioc->ChainToChain = NULL;
2772 	if (ioc->HostPageBuffer != NULL) {
2773 		if((ret = mpt_host_page_access_control(ioc,
2777 			    ioc->name, __func__, ret);
2779 		dexitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2781 			ioc->name, ioc->HostPageBuffer,
2782 			ioc->HostPageBuffer_sz));
2783 		pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2784 		    ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2785 		ioc->HostPageBuffer = NULL;
2786 		ioc->HostPageBuffer_sz = 0;
2787 		ioc->alloc_total -= ioc->HostPageBuffer_sz;
2790 	pci_set_drvdata(ioc->pcidev, NULL);
2795  *	@ioc: Pointer to MPT adapter structure
2801 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2805 	if (ioc == NULL)
2808 	sz_first = ioc->alloc_total;
2810 	mpt_adapter_disable(ioc);
2812 	if (ioc->pci_irq != -1) {
2813 		free_irq(ioc->pci_irq, ioc);
2814 		if (ioc->msi_enable)
2815 			pci_disable_msi(ioc->pcidev);
2816 		ioc->pci_irq = -1;
2819 	if (ioc->memmap != NULL) {
2820 		iounmap(ioc->memmap);
2821 		ioc->memmap = NULL;
2824 	pci_disable_device(ioc->pcidev);
2825 	pci_release_selected_regions(ioc->pcidev, ioc->bars);
2828 	if (ioc->mtrr_reg > 0) {
2829 		mtrr_del(ioc->mtrr_reg, 0, 0);
2830 		dprintk(ioc, printk(MYIOC_s_INFO_FMT "MTRR region de-registered\n", ioc->name));
2835 	list_del(&ioc->list);
2837 	sz_last = ioc->alloc_total;
2838 	dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2839 	    ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2841 	if (ioc->alt_ioc)
2842 		ioc->alt_ioc->alt_ioc = NULL;
2844 	kfree(ioc);
2850  *	@ioc: Pointer to MPT adapter structure
2853 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2857 	printk(KERN_INFO "%s: ", ioc->name);
2858 	if (ioc->prod_name)
2859 		printk("%s: ", ioc->prod_name);
2862 	if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2867 	if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2872 	if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2881 	if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2893  *	@ioc: Pointer to MPT_ADAPTER structure
2906 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2917 	ioc_state = mpt_GetIocState(ioc, 0);
2918 	dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2927 				ioc->name);
2933 		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2934 		    "IOC is in READY state\n", ioc->name));
2944 		    ioc->name);
2946 		    ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2953 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2954 				ioc->name));
2962 		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2964 			ioc->name, whoinit, statefault, force));
2969 				if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2976 	hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2986 	while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2992 			if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2993 				printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
3001 			if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
3002 				printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
3011 				ioc->name, ioc_state, (int)((ii+5)/HZ));
3024 		printk(MYIOC_s_INFO_FMT "Recovered from %s\n", ioc->name,
3034  *	@ioc: Pointer to MPT_ADAPTER structure
3041 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
3046 	s = CHIPREG_READ32(&ioc->chip->Doorbell);
3050 	ioc->last_state = sc;
3058  *	@ioc: Pointer to MPT_ADAPTER structure
3065 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
3077 	if (ioc->last_state == MPI_IOC_STATE_RESET) {
3080 		    ioc->name, ioc->last_state);
3084 	facts = &ioc->facts;
3097 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3099 	    ioc->name, req_sz, reply_sz));
3104 	r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
3122 			if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
3123 				ioc->FirstWhoInit = facts->WhoInit;
3155 		if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
3157 			ioc->ir_firmware = 1;
3188 					ioc->name);
3194 		ioc->NB_for_64_byte_frame = vv;
3200 		ioc->NBShiftFactor  = shiftFactor;
3201 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3203 		    ioc->name, vv, shiftFactor, r));
3210 			ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
3211 			ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
3212 			ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
3213 			ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
3215 			dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
3216 				ioc->name, ioc->reply_sz, ioc->reply_depth));
3217 			dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz  =%3d, req_depth  =%4d\n",
3218 				ioc->name, ioc->req_sz, ioc->req_depth));
3221 			if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
3227 		     ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
3238  *	@ioc: Pointer to MPT_ADAPTER structure
3245 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3255 	if (ioc->last_state == MPI_IOC_STATE_RESET) {
3257 		    ioc->name, ioc->last_state );
3261 	pfacts = &ioc->pfacts[portnum];
3275 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
3276 			ioc->name, portnum));
3281 	ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
3299 	max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
3301 	ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
3302 	ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
3310 		ioc->devices_per_bus = 1;
3311 		ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
3320  *	@ioc: Pointer to MPT_ADAPTER structure
3328 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
3347 	if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
3348 		ioc->upload_fw = 1;
3350 		ioc->upload_fw = 0;
3351 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
3352 		   ioc->name, ioc->upload_fw, ioc->facts.Flags));
3354 	ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
3355 	ioc_init.MaxBuses = (U8)ioc->number_of_buses;
3357 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
3358 		   ioc->name, ioc->facts.MsgVersion));
3359 	if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
3364 		if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
3365 			ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
3366 		} else if(mpt_host_page_alloc(ioc, &ioc_init))
3369 	ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz);	/* in BYTES */
3371 	if (ioc->sg_addr_size == sizeof(u64)) {
3375 		ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
3376 		ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
3383 	ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
3384 	ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
3385 	ioc->facts.MaxDevices = ioc_init.MaxDevices;
3386 	ioc->facts.MaxBuses = ioc_init.MaxBuses;
3388 	dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
3389 			ioc->name, &ioc_init));
3391 	r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
3394 		printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
3402 	dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
3403 			ioc->name, &ioc_init));
3405 	if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
3406 		printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
3416 	state = mpt_GetIocState(ioc, 1);
3426 					ioc->name, (int)((count+5)/HZ));
3430 		state = mpt_GetIocState(ioc, 1);
3433 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3434 			ioc->name, count));
3436 	ioc->aen_event_read_flag=0;
3443  *	@ioc: Pointer to MPT_ADAPTER structure
3452 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3473 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3474 			ioc->name, portnum, &port_enable));
3478 	if (ioc->ir_firmware || ioc->bus_type == SAS) {
3479 		rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3483 		rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3492  *	@ioc: Pointer to MPT_ADAPTER structure
3501 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3505 	if (ioc->cached_fw) {
3509 	else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3510 		ioc->cached_fw = ioc->alt_ioc->cached_fw;  /* use alt_ioc's memory */
3511 		ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3515 	ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma);
3516 	if (!ioc->cached_fw) {
3518 		    ioc->name);
3521 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3522 		    ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3523 		ioc->alloc_total += size;
3532  *	@ioc: Pointer to MPT_ADAPTER structure
3534  *	If alt_img is NULL, delete from ioc structure.
3538 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3542 	if (!ioc->cached_fw)
3545 	sz = ioc->facts.FWImageSize;
3546 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3547 		 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3548 	pci_free_consistent(ioc->pcidev, sz, ioc->cached_fw, ioc->cached_fw_dma);
3549 	ioc->alloc_total -= sz;
3550 	ioc->cached_fw = NULL;
3556  *	@ioc: Pointer to MPT_ADAPTER structure
3568 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3580 	if ((sz = ioc->facts.FWImageSize) == 0)
3583 	if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3586 	dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3587 	    ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3589 	prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3590 	    kzalloc(ioc->req_sz, GFP_KERNEL);
3592 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3593 		    "while allocating memory \n", ioc->name));
3594 		mpt_free_fw_memory(ioc);
3613 	ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3615 	    ioc->SGE_size;
3616 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
3617 	    " (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
3618 	    ioc->facts.FWImageSize, request_size));
3619 	DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3621 	ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
3624 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Upload completed "
3625 	    "rc=%x \n", ioc->name, ii));
3636 		    ioc->facts.FWImageSize ==
3640 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3641 			ioc->name, cmdStatus));
3645 		ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed, "
3646 		    "freeing image \n", ioc->name));
3647 		mpt_free_fw_memory(ioc);
3657  *	@ioc: Pointer to MPT_ADAPTER structure
3669 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3681 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3682 				ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3684 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3685 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3686 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3687 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3688 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3689 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3691 	CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3700 	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3701 	CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3704 		diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3706 			ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3707 				ioc->name, count));
3719 		ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3721 		ioc->name, diag0val));
3725 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3726 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3727 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3728 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3729 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3730 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3733 	CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3741 	if (ioc->errata_flag_1064)
3742 		pci_enable_io_access(ioc->pcidev);
3744 	CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3745 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3746 		ioc->name, pFwHeader->LoadStartAddress));
3748 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3749 				ioc->name, fwSize*4, ptrFw));
3751 		CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3763 		ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3764 						ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3765 		CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3768 			CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3774 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name, 	pFwHeader->IopResetRegAddr));
3775 	CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3778 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3779 	CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3784 	if (ioc->bus_type == SPI) {
3789 		CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3790 		diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3792 		CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3793 		CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3795 	} else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3796 		diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3797 		CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3808 	if (ioc->errata_flag_1064)
3809 		pci_disable_io_access(ioc->pcidev);
3811 	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3812 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3814 		ioc->name, diag0val));
3816 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3817 		ioc->name, diag0val));
3818 	CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3821 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3823 	if (ioc->bus_type == SAS) {
3824 		ioc_state = mpt_GetIocState(ioc, 0);
3825 		if ( (GetIocFacts(ioc, sleepFlag,
3827 			ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3828 					ioc->name, ioc_state));
3834 		if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3835 			ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3837 				ioc->name, count, ioc_state));
3838 			if (ioc->bus_type == SAS) {
3841 			if ((SendIocInit(ioc, sleepFlag)) != 0) {
3842 				ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3844 					ioc->name));
3847 			ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3849 					ioc->name));
3858 	ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3859 		"downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3866  *	@ioc: Pointer to MPT_ADAPTER structure
3890 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3896 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3897 	if (ioc->bus_type == SPI) {
3901 		SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3910 	hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3914 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3915 		ioc->name));
3919 		ioc_state = mpt_GetIocState(ioc, 1);
3921 			dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3922  					ioc->name, cnt));
3932 	dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3933 		ioc->name, mpt_GetIocState(ioc, 0)));
3940  *	@ioc: Pointer to MPT_ADAPTER structure
3957 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3968 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3970 	if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3975 		drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3976 			"address=%p\n",  ioc->name, __func__,
3977 			&ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3978 		CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3992 				(*(MptResetHandlers[cb_idx]))(ioc,
3997 			doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4000 			drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4003 				ioc->name, doorbell, count));
4019 	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4021 	if (ioc->debug_level & MPT_DEBUG) {
4022 		if (ioc->alt_ioc)
4023 			diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4024 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
4025 			ioc->name, diag0val, diag1val));
4036 			CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4037 			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4038 			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4039 			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4040 			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4041 			CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4053 						ioc->name, diag0val);
4058 			diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4060 			dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
4061 					ioc->name, diag0val));
4064 		if (ioc->debug_level & MPT_DEBUG) {
4065 			if (ioc->alt_ioc)
4066 				diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4067 			dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
4068 				ioc->name, diag0val, diag1val));
4074 		CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
4081 		CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
4083 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
4084 				ioc->name));
4095 					ioc, MPT_IOC_PRE_RESET);
4096 				if (ioc->alt_ioc) {
4098 					ioc->alt_ioc, MPT_IOC_PRE_RESET);
4103 		if (ioc->cached_fw)
4104 			cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
4105 		else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
4106 			cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
4115 				diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4120 				dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
4121 					ioc->name, diag0val, count));
4129 			if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
4131 					"firmware downloadboot failure (%d)!\n", ioc->name, count);
4142 				doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4145 				drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4147 				    " count=%d\n", ioc->name, doorbell, count));
4163 				    "after reset! IocState=%x", ioc->name,
4168 	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4169 	if (ioc->debug_level & MPT_DEBUG) {
4170 		if (ioc->alt_ioc)
4171 			diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4172 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
4173 			ioc->name, diag0val, diag1val));
4179 	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4185 		CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4186 		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4187 		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4188 		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4189 		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4190 		CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4202 					ioc->name, diag0val);
4205 		diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4208 	CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
4209 	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4212 				ioc->name);
4217 	CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
4221 	diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4224 				ioc->name, diag0val);
4228 	if (ioc->debug_level & MPT_DEBUG) {
4229 		if (ioc->alt_ioc)
4230 			diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4231 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
4232 			ioc->name, diag0val, diag1val));
4238 	ioc->facts.EventState = 0;
4240 	if (ioc->alt_ioc)
4241 		ioc->alt_ioc->facts.EventState = 0;
4249  *	@ioc: Pointer to MPT_ADAPTER structure
4259 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
4265 	drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
4266 			ioc->name, reset_type));
4267 	CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
4268 	if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4276 	while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
4285 			    ioc->name, state, (int)((count+5)/HZ));
4300 	if (ioc->facts.Function)
4301 		ioc->facts.EventState = 0;
4309  *	@ioc: Pointer to MPT_ADAPTER structure
4315 initChainBuffers(MPT_ADAPTER *ioc)
4324 	if (ioc->ReqToChain == NULL) {
4325 		sz = ioc->req_depth * sizeof(int);
4330 		ioc->ReqToChain = (int *) mem;
4331 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc  @ %p, sz=%d bytes\n",
4332 			 	ioc->name, mem, sz));
4337 		ioc->RequestNB = (int *) mem;
4338 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc  @ %p, sz=%d bytes\n",
4339 			 	ioc->name, mem, sz));
4341 	for (ii = 0; ii < ioc->req_depth; ii++) {
4342 		ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
4355 	scale = ioc->req_sz / ioc->SGE_size;
4356 	if (ioc->sg_addr_size == sizeof(u64))
4357 		num_sge =  scale + (ioc->req_sz - 60) / ioc->SGE_size;
4359 		num_sge =  1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;
4361 	if (ioc->sg_addr_size == sizeof(u64)) {
4362 		numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
4363 			(ioc->req_sz - 60) / ioc->SGE_size;
4365 		numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
4366 		    scale + (ioc->req_sz - 64) / ioc->SGE_size;
4368 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
4369 		ioc->name, num_sge, numSGE));
4371 	if (ioc->bus_type == FC) {
4386 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
4387 		ioc->name, numSGE, num_sge, num_chain));
4389 	if (ioc->bus_type == SPI)
4391 	else if (ioc->bus_type == SAS)
4396 	ioc->num_chain = num_chain;
4399 	if (ioc->ChainToChain == NULL) {
4404 		ioc->ChainToChain = (int *) mem;
4405 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
4406 			 	ioc->name, mem, sz));
4408 		mem = (u8 *) ioc->ChainToChain;
4417  *	@ioc: Pointer to MPT_ADAPTER structure
4426 PrimeIocFifos(MPT_ADAPTER *ioc)
4439 	if (ioc->reply_frames == NULL) {
4440 		if ( (num_chain = initChainBuffers(ioc)) < 0)
4445 		if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
4446 		    ioc->dma_mask > DMA_BIT_MASK(35)) {
4447 			if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
4448 			    && !pci_set_consistent_dma_mask(ioc->pcidev,
4451 				d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4454 				    ioc->name));
4457 				pci_set_dma_mask(ioc->pcidev,
4459 				pci_set_consistent_dma_mask(ioc->pcidev,
4465 				    ioc->name);
4470 		total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4471 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4472 			 	ioc->name, ioc->reply_sz, ioc->reply_depth));
4473 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4474 			 	ioc->name, reply_sz, reply_sz));
4476 		sz = (ioc->req_sz * ioc->req_depth);
4477 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4478 			 	ioc->name, ioc->req_sz, ioc->req_depth));
4479 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4480 			 	ioc->name, sz, sz));
4483 		sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4484 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4485 			 	ioc->name, ioc->req_sz, num_chain));
4486 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4487 			 	ioc->name, sz, sz, num_chain));
4490 		mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
4493 				ioc->name);
4497 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4498 			 	ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4501 		ioc->alloc_total += total_size;
4502 		ioc->alloc = mem;
4503 		ioc->alloc_dma = alloc_dma;
4504 		ioc->alloc_sz = total_size;
4505 		ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4506 		ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4508 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4509 	 		ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4516 		ioc->req_frames = (MPT_FRAME_HDR *) mem;
4517 		ioc->req_frames_dma = alloc_dma;
4519 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4520 			 	ioc->name, mem, (void *)(ulong)alloc_dma));
4522 		ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4530 		ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
4533 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MTRR region registered (base:size=%08x:%x)\n",
4534 				ioc->name, ioc->req_frames_dma, sz));
4537 		for (i = 0; i < ioc->req_depth; i++) {
4538 			alloc_dma += ioc->req_sz;
4539 			mem += ioc->req_sz;
4542 		ioc->ChainBuffer = mem;
4543 		ioc->ChainBufferDMA = alloc_dma;
4545 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4546 			ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4551 		INIT_LIST_HEAD(&ioc->FreeChainQ);
4555 		mem = (u8 *)ioc->ChainBuffer;
4558 			list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4559 			mem += ioc->req_sz;
4564 		alloc_dma = ioc->req_frames_dma;
4565 		mem = (u8 *) ioc->req_frames;
4567 		spin_lock_irqsave(&ioc->FreeQlock, flags);
4568 		INIT_LIST_HEAD(&ioc->FreeQ);
4569 		for (i = 0; i < ioc->req_depth; i++) {
4573 			list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4575 			mem += ioc->req_sz;
4577 		spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4579 		sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4580 		ioc->sense_buf_pool =
4581 			pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
4582 		if (ioc->sense_buf_pool == NULL) {
4584 				ioc->name);
4588 		ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4589 		ioc->alloc_total += sz;
4590 		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4591  			ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4597 	alloc_dma = ioc->alloc_dma;
4598 	dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4599 	 	ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4601 	for (i = 0; i < ioc->reply_depth; i++) {
4603 		CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4604 		alloc_dma += ioc->reply_sz;
4607 	if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4608 	    ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
4609 	    ioc->dma_mask))
4610 		d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4611 		    "restoring 64 bit addressing\n", ioc->name));
4617 	if (ioc->alloc != NULL) {
4618 		sz = ioc->alloc_sz;
4619 		pci_free_consistent(ioc->pcidev,
4621 				ioc->alloc, ioc->alloc_dma);
4622 		ioc->reply_frames = NULL;
4623 		ioc->req_frames = NULL;
4624 		ioc->alloc_total -= sz;
4626 	if (ioc->sense_buf_pool != NULL) {
4627 		sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4628 		pci_free_consistent(ioc->pcidev,
4630 				ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
4631 		ioc->sense_buf_pool = NULL;
4634 	if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4635 	    DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
4637 		d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4638 		    "restoring 64 bit addressing\n", ioc->name));
4647  *	@ioc: Pointer to MPT_ADAPTER structure
4663 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4673 	ioc->hs_reply_idx = 0;
4674 	mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4682 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4683 	CHIPREG_WRITE32(&ioc->chip->Doorbell,
4690 	if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4693 	dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4694 			ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4697 	if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4705 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4706 	if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4723 			CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4724 			if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4728 		dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4729 		DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4731 		dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4732 				ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4737 		if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4740 		dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4741 				ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4747 			u16reply[ii] = ioc->hs_reply[ii];
4758  *	@ioc: Pointer to MPT_ADAPTER structure
4769 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4780 			intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4788 			intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4796 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4797 				ioc->name, count));
4802 			ioc->name, count, intstat);
4809  *	@ioc: Pointer to MPT_ADAPTER structure
4819 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4828 			intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4836 			intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4845 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4846 				ioc->name, count, howlong));
4851 			ioc->name, count, intstat);
4858  *	@ioc: Pointer to MPT_ADAPTER structure
4869 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4874 	u16 *hs_reply = ioc->hs_reply;
4875 	volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4884 	if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4887 		hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4888 		CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4889 		if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4892 			hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4893 			CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4897 	dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4898 			ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4906 		if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4908 		hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4910 		if (u16cnt < ARRAY_SIZE(ioc->hs_reply))
4912 		CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4915 	if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4917 	CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4921 				ioc->name);
4933 	dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4934 	DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4936 	dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4937 			ioc->name, t, u16cnt/2));
4944  *	@ioc: Pointer to MPT_ADAPTER structure
4953 GetLanConfigPages(MPT_ADAPTER *ioc)
4977 	if ((rc = mpt_config(ioc, &cfg)) != 0)
4982 		ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4989 			if ((rc = mpt_config(ioc, &cfg)) == 0) {
4992 				memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4996 			pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
5020 	if ((rc = mpt_config(ioc, &cfg)) != 0)
5028 	ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
5034 		if ((rc = mpt_config(ioc, &cfg)) == 0) {
5037 			memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
5040 		pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
5055  *	@ioc: Pointer to MPT_ADAPTER structure
5069 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
5078 	mutex_lock(&ioc->mptbase_cmds.mutex);
5081 	memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
5082 	INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
5101 	if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5114 	mpt_put_msg_frame(mpt_base_index, ioc, mf);
5115 	timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done, 10*HZ);
5116 	if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
5119 		if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
5124 			       ioc->name, __func__, mpt_GetIocState(ioc, 0));
5125 			mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP);
5126 			mpt_free_msg_frame(ioc, mf);
5131 	if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
5137 	    (SasIoUnitControlReply_t *)ioc->mptbase_cmds.reply;
5148 	CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
5149 	mutex_unlock(&ioc->mptbase_cmds.mutex);
5156 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
5181 			ioc->name, disk, volume);
5184 			ioc->name, volume);
5190 			ioc->name);
5196 			ioc->name);
5201 			ioc->name);
5206 			ioc->name,
5224 			ioc->name, disk);
5229 			ioc->name);
5234 			ioc->name);
5239 			ioc->name);
5244 			ioc->name,
5270 			ioc->name, disk);
5275 			ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
5280 			ioc->name, disk);
5288  *	@ioc: Pointer to MPT_ADAPTER structure
5297 GetIoUnitPage2(MPT_ADAPTER *ioc)
5318 	if ((rc = mpt_config(ioc, &cfg)) != 0)
5327 	ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
5334 		if ((rc = mpt_config(ioc, &cfg)) == 0)
5335 			ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
5337 		pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
5346  *	@ioc: Pointer to a Adapter Strucutre
5365 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
5376 	if (!ioc->spi_data.nvram) {
5384 		ioc->spi_data.nvram = (int *) mem;
5386 		dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
5387 			ioc->name, ioc->spi_data.nvram, sz));
5393 		ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
5408 	if (mpt_config(ioc, &cfg) != 0)
5412 		pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5416 			if (mpt_config(ioc, &cfg) != 0) {
5417 				ioc->spi_data.maxBusWidth = MPT_NARROW;
5418 				ioc->spi_data.maxSyncOffset = 0;
5419 				ioc->spi_data.minSyncFactor = MPT_ASYNC;
5420 				ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
5422 				ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5424 					ioc->name, ioc->spi_data.minSyncFactor));
5433 					ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
5434 					ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5436 						ioc->name, pPP0->Capabilities));
5438 				ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
5441 					ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
5443 					ioc->spi_data.minSyncFactor = (u8) (data >> 8);
5444 					ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5446 						ioc->name, ioc->spi_data.minSyncFactor));
5448 					ioc->spi_data.maxSyncOffset = 0;
5449 					ioc->spi_data.minSyncFactor = MPT_ASYNC;
5452 				ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
5456 				if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
5457 					(ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE))  {
5459 					if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
5460 						ioc->spi_data.minSyncFactor = MPT_ULTRA;
5461 						ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5463 							ioc->name, ioc->spi_data.minSyncFactor));
5468 				pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5484 	if (mpt_config(ioc, &cfg) != 0)
5490 		pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5494 			if (mpt_config(ioc, &cfg) != 0) {
5498 			} else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
5528 				  ioc->spi_data.nvram[ii] = data;
5537 				ioc->spi_data.bus_reset =
5546 				ioc->spi_data.PortFlags = data;
5551 					ioc->spi_data.nvram[ii] = data;
5555 			pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5570  *	@ioc: Pointer to a Adapter Strucutre
5577 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5594 	if (mpt_config(ioc, &cfg) != 0)
5597 	ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5598 	ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5604 	if (mpt_config(ioc, &cfg) != 0)
5607 	ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5608 	ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5610 	dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5611 			ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5613 	dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5614 			ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5620  * @ioc : pointer to per adapter structure
5623 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5627 	if (list_empty(&ioc->raid_data.inactive_list))
5630 	mutex_lock(&ioc->raid_data.inactive_list_mutex);
5632 	    &ioc->raid_data.inactive_list, list) {
5636 	mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5642  * @ioc : pointer to per adapter structure
5647 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5665 	if (mpt_config(ioc, &cfg) != 0)
5671 	buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5680 	if (mpt_config(ioc, &cfg) != 0)
5695 	mutex_lock(&ioc->raid_data.inactive_list_mutex);
5697 		if(mpt_raid_phys_disk_pg0(ioc,
5713 		    &ioc->raid_data.inactive_list);
5715 	mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5719 		pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5725  *	@ioc: Pointer to a Adapter Structure
5726  *	@phys_disk_num: io unit unique phys disk num generated by the ioc
5735 mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num,
5754 	if (mpt_config(ioc, &cfg) != 0) {
5764 	buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5776 	if (mpt_config(ioc, &cfg) != 0) {
5788 		pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5796  *	@ioc: Pointer to a Adapter Structure
5797  *	@phys_disk_num: io unit unique phys disk num generated by the ioc
5803 mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, u8 phys_disk_num)
5821 	if (mpt_config(ioc, &cfg) != 0) {
5831 	buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5843 	if (mpt_config(ioc, &cfg) != 0) {
5852 		pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5861  *	@ioc: Pointer to a Adapter Structure
5862  *	@phys_disk_num: io unit unique phys disk num generated by the ioc
5871 mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
5893 	if (mpt_config(ioc, &cfg) != 0) {
5903 	buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5915 	if (mpt_config(ioc, &cfg) != 0) {
5941 		pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5951  *	@ioc: Pointer to a Adapter Strucutre
5959 mpt_findImVolumes(MPT_ADAPTER *ioc)
5970 	if (!ioc->ir_firmware)
5975 	kfree(ioc->raid_data.pIocPg2);
5976 	ioc->raid_data.pIocPg2 = NULL;
5977 	mpt_inactive_raid_list_free(ioc);
5991 	if (mpt_config(ioc, &cfg) != 0)
5998 	pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
6004 	if (mpt_config(ioc, &cfg) != 0)
6014 	ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
6016 	mpt_read_ioc_pg_3(ioc);
6019 		mpt_inactive_raid_volumes(ioc,
6024 	pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
6030 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
6041 	kfree(ioc->raid_data.pIocPg3);
6042 	ioc->raid_data.pIocPg3 = NULL;
6057 	if (mpt_config(ioc, &cfg) != 0)
6066 	pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
6075 	if (mpt_config(ioc, &cfg) == 0) {
6079 			ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
6083 	pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
6089 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
6109 	if (mpt_config(ioc, &cfg) != 0)
6115 	if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
6117 		pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
6120 		ioc->alloc_total += iocpage4sz;
6122 		ioc4_dma = ioc->spi_data.IocPg4_dma;
6123 		iocpage4sz = ioc->spi_data.IocPg4Sz;
6130 	if (mpt_config(ioc, &cfg) == 0) {
6131 		ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
6132 		ioc->spi_data.IocPg4_dma = ioc4_dma;
6133 		ioc->spi_data.IocPg4Sz = iocpage4sz;
6135 		pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
6136 		ioc->spi_data.pIocPg4 = NULL;
6137 		ioc->alloc_total -= iocpage4sz;
6142 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
6163 	if (mpt_config(ioc, &cfg) != 0)
6172 	pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
6180 	if (mpt_config(ioc, &cfg) == 0) {
6186 			dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n",
6187 					ioc->name, tmp));
6196 				if (mpt_config(ioc, &cfg) == 0) {
6197 					dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n",
6198 							ioc->name, MPT_COALESCING_TIMEOUT));
6201 					if (mpt_config(ioc, &cfg) == 0) {
6202 						dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6204 								ioc->name, MPT_COALESCING_TIMEOUT));
6206 						dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6208 								ioc->name));
6212 					dprintk(ioc, printk(MYIOC_s_WARN_FMT
6214 						ioc->name));
6219 			dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
6223 	pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
6229 mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
6245 	if (mpt_config(ioc, &cfg) != 0)
6252 	pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma);
6258 	if (mpt_config(ioc, &cfg) != 0)
6261 	memcpy(ioc->board_name, pbuf->BoardName, sizeof(ioc->board_name));
6262 	memcpy(ioc->board_assembly, pbuf->BoardAssembly, sizeof(ioc->board_assembly));
6263 	memcpy(ioc->board_tracer, pbuf->BoardTracerNumber, sizeof(ioc->board_tracer));
6268 		pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma);
6274  *	@ioc: Pointer to MPT_ADAPTER structure
6279 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch, int sleepFlag)
6291 	devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6293 	    ioc->name, EvSwitch, &evn));
6295 	return mpt_handshake_req_reply_wait(ioc, sizeof(EventNotification_t),
6303  *	@ioc: Pointer to MPT_ADAPTER structure
6307 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
6311 	if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6312 		dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
6313 		    ioc->name, __func__));
6317 	devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name));
6327 	mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
6335  *	@ioc:   Pointer to an adapter structure
6347 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
6369 		dcprintk(ioc, printk(MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
6370 				ioc->name));
6375 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6376 	if (ioc->ioc_reset_in_progress) {
6377 		dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6378 		    "%s: busy with host reset\n", ioc->name, __func__));
6379 		spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6382 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6385 	if (!ioc->active ||
6386 	    mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_OPERATIONAL) {
6387 		dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6388 		    "%s: ioc not operational, %d, %xh\n",
6389 		    ioc->name, __func__, ioc->active,
6390 		    mpt_GetIocState(ioc, 0)));
6395 	mutex_lock(&ioc->mptbase_cmds.mutex);
6397 	memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
6398 	INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
6402 	if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6403 		dcprintk(ioc, printk(MYIOC_s_WARN_FMT
6404 		"mpt_config: no msg frames!\n", ioc->name));
6460 	dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6462 	    ioc->name, page_type, pReq->Header.PageNumber, pReq->Action));
6464 	ioc->add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
6466 	mpt_put_msg_frame(mpt_base_index, ioc, mf);
6467 	timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done,
6469 	if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
6471 		dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6474 			ioc->name, page_type, pReq->Header.PageNumber,
6475 			pReq->Action, ioc->mptbase_cmds.status, timeleft));
6476 		if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
6479 			spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6480 			if (ioc->ioc_reset_in_progress) {
6481 				spin_unlock_irqrestore(&ioc->taskmgmt_lock,
6485 					__func__, ioc->name);
6488 			spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6494 	if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
6498 	pReply = (ConfigReply_t	*)ioc->mptbase_cmds.reply;
6517 		    ioc->name, ret, timeleft);
6519 	dcprintk(ioc, printk(KERN_DEBUG "IOCStatus=%04xh, IOCLogInfo=%08xh\n",
6524 	CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
6525 	mutex_unlock(&ioc->mptbase_cmds.mutex);
6530 		       ioc->name, __func__, mpt_GetIocState(ioc, 0));
6532 			if (mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP) != 0)
6535 			mpt_HardResetHandler(ioc, CAN_SLEEP);
6537 		mpt_free_msg_frame(ioc, mf);
6543 			    " action %d\n", ioc->name, page_type,
6556  *	@ioc: Pointer to the adapter structure
6562 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
6566 		ioc->taskmgmt_quiesce_io = 1;
6567 		dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6568 		    "%s: MPT_IOC_SETUP_RESET\n", ioc->name, __func__));
6571 		dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6572 		    "%s: MPT_IOC_PRE_RESET\n", ioc->name, __func__));
6575 		dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6576 		    "%s: MPT_IOC_POST_RESET\n",  ioc->name, __func__));
6578 		if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
6579 			ioc->mptbase_cmds.status |=
6581 			complete(&ioc->mptbase_cmds.done);
6584 		if (ioc->taskmgmt_cmds.status & MPT_MGMT_STATUS_PENDING) {
6585 			ioc->taskmgmt_cmds.status |=
6587 			complete(&ioc->taskmgmt_cmds.done);
6639 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan);
6643 	MPT_ADAPTER *ioc = m->private;
6645 	if (ioc) {
6646 		seq_mpt_print_ioc_summary(ioc, m, 1);
6648 		list_for_each_entry(ioc, &ioc_list, list) {
6649 			seq_mpt_print_ioc_summary(ioc, m, 1);
6726 	MPT_ADAPTER	*ioc = m->private;
6731 	mpt_get_fw_exp_ver(expVer, ioc);
6733 	seq_printf(m, "%s:", ioc->name);
6734 	if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
6736 //	if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
6740 			ioc->facts.ProductID,
6741 			ioc->prod_name);
6742 	seq_printf(m, "  FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
6743 	if (ioc->facts.FWImageSize)
6744 		seq_printf(m, " (fw_size=%d)", ioc->facts.FWImageSize);
6745 	seq_printf(m, "\n  MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
6746 	seq_printf(m, "  FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
6747 	seq_printf(m, "  EventState = 0x%02x\n", ioc->facts.EventState);
6750 			ioc->facts.CurrentHostMfaHighAddr);
6752 			ioc->facts.CurrentSenseBufferHighAddr);
6754 	seq_printf(m, "  MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
6755 	seq_printf(m, "  MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
6758 					(void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
6762 	sz = (ioc->req_sz * ioc->req_depth) + 128;
6765 					ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
6767 					4*ioc->facts.RequestFrameSize,
6768 					ioc->facts.GlobalCredits);
6771 					(void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
6772 	sz = (ioc->reply_sz * ioc->reply_depth) + 128;
6774 					ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
6776 					ioc->facts.CurReplyFrameSize,
6777 					ioc->facts.ReplyQueueDepth);
6780 			(ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
6781 	seq_printf(m, "  MaxBuses = %d\n", ioc->facts.MaxBuses);
6784 	for (p=0; p < ioc->facts.NumberOfPorts; p++) {
6787 				ioc->facts.NumberOfPorts);
6788 		if (ioc->bus_type == FC) {
6789 			if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
6790 				u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6795 					ioc->fc_port_page0[p].WWNN.High,
6796 					ioc->fc_port_page0[p].WWNN.Low,
6797 					ioc->fc_port_page0[p].WWPN.High,
6798 					ioc->fc_port_page0[p].WWPN.Low);
6821 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
6824 	if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
6826 			(ioc->facts.FWVersion.Word >> 16) & 0x00FF,	/* Month */
6827 			(ioc->facts.FWVersion.Word >> 8) & 0x1F);	/* Day */
6830 		if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
6838  *	@ioc: Pointer to MPT_ADAPTER structure
6848 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
6853 	mpt_get_fw_exp_ver(expVer, ioc);
6856 	 *  Shorter summary of attached ioc's...
6859 			ioc->name,
6860 			ioc->prod_name,
6862 			ioc->facts.FWVersion.Word,
6864 			ioc->facts.NumberOfPorts,
6865 			ioc->req_depth);
6867 	if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6868 		u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6873 	y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
6875 	if (!ioc->active)
6883 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan)
6887 	mpt_get_fw_exp_ver(expVer, ioc);
6890 	 *  Shorter summary of attached ioc's...
6893 			ioc->name,
6894 			ioc->prod_name,
6896 			ioc->facts.FWVersion.Word,
6898 			ioc->facts.NumberOfPorts,
6899 			ioc->req_depth);
6901 	if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6902 		u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6907 	seq_printf(m, ", IRQ=%d", ioc->pci_irq);
6909 	if (!ioc->active)
6917  *	@ioc: Pointer to MPT_ADAPTER structure
6924 mpt_set_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6929 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6930 	if (ioc->ioc_reset_in_progress || ioc->taskmgmt_in_progress ||
6931 	    (ioc->alt_ioc && ioc->alt_ioc->taskmgmt_in_progress)) {
6936 	ioc->taskmgmt_in_progress = 1;
6937 	ioc->taskmgmt_quiesce_io = 1;
6938 	if (ioc->alt_ioc) {
6939 		ioc->alt_ioc->taskmgmt_in_progress = 1;
6940 		ioc->alt_ioc->taskmgmt_quiesce_io = 1;
6943 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6950  *	@ioc: Pointer to MPT_ADAPTER structure
6954 mpt_clear_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6958 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6959 	ioc->taskmgmt_in_progress = 0;
6960 	ioc->taskmgmt_quiesce_io = 0;
6961 	if (ioc->alt_ioc) {
6962 		ioc->alt_ioc->taskmgmt_in_progress = 0;
6963 		ioc->alt_ioc->taskmgmt_quiesce_io = 0;
6965 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6973  *	@ioc: Pointer to MPT_ADAPTER structure
6977 mpt_halt_firmware(MPT_ADAPTER *ioc)
6981 	ioc_raw_state = mpt_GetIocState(ioc, 0);
6985 			ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6986 		panic("%s: IOC Fault (%04xh)!!!\n", ioc->name,
6989 		CHIPREG_WRITE32(&ioc->chip->Doorbell, 0xC0FFEE00);
6991 			ioc->name);
6998  *	@ioc: Pointer to MPT_ADAPTER structure
7010 mpt_SoftResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
7019 	dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SoftResetHandler Entered!\n",
7020 		ioc->name));
7022 	ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
7025 		mpt_halt_firmware(ioc);
7029 		dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7030 		    "skipping, either in FAULT or RESET state!\n", ioc->name));
7034 	if (ioc->bus_type == FC) {
7035 		dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7036 		    "skipping, because the bus type is FC!\n", ioc->name));
7040 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7041 	if (ioc->ioc_reset_in_progress) {
7042 		spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7045 	ioc->ioc_reset_in_progress = 1;
7046 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7052 			mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7055 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7056 	if (ioc->taskmgmt_in_progress) {
7057 		ioc->ioc_reset_in_progress = 0;
7058 		spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7061 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7063 	CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
7064 	ioc->active = 0;
7067 	rc = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
7071 			mpt_signal_reset(cb_idx, ioc, MPT_IOC_PRE_RESET);
7077 	ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
7083 		rc = GetIocFacts(ioc, sleepFlag,
7095 	rc = PrimeIocFifos(ioc);
7099 	rc = SendIocInit(ioc, sleepFlag);
7103 	rc = SendEventNotification(ioc, 1, sleepFlag);
7107 	if (ioc->hard_resets < -1)
7108 		ioc->hard_resets++;
7114 	ioc->active = 1;
7115 	CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
7118 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7119 	ioc->ioc_reset_in_progress = 0;
7120 	ioc->taskmgmt_quiesce_io = 0;
7121 	ioc->taskmgmt_in_progress = 0;
7122 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7124 	if (ioc->active) {	/* otherwise, hard reset coming */
7127 				mpt_signal_reset(cb_idx, ioc,
7132 	dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7134 		ioc->name, jiffies_to_msecs(jiffies - time_count)/1000,
7142  *	@ioc: Pointer to MPT_ADAPTER structure
7150 mpt_Soft_Hard_ResetHandler(MPT_ADAPTER *ioc, int sleepFlag) {
7153 	ret = mpt_SoftResetHandler(ioc, sleepFlag);
7156 	ret = mpt_HardResetHandler(ioc, sleepFlag);
7168  *	@ioc: Pointer to MPT_ADAPTER structure
7183 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
7190 	dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler Entered!\n", ioc->name));
7192 	printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
7193 	printk("MF count 0x%x !\n", ioc->mfcnt);
7196 		mpt_halt_firmware(ioc);
7201 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7202 	if (ioc->ioc_reset_in_progress) {
7203 		spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7204 		ioc->wait_on_reset_completion = 1;
7207 		} while (ioc->ioc_reset_in_progress == 1);
7208 		ioc->wait_on_reset_completion = 0;
7209 		return ioc->reset_status;
7211 	if (ioc->wait_on_reset_completion) {
7212 		spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7217 	ioc->ioc_reset_in_progress = 1;
7218 	if (ioc->alt_ioc)
7219 		ioc->alt_ioc->ioc_reset_in_progress = 1;
7220 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7230 			mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7231 			if (ioc->alt_ioc)
7232 				mpt_signal_reset(cb_idx, ioc->alt_ioc,
7238 	rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag);
7242 		       rc, ioc->name, mpt_GetIocState(ioc, 0));
7244 		if (ioc->hard_resets < -1)
7245 			ioc->hard_resets++;
7248 	spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7249 	ioc->ioc_reset_in_progress = 0;
7250 	ioc->taskmgmt_quiesce_io = 0;
7251 	ioc->taskmgmt_in_progress = 0;
7252 	ioc->reset_status = rc;
7253 	if (ioc->alt_ioc) {
7254 		ioc->alt_ioc->ioc_reset_in_progress = 0;
7255 		ioc->alt_ioc->taskmgmt_quiesce_io = 0;
7256 		ioc->alt_ioc->taskmgmt_in_progress = 0;
7258 	spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7262 			mpt_signal_reset(cb_idx, ioc, MPT_IOC_POST_RESET);
7263 			if (ioc->alt_ioc)
7265 					ioc->alt_ioc, MPT_IOC_POST_RESET);
7269 	dtmprintk(ioc,
7271 		"HardResetHandler: completed (%d seconds): %s\n", ioc->name,
7280 mpt_display_event_info(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply)
7286 	char *evStr = ioc->evStr;
7712 	devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7714 	    ioc->name, event, evStr));
7716 	devtverboseprintk(ioc, printk(KERN_DEBUG MYNAM
7719 		devtverboseprintk(ioc, printk(" %08x",
7721 	devtverboseprintk(ioc, printk(KERN_DEBUG "\n"));
7727  *	@ioc: Pointer to MPT_ADAPTER structure
7736 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
7757 		mpt_display_event_info(ioc, pEventReply);
7771 			if (ioc->facts.Function) {
7772 				ioc->facts.EventState = evState;
7777 		mptbase_raid_process_event_data(ioc,
7788 	if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
7791 		idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
7793 		ioc->events[idx].event = event;
7794 		ioc->events[idx].eventContext = ioc->eventContext;
7798 				ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
7800 				ioc->events[idx].data[ii] =  0;
7803 		ioc->eventContext++;
7812 			devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7814 			    ioc->name, cb_idx));
7815 			r += (*(MptEvHandlers[cb_idx]))(ioc, pEventReply);
7825 		devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7826 			"EventAck required\n",ioc->name));
7827 		if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
7828 			devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SendEventAck returned %d\n",
7829 					ioc->name, ii));
7840  *	@ioc: Pointer to MPT_ADAPTER structure
7846 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
7878 			ioc->name, log_info, desc, (log_info & 0xFFFFFF));
7884  *	@ioc: Pointer to MPT_ADAPTER structure
7890 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
7946 	printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
8095  *	@ioc: Pointer to MPT_ADAPTER structure
8102 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info, u8 cb_idx)
8157 			ioc->name, log_info, originator_desc, code_desc,
8163 			ioc->name, log_info, originator_desc, code_desc,
8169 			ioc->name, log_info, originator_desc,
8177  *	@ioc: Pointer to MPT_ADAPTER structure
8184 mpt_iocstatus_info_config(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8249 	dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s: %s\n",
8250 	    ioc->name, ioc_status, desc, extend_desc));
8255  *	@ioc: Pointer to MPT_ADAPTER structure
8262 mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8315 		mpt_iocstatus_info_config(ioc, status, mf);
8476 	dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s\n",
8477 	    ioc->name, status, desc));

Indexes created Wed Oct 10 22:18:05 CEST 2012