Lines Matching refs:ioaddr

121 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
191 static ushort read_eeprom(int ioaddr, int index);
275 int ioaddr, int irq, int if_port,
281 dev->base_addr = ioaddr;
291 int ioaddr, isa_irq, if_port, err;
302 ioaddr = 0x200 + ((iobase & 0x1f) << 4);
314 if (!request_region(ioaddr, EL3_IO_EXTENT, "3c509-isa")) {
323 outb((ioaddr >> 4) | 0xe0, id_port);
326 if (inw(ioaddr) != 0x6d50) {
332 outw(0x0f00, ioaddr + WN0_IRQ);
334 el3_dev_fill(dev, phys_addr, ioaddr, isa_irq, if_port, EL3_ISA);
364 int ioaddr = ndev->base_addr, err;
374 outb((ioaddr >> 4) | 0xe0, id_port);
376 if (inw(ioaddr) != 0x6d50)
379 outw(0x0f00, ioaddr + WN0_IRQ);
414 int ioaddr, irq, if_port;
419 ioaddr = pnp_port_start(pdev, 0);
420 if (!request_region(ioaddr, EL3_IO_EXTENT, "3c509-pnp"))
425 phys_addr[i] = htons(read_eeprom(ioaddr, i));
426 if_port = read_eeprom(ioaddr, 8) >> 14;
429 release_region(ioaddr, EL3_IO_EXTENT);
435 el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_PNP);
615 int ioaddr, irq, if_port;
626 ioaddr = ((short)((pos4&0xfc)|0x02)) << 8;
641 ioaddr = mca_device_transform_ioport(mdev, ioaddr);
643 pr_debug("3c529: irq %d ioaddr 0x%x ifport %d\n", irq, ioaddr, if_port);
647 phys_addr[i] = htons(read_eeprom(ioaddr, i));
651 release_region(ioaddr, EL3_IO_EXTENT);
657 el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_MCA);
677 int ioaddr, irq, if_port;
685 ioaddr = edev->base_addr;
687 if (!request_region(ioaddr, EL3_IO_EXTENT, "3c579-eisa"))
691 outw(SelectWindow | 0, ioaddr + 0xC80 + EL3_CMD);
693 irq = inw(ioaddr + WN0_IRQ) >> 12;
694 if_port = inw(ioaddr + 6)>>14;
696 phys_addr[i] = htons(read_eeprom(ioaddr, i));
699 read_eeprom(ioaddr, 3);
703 release_region(ioaddr, EL3_IO_EXTENT);
709 el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_EISA);
740 static ushort read_eeprom(int ioaddr, int index)
742 outw(EEPROM_READ + index, ioaddr + 10);
746 return inw(ioaddr + 12);
775 int ioaddr = dev->base_addr;
778 outw(TxReset, ioaddr + EL3_CMD);
779 outw(RxReset, ioaddr + EL3_CMD);
780 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
789 dev->irq, ioaddr + EL3_STATUS, inw(ioaddr + EL3_STATUS));
795 dev->name, dev->irq, inw(ioaddr + EL3_STATUS));
803 int ioaddr = dev->base_addr;
807 dev->name, inb(ioaddr + TX_STATUS), inw(ioaddr + EL3_STATUS),
808 inw(ioaddr + TX_FREE));
812 outw(TxReset, ioaddr + EL3_CMD);
813 outw(TxEnable, ioaddr + EL3_CMD);
822 int ioaddr = dev->base_addr;
831 dev->name, skb->len, inw(ioaddr + EL3_STATUS));
836 ushort status = inw(ioaddr + EL3_STATUS);
838 inw(ioaddr + EL3_STATUS) & 1) { /* Make sure. */
841 inw(ioaddr + EL3_STATUS), inb(ioaddr + TX_STATUS),
842 inw(ioaddr + RX_STATUS));
844 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
846 ioaddr + EL3_CMD);
847 outw(SetStatusEnb | 0xff, ioaddr + EL3_CMD);
866 outw(skb->len, ioaddr + TX_FIFO);
867 outw(0x00, ioaddr + TX_FIFO);
869 outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
871 if (inw(ioaddr + TX_FREE) > 1536)
875 outw(SetTxThreshold + 1536, ioaddr + EL3_CMD);
886 while (--i > 0 && (tx_status = inb(ioaddr + TX_STATUS)) > 0) {
888 if (tx_status & 0x30) outw(TxReset, ioaddr + EL3_CMD);
889 if (tx_status & 0x3C) outw(TxEnable, ioaddr + EL3_CMD);
890 outb(0x00, ioaddr + TX_STATUS); /* Pop the status stack. */
902 int ioaddr, status;
908 ioaddr = dev->base_addr;
911 status = inw(ioaddr + EL3_STATUS);
915 while ((status = inw(ioaddr + EL3_STATUS)) &
925 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
934 outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
940 while (--i>0 && (tx_status = inb(ioaddr + TX_STATUS)) > 0) {
942 if (tx_status & 0x30) outw(TxReset, ioaddr + EL3_CMD);
943 if (tx_status & 0x3C) outw(TxEnable, ioaddr + EL3_CMD);
944 outb(0x00, ioaddr + TX_STATUS); /* Pop the status stack. */
949 outw(RxReset, ioaddr + EL3_CMD);
954 ioaddr + EL3_CMD);
955 outw(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
956 outw(AckIntr | AdapterFailure, ioaddr + EL3_CMD);
964 outw(AckIntr | 0xFF, ioaddr + EL3_CMD);
968 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD); /* Ack IRQ */
973 inw(ioaddr + EL3_STATUS));
1017 int ioaddr = dev->base_addr;
1022 outw(StatsDisable, ioaddr + EL3_CMD);
1025 dev->stats.tx_carrier_errors += inb(ioaddr + 0);
1026 dev->stats.tx_heartbeat_errors += inb(ioaddr + 1);
1027 /* Multiple collisions. */ inb(ioaddr + 2);
1028 dev->stats.collisions += inb(ioaddr + 3);
1029 dev->stats.tx_window_errors += inb(ioaddr + 4);
1030 dev->stats.rx_fifo_errors += inb(ioaddr + 5);
1031 dev->stats.tx_packets += inb(ioaddr + 6);
1032 /* Rx packets */ inb(ioaddr + 7);
1033 /* Tx deferrals */ inb(ioaddr + 8);
1034 inw(ioaddr + 10); /* Total Rx and Tx octets. */
1035 inw(ioaddr + 12);
1039 outw(StatsEnable, ioaddr + EL3_CMD);
1045 int ioaddr = dev->base_addr;
1050 inw(ioaddr+EL3_STATUS), inw(ioaddr+RX_STATUS));
1051 while ((rx_status = inw(ioaddr + RX_STATUS)) > 0) {
1055 outw(RxDiscard, ioaddr + EL3_CMD);
1077 insl(ioaddr + RX_FIFO, skb_put(skb,pkt_len),
1080 outw(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
1087 outw(RxDiscard, ioaddr + EL3_CMD);
1093 inw(ioaddr + EL3_STATUS); /* Delay. */
1094 while (inw(ioaddr + EL3_STATUS) & 0x1000)
1096 inw(ioaddr + EL3_STATUS) );
1110 int ioaddr = dev->base_addr;
1124 ioaddr + EL3_CMD);
1127 outw(SetRxFilter | RxStation | RxMulticast | RxBroadcast, ioaddr + EL3_CMD);
1130 outw(SetRxFilter | RxStation | RxBroadcast, ioaddr + EL3_CMD);
1137 int ioaddr = dev->base_addr;
1152 outw(0x0f00, ioaddr + WN0_IRQ);
1161 int ioaddr = dev->base_addr;
1165 tmp = inw(ioaddr + WN4_MEDIA);
1174 int ioaddr = dev->base_addr;
1178 tmp = inw(ioaddr + WN0_ADDR_CONF);
1196 tmp = inw(ioaddr + WN0_CONF_CTRL);
1205 tmp = inw(ioaddr + WN4_NETDIAG);
1219 int ioaddr = dev->base_addr;
1230 tmp = inw(ioaddr + WN0_ADDR_CONF);
1248 outw(tmp, ioaddr + WN0_ADDR_CONF);
1251 tmp = inw(ioaddr + WN0_ADDR_CONF);
1253 outw(StartCoax, ioaddr + EL3_CMD);
1260 tmp = inw(ioaddr + WN4_NETDIAG);
1265 outw(tmp, ioaddr + WN4_NETDIAG);
1332 int ioaddr = dev->base_addr;
1337 outw(StatsDisable, ioaddr + EL3_CMD);
1340 outw(RxDisable, ioaddr + EL3_CMD);
1341 outw(TxDisable, ioaddr + EL3_CMD);
1345 outw(StopCoax, ioaddr + EL3_CMD);
1349 outw(inw(ioaddr + WN4_MEDIA) & ~MEDIA_TP, ioaddr + WN4_MEDIA);
1352 outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
1361 int ioaddr = dev->base_addr;
1364 outw(0x0001, ioaddr + 4);
1367 outw((dev->irq << 12) | 0x0f00, ioaddr + WN0_IRQ);
1373 outb(dev->dev_addr[i], ioaddr + i);
1377 outw(StartCoax, ioaddr + EL3_CMD);
1382 sw_info = (read_eeprom(ioaddr, 0x14) & 0x400f) |
1383 (read_eeprom(ioaddr, 0x0d) & 0xBff0);
1386 net_diag = inw(ioaddr + WN4_NETDIAG);
1408 outw(net_diag, ioaddr + WN4_NETDIAG);
1413 outw(inw(ioaddr + WN4_MEDIA) | MEDIA_TP, ioaddr + WN4_MEDIA);
1417 outw(StatsDisable, ioaddr + EL3_CMD);
1420 inb(ioaddr + i);
1421 inw(ioaddr + 10);
1422 inw(ioaddr + 12);
1428 outw(SetRxFilter | RxStation | RxBroadcast, ioaddr + EL3_CMD);
1429 outw(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1431 outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1432 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1434 outw(SetStatusEnb | 0xff, ioaddr + EL3_CMD);
1437 ioaddr + EL3_CMD);
1439 ioaddr + EL3_CMD);
1453 int ioaddr;
1457 ioaddr = dev->base_addr;
1465 outw(PowerDown, ioaddr + EL3_CMD);
1477 int ioaddr;
1481 ioaddr = dev->base_addr;
1485 outw(PowerUp, ioaddr + EL3_CMD);