Cross Reference: /drivers/net/ethernet/3com/3c515.c

Lines Matching refs:ioaddr
175 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
367 static int corkscrew_setup(struct net_device *dev, int ioaddr,
446 static int check_device(unsigned ioaddr)
450 	if (!request_region(ioaddr, CORKSCREW_TOTAL_SIZE, "3c515"))
452 	/* Check the resource configuration for a matching ioaddr. */
453 	if ((inw(ioaddr + 0x2002) & 0x1f0) != (ioaddr & 0x1f0)) {
454 		release_region(ioaddr, CORKSCREW_TOTAL_SIZE);
458 	outw(EEPROM_Read + 7, ioaddr + Wn0EepromCmd);
462 		if ((inw(ioaddr + Wn0EepromCmd) & 0x0200) == 0)
465 	if (inw(ioaddr + Wn0EepromData) != 0x6d50) {
466 		release_region(ioaddr, CORKSCREW_TOTAL_SIZE);
488 	static int ioaddr;
526 			ioaddr = pnp_port_start(idev, 0);
528 			if (!check_device(ioaddr)) {
534 					(char*) corkscrew_isapnp_adapters[i].driver_data, ioaddr, irq);
536 		     		inl(ioaddr + 0x2002), inw(ioaddr + 0x2000));
537 			/* irq = inw(ioaddr + 0x2002) & 15; */ /* Use the irq from isapnp */
540 			err = corkscrew_setup(dev, ioaddr, idev, cards_found++);
550 	for (ioaddr = 0x100; ioaddr < 0x400; ioaddr += 0x20) {
551 		if (!check_device(ioaddr))
555 		     inl(ioaddr + 0x2002), inw(ioaddr + 0x2000));
556 		err = corkscrew_setup(dev, ioaddr, NULL, cards_found++);
579 static int corkscrew_setup(struct net_device *dev, int ioaddr,
592 		irq = inw(ioaddr + 0x2002) & 15;
595 	irq = inw(ioaddr + 0x2002) & 15;
598 	dev->base_addr = ioaddr;
600 	dev->dma = inw(ioaddr + 0x2000) & 7;
627 	pr_info("%s: 3Com %s at %#3x,", dev->name, vp->product_name, ioaddr);
636 		outw(EEPROM_Read + i, ioaddr + Wn0EepromCmd);
640 			if ((inw(ioaddr + Wn0EepromCmd) & 0x0200) == 0)
643 		eeprom[i] = inw(ioaddr + Wn0EepromData);
670 		vp->available_media = inw(ioaddr + Wn3_Options);
671 		config = inl(ioaddr + Wn3_Config);
674 				config, inw(ioaddr + Wn3_Options));
709 	int ioaddr = dev->base_addr;
717 		outb(0x20, ioaddr + Wn3_MAC_Ctrl);	/* Set the full-duplex bit. */
718 	config = inl(ioaddr + Wn3_Config);
745 	outl(config, ioaddr + Wn3_Config);
752 	outw(TxReset, ioaddr + EL3_CMD);
754 		if (!(inw(ioaddr + EL3_STATUS) & CmdInProgress))
757 	outw(RxReset, ioaddr + EL3_CMD);
760 		if (!(inw(ioaddr + EL3_STATUS) & CmdInProgress))
763 	outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
783 		       dev->name, dev->irq, inw(ioaddr + Wn4_Media));
789 		outb(dev->dev_addr[i], ioaddr + i);
791 		outw(0, ioaddr + i);
795 		outw(StartCoax, ioaddr + EL3_CMD);
797 	outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP | Media_SQE)) |
798 	     media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
801 	outw(StatsDisable, ioaddr + EL3_CMD);
804 		inb(ioaddr + i);
805 	inw(ioaddr + 10);
806 	inw(ioaddr + 12);
809 	inb(ioaddr + 12);
811 	outw(0x0040, ioaddr + Wn4_NetDiag);
839 		outl(isa_virt_to_bus(&vp->rx_ring[0]), ioaddr + UpListPtr);
843 		outb(PKT_BUF_SZ >> 8, ioaddr + TxFreeThreshold);	/* Room for a packet. */
847 		outl(0, ioaddr + DownListPtr);
851 	outw(StatsEnable, ioaddr + EL3_CMD);	/* Turn on statistics. */
855 	outw(RxEnable, ioaddr + EL3_CMD);	/* Enable the receiver. */
856 	outw(TxEnable, ioaddr + EL3_CMD);	/* Enable transmitter. */
861 	     (vp->bus_master ? DMADone : 0), ioaddr + EL3_CMD);
864 	     ioaddr + EL3_CMD);
867 	     ioaddr + EL3_CMD);
877 	int ioaddr = dev->base_addr;
888 		int old_window = inw(ioaddr + EL3_CMD) >> 13;
891 		media_status = inw(ioaddr + Wn4_Media);
943 			     ioaddr + Wn4_Media);
946 			config = inl(ioaddr + Wn3_Config);
948 			outl(config, ioaddr + Wn3_Config);
951 			     ioaddr + EL3_CMD);
968 	int ioaddr = dev->base_addr;
971 	       dev->name, inb(ioaddr + TxStatus),
972 	       inw(ioaddr + EL3_STATUS));
974 	if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
981 	pr_debug("  Down list %8.8x vs. %p.\n", inl(ioaddr + DownListPtr),
990 	outw(TxReset, ioaddr + EL3_CMD);
992 		if (!(inw(ioaddr + EL3_STATUS) & CmdInProgress))
994 	outw(TxEnable, ioaddr + EL3_CMD);
1005 	int ioaddr = dev->base_addr;
1035 		outw(DownStall, ioaddr + EL3_CMD);
1038 			if ((inw(ioaddr + EL3_STATUS) & CmdInProgress) == 0)
1042 		if (inl(ioaddr + DownListPtr) == 0) {
1044 			     ioaddr + DownListPtr);
1047 		outw(DownUnstall, ioaddr + EL3_CMD);
1061 	outl(skb->len, ioaddr + TX_FIFO);
1066 		outl((int) (skb->data), ioaddr + Wn7_MasterAddr);
1067 		outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
1069 		outw(StartDMADown, ioaddr + EL3_CMD);
1073 		outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
1075 		if (inw(ioaddr + TxFree) > 1536) {
1080 			     ioaddr + EL3_CMD);
1084 	outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
1086 	if (inw(ioaddr + TxFree) > 1536) {
1090 		outw(SetTxThreshold + (1536 >> 2), ioaddr + EL3_CMD);
1099 		while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
1110 					outw(TxReset, ioaddr + EL3_CMD);
1112 						if (!(inw(ioaddr + EL3_STATUS) & CmdInProgress))
1115 				outw(TxEnable, ioaddr + EL3_CMD);
1117 			outb(0x00, ioaddr + TxStatus);	/* Pop the status stack. */
1131 	int ioaddr, status;
1135 	ioaddr = dev->base_addr;
1136 	latency = inb(ioaddr + Timer);
1140 	status = inw(ioaddr + EL3_STATUS);
1169 			outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
1177 				if (inl(ioaddr + DownListPtr) == isa_virt_to_bus(&lp->tx_ring[entry]))
1186 			outw(AckIntr | DownComplete, ioaddr + EL3_CMD);
1194 			outw(0x1000, ioaddr + Wn7_MasterStatus);	/* Ack the event. */
1201 			outw(AckIntr | UpComplete, ioaddr + EL3_CMD);
1207 				outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
1213 				update_stats(ioaddr, dev);
1216 				if (DoneDidThat == 0 && inw(ioaddr + EL3_STATUS) & StatsFull) {
1224 							pr_cont(" %2.2x", inb(ioaddr + reg));
1231 					     TxComplete, ioaddr + EL3_CMD);
1237 				outw(RxReset, ioaddr + EL3_CMD);
1240 				outw(RxEnable, ioaddr + EL3_CMD);	/* Re-enable the receiver. */
1242 				     ioaddr + EL3_CMD);
1250 			outw(SetStatusEnb | ((~status) & 0x7FE), ioaddr + EL3_CMD);
1251 			outw(AckIntr | 0x7FF, ioaddr + EL3_CMD);
1255 		outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
1257 	} while ((status = inw(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
1268 	int ioaddr = dev->base_addr;
1274 		     inw(ioaddr + EL3_STATUS), inw(ioaddr + RxStatus));
1275 	while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
1277 			unsigned char rx_error = inb(ioaddr + RxErrors);
1304 				insl(ioaddr + RX_FIFO,
1307 				outw(RxDiscard, ioaddr + EL3_CMD);	/* Pop top Rx packet. */
1314 					if (! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
1320 		outw(RxDiscard, ioaddr + EL3_CMD);
1324 			if (!(inw(ioaddr + EL3_STATUS) & CmdInProgress))
1334 	int ioaddr = dev->base_addr;
1339 			inw(ioaddr + EL3_STATUS), inw(ioaddr + RxStatus));
1420 	int ioaddr = dev->base_addr;
1427 		     dev->name, inw(ioaddr + EL3_STATUS),
1428 		     inb(ioaddr + TxStatus));
1436 	outw(StatsDisable, ioaddr + EL3_CMD);
1439 	outw(RxDisable, ioaddr + EL3_CMD);
1440 	outw(TxDisable, ioaddr + EL3_CMD);
1444 		outw(StopCoax, ioaddr + EL3_CMD);
1448 	outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
1450 	update_stats(ioaddr, dev);
1452 		outl(0, ioaddr + UpListPtr);
1460 		outl(0, ioaddr + DownListPtr);
1491 static void update_stats(int ioaddr, struct net_device *dev)
1496 	dev->stats.tx_carrier_errors += inb(ioaddr + 0);
1497 	dev->stats.tx_heartbeat_errors += inb(ioaddr + 1);
1498 	/* Multiple collisions. */ inb(ioaddr + 2);
1499 	dev->stats.collisions += inb(ioaddr + 3);
1500 	dev->stats.tx_window_errors += inb(ioaddr + 4);
1501 	dev->stats.rx_fifo_errors += inb(ioaddr + 5);
1502 	dev->stats.tx_packets += inb(ioaddr + 6);
1503 	dev->stats.tx_packets += (inb(ioaddr + 9) & 0x30) << 4;
1504 						/* Rx packets   */ inb(ioaddr + 7);
1506 	/* Tx deferrals */ inb(ioaddr + 8);
1510 	inw(ioaddr + 10);	/* Total Rx and Tx octets. */
1511 	inw(ioaddr + 12);
1514 	inb(ioaddr + 12);
1526 	int ioaddr = dev->base_addr;
1539 	outw(new_mode, ioaddr + EL3_CMD);