Lines Matching refs:val1
492 u32 val1;
496 val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
497 val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
499 REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
505 val1 = (bp->phy_addr << 21) | (reg << 16) |
508 REG_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
513 val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
514 if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
517 val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
518 val1 &= BNX2_EMAC_MDIO_COMM_DATA;
524 if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY) {
529 *val = val1;
534 val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
535 val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
537 REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
549 u32 val1;
553 val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
554 val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
556 REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
562 val1 = (bp->phy_addr << 21) | (reg << 16) | val |
565 REG_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
570 val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
571 if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
577 if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)
583 val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
584 val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
586 REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
6413 u32 val1, val2;
6415 pci_read_config_dword(bp->pdev, PCI_COMMAND, &val1);
6417 atomic_read(&bp->intr_sem), val1);
6418 pci_read_config_dword(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &val1);
6420 netdev_err(dev, "DEBUG: PCI_PM[%08x] PCI_MISC_CFG[%08x]\n", val1, val2);