Cross Reference: /drivers/net/ethernet/chelsio/cxgb/subr.c

Lines Matching defs:bi
269 static void mi1_mdio_init(adapter_t *adapter, const struct board_info *bi)
271 	u32 clkdiv = bi->clock_elmer0 / (2 * bi->mdio_mdc) - 1;
272 	u32 val = F_MI1_PREAMBLE_ENABLE | V_MI1_MDI_INVERT(bi->mdio_mdiinv) |
273 		V_MI1_MDI_ENABLE(bi->mdio_mdien) | V_MI1_CLK_DIV(clkdiv);
275 	if (!(bi->caps & SUPPORTED_10000baseT_Full))
895 int __devinit t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
898 	p->chip_version = bi->chip_term;
921 static int board_init(adapter_t *adapter, const struct board_info *bi)
923 	switch (bi->board) {
966 	const struct board_info *bi = board_info(adapter);
968 	if (!bi->clock_mc4) {
976 	if (adapter->espi && t1_espi_init(adapter->espi, bi->chip_mac,
977 					  bi->espi_nports))
980 	if (t1_tp_reset(adapter->tp, &adapter->params.tp, bi->clock_core))
1032 				       const struct board_info *bi)
1034 	lc->supported = bi->caps;
1053 				 const struct board_info *bi)
1057 	adapter->params.brd_info = bi;
1058 	adapter->params.nports = bi->port_number;
1059 	adapter->params.stats_update_period = bi->gmac->stats_update_period;
1068 	if (bi->espi_nports && !(adapter->espi = t1_espi_create(adapter))) {
1081 	board_init(adapter, bi);
1082 	bi->mdio_ops->init(adapter, bi);
1083 	if (bi->gphy->reset)
1084 		bi->gphy->reset(adapter);
1085 	if (bi->gmac->reset)
1086 		bi->gmac->reset(adapter);
1091 		int phy_addr = bi->mdio_phybaseaddr + i;
1093 		adapter->port[i].phy = bi->gphy->create(adapter->port[i].dev,
1094 							phy_addr, bi->mdio_ops);
1101 		adapter->port[i].mac = mac = bi->gmac->create(adapter, i);
1112 		if (!t1_is_asic(adapter) || bi->chip_mac == CHBT_MAC_DUMMY)
1120 		init_link_config(&adapter->port[i].link_config, bi);