Cross Reference: /drivers/net/ethernet/chelsio/cxgb3/sge.c

Lines Matching defs:pidx
502 	struct rx_sw_desc *sd = &q->sdesc[q->pidx];
503 	struct rx_desc *d = &q->desc[q->pidx];
542 		if (++q->pidx == q->size) {
543 			q->pidx = 0;
577 	struct rx_desc *to = &q->desc[q->pidx];
579 	q->sdesc[q->pidx] = q->sdesc[idx];
586 	if (++q->pidx == q->size) {
587 		q->pidx = 0;
1035  *	@pidx: index of above descriptors
1050 			     struct tx_desc *d, unsigned int pidx,
1058 	struct tx_sw_desc *sd = &q->sdesc[pidx];
1098 			if (++pidx == q->size) {
1099 				pidx = 0;
1129  *	@pidx: index of the first Tx descriptor to write
1139 			    unsigned int pidx, unsigned int gen,
1145 	struct tx_desc *d = &q->desc[pidx];
1176 			q->sdesc[pidx].skb = NULL;
1201 	write_wr_hdr_sgl(ndesc, skb, d, pidx, q, sgl, flits, sgl_flits, gen,
1224 	unsigned int ndesc, pidx, credits, gen, compl;
1273 	pidx = q->pidx;
1274 	q->pidx += ndesc;
1275 	if (q->pidx >= q->size) {
1276 		q->pidx -= q->size;
1315 	write_tx_pkt_wr(adap, skb, pi, pidx, gen, q, ndesc, compl);
1452 	write_imm(&q->desc[q->pidx], skb, skb->len, q->gen);
1455 	if (++q->pidx >= q->size) {
1456 		q->pidx = 0;
1484 		write_imm(&q->desc[q->pidx], skb, skb->len, q->gen);
1486 		if (++q->pidx >= q->size) {
1487 			q->pidx = 0;
1572  *	@pidx: index of the first Tx descriptor to write
1580 			  struct sge_txq *q, unsigned int pidx,
1586 	struct tx_desc *d = &q->desc[pidx];
1589 		q->sdesc[pidx].skb = NULL;
1610 	write_wr_hdr_sgl(ndesc, skb, d, pidx, q, sgl, flits, sgl_flits,
1647 	unsigned int ndesc = calc_tx_descs_ofld(skb), pidx, gen;
1664 	pidx = q->pidx;
1665 	q->pidx += ndesc;
1666 	if (q->pidx >= q->size) {
1667 		q->pidx -= q->size;
1672 	write_ofld_wr(adap, skb, q, pidx, gen, ndesc);
1695 		unsigned int gen, pidx;
1711 		pidx = q->pidx;
1712 		q->pidx += ndesc;
1713 		if (q->pidx >= q->size) {
1714 			q->pidx -= q->size;
1720 		write_ofld_wr(adap, skb, q, pidx, gen, ndesc);