Lines Matching refs:csr5
514 int csr5;
531 csr5 = ioread32(ioaddr + CSR5);
536 if ((csr5 & (NormalIntr|AbnormalIntr)) == 0)
545 if (!rxd && (csr5 & (RxIntr | RxNoBuf))) {
551 if (!(csr5&~(AbnormalIntr|NormalIntr|RxPollInt|TPLnkPass)))
558 iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5);
562 iowrite32(csr5 & 0x0001ffff, ioaddr + CSR5);
565 if (csr5 & (RxIntr | RxNoBuf)) {
573 netdev_dbg(dev, "interrupt csr5=%#8.8x new csr5=%#8.8x\n",
574 csr5, ioread32(ioaddr + CSR5));
577 if (csr5 & (TxNoBuf | TxDied | TxIntr | TimerInt)) {
650 if (csr5 & TxDied) {
654 csr5, ioread32(ioaddr + CSR6),
662 if (csr5 & AbnormalIntr) { /* Abnormal error summary bit. */
663 if (csr5 == 0xffffffff)
665 if (csr5 & TxJabber)
667 if (csr5 & TxFIFOUnderflow) {
676 if (csr5 & (RxDied | RxNoBuf)) {
682 if (csr5 & RxDied) { /* Missed a Rx frame. */
691 if (csr5 & (TPLnkPass | TPLnkFail | 0x08000000)) {
693 (tp->link_change)(dev, csr5);
695 if (csr5 & SystemError) {
696 int error = (csr5 >> 23) & 7;
715 if (csr5 & TimerInt) {
720 csr5);
727 dev_warn(&dev->dev, "Too much work during an interrupt, csr5=0x%08x. (%lu) (%d,%d,%d)\n",
728 csr5, tp->nir, tx, rx, oi);
743 iowrite32(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7);
753 csr5 = ioread32(ioaddr + CSR5);
757 csr5 &= ~RxPollInt;
758 } while ((csr5 & (TxNoBuf |
769 } while ((csr5 & (NormalIntr|AbnormalIntr)) != 0);
804 netdev_dbg(dev, "exiting interrupt, csr5=%#04x\n",