Cross Reference: /drivers/net/ethernet/netx-eth.c

Lines Matching defs:priv
114 	struct netx_eth_priv *priv = netdev_priv(ndev);
118 	spin_lock_irq(&priv->lock);
119 	memcpy_toio(priv->sram_base + 1560, (void *)buf, len);
121 		memset_io(priv->sram_base + 1560 + len, 0, 60 - len);
125 	pfifo_push(REQ_FIFO_PORT_LO(priv->id),
126 	           FIFO_PTR_SEGMENT(priv->id) |
134 	spin_unlock_irq(&priv->lock);
142 	struct netx_eth_priv *priv = netdev_priv(ndev);
147 	val = pfifo_pop(IND_FIFO_PORT_LO(priv->id));
163 	memcpy_fromio(data, priv->sram_base + frameno * 1560, len);
165 	pfifo_push(EMPTY_PTR_FIFO(priv->id),
178 	struct netx_eth_priv *priv = netdev_priv(ndev);
182 	spin_lock_irqsave(&priv->lock, flags);
184 	status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
187 		writel(status, NETX_PFIFO_XPEC_ISR(priv->id));
194 		    readl(NETX_PFIFO_FILL_LEVEL(IND_FIFO_PORT_LO(priv->id)));
202 			mii_check_media(&priv->mii, netif_msg_link(priv), 1);
204 		status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
206 	spin_unlock_irqrestore(&priv->lock, flags);
212 	struct netx_eth_priv *priv = netdev_priv(ndev);
222 	       priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
225 	       priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
232 		priv->xpec_base + NETX_XPEC_RAM_START_OFS +
235 	mii_check_media(&priv->mii, netif_msg_link(priv), 1);
243 	struct netx_eth_priv *priv = netdev_priv(ndev);
248 	    priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_LOCAL_CONFIG);
257 	struct netx_eth_priv *priv = netdev_priv(ndev);
262 	spin_lock_irq(&priv->lock);
264 	xc_reset(priv->xc);
265 	xc_start(priv->xc);
268 		pfifo_push(EMPTY_PTR_FIFO(priv->id),
269 			FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
271 	spin_unlock_irq(&priv->lock);
317 	struct netx_eth_priv *priv = netdev_priv(ndev);
326 	priv->msg_enable       = NETIF_MSG_LINK;
327 	priv->mii.phy_id_mask  = 0x1f;
328 	priv->mii.reg_num_mask = 0x1f;
329 	priv->mii.force_media  = 0;
330 	priv->mii.full_duplex  = 0;
331 	priv->mii.dev	     = ndev;
332 	priv->mii.mdio_read    = netx_eth_phy_read;
333 	priv->mii.mdio_write   = netx_eth_phy_write;
334 	priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id;
336 	running = xc_running(priv->xc);
337 	xc_stop(priv->xc);
344 		mac4321 = readl(priv->xpec_base +
346 		mac65 = readl(priv->xpec_base +
356 		if (xc_request_firmware(priv->xc)) {
362 	xc_reset(priv->xc);
363 	xc_start(priv->xc);
370 		pfifo_push(EMPTY_PTR_FIFO(priv->id),
371 			FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
379 	struct netx_eth_priv *priv;
393 	priv = netdev_priv(ndev);
396 	priv->xc = request_xc(pdata->xcno, &pdev->dev);
397 	if (!priv->xc) {
403 	ndev->irq = priv->xc->irq;
404 	priv->id = pdev->id;
405 	priv->xpec_base = priv->xc->xpec_base;
406 	priv->xmac_base = priv->xc->xmac_base;
407 	priv->sram_base = priv->xc->sram_base;
409 	spin_lock_init(&priv->lock);
411 	ret = pfifo_request(PFIFO_MASK(priv->id));
423 	pfifo_free(PFIFO_MASK(priv->id));
425 	free_xc(priv->xc);
436 	struct netx_eth_priv *priv = netdev_priv(ndev);
441 	xc_stop(priv->xc);
442 	free_xc(priv->xc);
444 	pfifo_free(PFIFO_MASK(priv->id));