Lines Matching refs:clock
732 set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);
762 * WR11 XXXXXXXX clock control
799 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
810 /* set clock sources:
908 time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;
1751 if (hwcfg.clock == 0)
1752 hwcfg.clock = SCC_DEFAULT_CLOCK;
1794 SCC_Info[2*Nchips+chan].clock = hwcfg.clock;
2022 /* dev data ctrl irq clock brand enh vector special option
2033 scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,