Lines Matching refs:queue
27 * handle queue setup for 5210 chipset (rest are handled on qcu.c).
114 * ath5k_hw_start_tx_dma() - Start DMA transmit for a specific queue
116 * @queue: The hw queue number
118 * Start DMA transmit for a specific queue and since 5210 doesn't have
119 * QCU/DCU, set up queue parameters for 5210 here based on queue type (one
120 * queue for normal data and one queue for beacons). For queue setup
121 * on newer chips check out qcu.c. Returns -EINVAL if queue number is out
122 * of range or if queue is already disabled.
125 * queue (see below).
128 ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue)
132 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
134 /* Return if queue is declared inactive */
135 if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)
142 * Set the queue by type on 5210
144 switch (ah->ah_txq[queue].tqi_type) {
161 /* Start queue */
165 /* Return if queue is disabled */
166 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXD, queue))
169 /* Start queue */
170 AR5K_REG_WRITE_Q(ah, AR5K_QCU_TXE, queue);
177 * ath5k_hw_stop_tx_dma() - Stop DMA transmit on a specific queue
179 * @queue: The hw queue number
181 * Stop DMA transmit on a specific hw queue and drain queue so we don't
183 * -EINVAL if queue number is out of range or inactive.
186 ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
191 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
193 /* Return if queue is declared inactive */
194 if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)
201 * Set by queue type
203 switch (ah->ah_txq[queue].tqi_type) {
217 /* Stop queue */
226 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
230 * Schedule TX disable and wait until queue is empty
232 AR5K_REG_WRITE_Q(ah, AR5K_QCU_TXD, queue);
234 /* Wait for queue to stop */
236 (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue) != 0);
240 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
242 "queue %i didn't stop !\n", queue);
248 AR5K_QUEUE_STATUS(queue)) &
284 AR5K_QUEUE_STATUS(queue)) &
295 queue);
301 AR5K_REG_DISABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
309 queue, pending);
319 * ath5k_hw_stop_beacon_queue() - Stop beacon queue
321 * @queue: The queue number
323 * Returns -EIO if queue didn't stop
326 ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue)
329 ret = ath5k_hw_stop_tx_dma(ah, queue);
332 "beacon queue didn't stop !\n");
339 * ath5k_hw_get_txdp() - Get TX Descriptor's address for a specific queue
341 * @queue: The hw queue number
343 * Get TX descriptor's address for a specific queue. For 5210 we ignore
344 * the queue number and use tx queue type since we only have 2 queues.
345 * We use TXDP0 for normal data queue and TXDP1 for beacon queue.
351 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue)
355 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
358 * Get the transmit queue descriptor pointer from the selected queue
362 switch (ah->ah_txq[queue].tqi_type) {
374 tx_reg = AR5K_QUEUE_TXDP(queue);
381 * ath5k_hw_set_txdp() - Set TX Descriptor's address for a specific queue
383 * @queue: The hw queue number
386 * Set TX descriptor's address for a specific queue. For 5210 we ignore
387 * the queue number and we use tx queue type since we only have 2 queues
388 * so as above we use TXDP0 for normal data queue and TXDP1 for beacon queue.
390 * Returns -EINVAL if queue type is invalid for 5210 and -EIO if queue is still
394 ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, u32 phys_addr)
398 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
401 * Set the transmit queue descriptor pointer register by type
405 switch (ah->ah_txq[queue].tqi_type) {
418 * Set the transmit queue descriptor pointer for
419 * the selected queue on QCU for 5211+
420 * (this won't work if the queue is still active)
422 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
425 tx_reg = AR5K_QUEUE_TXDP(queue);
590 * per-queue bits on SISR0
593 * per-queue bits on SISR1
595 * TXURN -> Logical OR of TXURN per-queue bits on SISR2
604 * QCBRURN per-queue bits on SISR3
605 * QTRIG -> Logical OR of QTRIG per-queue bits on SISR4
610 * interrupt got fired for another queue while we were reading
645 * so we track them all together per queue */
700 /* A queue got CBR overrun */
707 /* A queue got CBR underrun */
714 /* A queue got triggered */
767 /* Preserve per queue TXURN interrupt mask */
797 /* Note: Per queue interrupt masks
911 /* -EINVAL -> queue inactive */