Lines Matching refs:tq

290 		struct ath5k_txq_info *tq = &ah->ah_txq[queue];
296 (tq->tqi_cw_min << AR5K_NODCU_RETRY_LMT_CW_MIN_S)
330 struct ath5k_txq_info *tq = &ah->ah_txq[queue];
334 tq = &ah->ah_txq[queue];
339 (tq->tqi_type == AR5K_TX_QUEUE_INACTIVE))
347 AR5K_REG_SM(tq->tqi_cw_min, AR5K_DCU_LCL_IFS_CW_MIN) |
348 AR5K_REG_SM(tq->tqi_cw_max, AR5K_DCU_LCL_IFS_CW_MAX) |
349 AR5K_REG_SM(tq->tqi_aifs, AR5K_DCU_LCL_IFS_AIFS),
372 if (tq->tqi_cbr_period) {
373 ath5k_hw_reg_write(ah, AR5K_REG_SM(tq->tqi_cbr_period,
375 AR5K_REG_SM(tq->tqi_cbr_overflow_limit,
382 if (tq->tqi_cbr_overflow_limit)
388 if (tq->tqi_ready_time && (tq->tqi_type != AR5K_TX_QUEUE_CAB))
389 ath5k_hw_reg_write(ah, AR5K_REG_SM(tq->tqi_ready_time,
394 if (tq->tqi_burst_time) {
395 ath5k_hw_reg_write(ah, AR5K_REG_SM(tq->tqi_burst_time,
400 if (tq->tqi_flags & AR5K_TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE)
406 if (tq->tqi_flags & AR5K_TXQ_FLAG_BACKOFF_DISABLE)
411 if (tq->tqi_flags & AR5K_TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE)
418 switch (tq->tqi_type) {
440 ath5k_hw_reg_write(ah, ((tq->tqi_ready_time -
468 if (tq->tqi_flags & AR5K_TXQ_FLAG_TXOKINT_ENABLE)
471 if (tq->tqi_flags & AR5K_TXQ_FLAG_TXERRINT_ENABLE)
474 if (tq->tqi_flags & AR5K_TXQ_FLAG_TXURNINT_ENABLE)
477 if (tq->tqi_flags & AR5K_TXQ_FLAG_TXDESCINT_ENABLE)
480 if (tq->tqi_flags & AR5K_TXQ_FLAG_TXEOLINT_ENABLE)
483 if (tq->tqi_flags & AR5K_TXQ_FLAG_CBRORNINT_ENABLE)
486 if (tq->tqi_flags & AR5K_TXQ_FLAG_CBRURNINT_ENABLE)
489 if (tq->tqi_flags & AR5K_TXQ_FLAG_QTRIGINT_ENABLE)
492 if (tq->tqi_flags & AR5K_TXQ_FLAG_TXNOFRMINT_ENABLE)