Lines Matching refs:ctx

35 			      struct iwl_rxon_context *ctx,
42 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd,
55 struct iwl_rxon_context *ctx,
69 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd,
89 struct iwl_rxon_context *ctx,
96 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd, CMD_SYNC,
105 struct iwl_rxon_context *ctx)
109 if (!ctx->is_active)
112 ctx->qos_data.def_qos_parm.qos_flags = 0;
114 if (ctx->qos_data.qos_active)
115 ctx->qos_data.def_qos_parm.qos_flags |=
118 if (ctx->ht.enabled)
119 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
122 ctx->qos_data.qos_active,
123 ctx->qos_data.def_qos_parm.qos_flags);
125 ret = iwl_dvm_send_cmd_pdu(priv, ctx->qos_cmd, CMD_SYNC,
127 &ctx->qos_data.def_qos_parm);
145 struct iwl_rxon_context *ctx)
149 const struct iwl_rxon_cmd *rxon1 = &ctx->staging;
150 const struct iwl_rxon_cmd *rxon2 = &ctx->active;
168 rxon_assoc.flags = ctx->staging.flags;
169 rxon_assoc.filter_flags = ctx->staging.filter_flags;
170 rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
171 rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
176 ctx->staging.ofdm_ht_single_stream_basic_rates;
178 ctx->staging.ofdm_ht_dual_stream_basic_rates;
179 rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
181 ctx->staging.ofdm_ht_triple_stream_basic_rates;
182 rxon_assoc.acquisition_data = ctx->staging.acquisition_data;
184 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_assoc_cmd,
190 struct iwl_rxon_context *ctx)
193 struct iwl_rxon_cmd *active = (void *)&ctx->active;
195 if (ctx->ctxid == IWL_RXON_CTX_BSS) {
196 ret = iwlagn_disable_bss(priv, ctx, &ctx->staging);
198 ret = iwlagn_disable_pan(priv, ctx, &ctx->staging);
201 if (ctx->vif) {
202 ret = iwl_send_rxon_timing(priv, ctx);
207 ret = iwlagn_disconn_pan(priv, ctx, &ctx->staging);
217 iwl_clear_ucode_stations(priv, ctx);
219 iwl_update_bcast_station(priv, ctx);
220 iwl_restore_stations(priv, ctx);
221 ret = iwl_restore_default_wep_keys(priv, ctx);
227 memcpy(active, &ctx->staging, sizeof(*active));
232 struct iwl_rxon_context *ctx)
235 struct iwl_rxon_cmd *active = (void *)&ctx->active;
238 if (ctx->ctxid == IWL_RXON_CTX_BSS) {
239 ret = iwl_send_rxon_timing(priv, ctx);
246 iwlagn_update_qos(priv, ctx);
253 if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_AP)) {
254 ret = iwlagn_update_beacon(priv, ctx->vif);
270 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd, CMD_SYNC,
271 sizeof(struct iwl_rxon_cmd), &ctx->staging);
276 memcpy(active, &ctx->staging, sizeof(*active));
279 if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_ADHOC))
280 if (iwlagn_update_beacon(priv, ctx->vif))
297 if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_STATION &&
299 ieee80211_request_smps(ctx->vif,
415 int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
418 struct iwl_rxon_cmd *active = (void *)&ctx->active;
419 bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
430 if (!ctx->is_active)
434 ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
441 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
443 if ((ctx->vif && ctx->vif->bss_conf.use_short_slot) ||
444 !(ctx->staging.flags & RXON_FLG_BAND_24G_MSK))
445 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
447 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
449 iwl_print_rx_config_cmd(priv, ctx->ctxid);
450 ret = iwl_check_rxon_cmd(priv, ctx);
461 (priv->switch_channel != ctx->staging.channel)) {
472 if (!iwl_full_rxon_required(priv, ctx)) {
473 ret = iwlagn_send_rxon_assoc(priv, ctx);
479 memcpy(active, &ctx->staging, sizeof(*active));
492 iwl_set_rxon_hwcrypto(priv, ctx, !iwlagn_mod_params.sw_crypto);
500 le16_to_cpu(ctx->staging.channel),
501 ctx->staging.bssid_addr);
509 ret = iwlagn_rxon_disconn(priv, ctx);
518 return iwlagn_rxon_connect(priv, ctx);
524 struct iwl_rxon_context *ctx)
527 ctx->ht.extension_chan_offset =
529 ctx->ht.is_40mhz = true;
531 ctx->ht.extension_chan_offset =
533 ctx->ht.is_40mhz = true;
535 ctx->ht.extension_chan_offset =
537 ctx->ht.is_40mhz = false;
544 struct iwl_rxon_context *ctx;
576 for_each_context(priv, ctx)
577 iwlagn_set_rxon_chain(priv, ctx);
589 for_each_context(priv, ctx) {
591 if (ctx->ht.enabled != conf_is_ht(conf))
592 ctx->ht.enabled = conf_is_ht(conf);
594 if (ctx->ht.enabled) {
597 if (!ctx->ht.is_40mhz ||
598 !iwl_is_associated_ctx(ctx))
599 iwlagn_config_ht40(conf, ctx);
601 ctx->ht.is_40mhz = false;
607 ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
612 if (le16_to_cpu(ctx->staging.channel) !=
614 ctx->staging.flags = 0;
616 iwl_set_rxon_channel(priv, channel, ctx);
619 iwl_set_flags_for_band(priv, ctx, channel->band,
620 ctx->vif);
647 for_each_context(priv, ctx) {
648 if (!memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
650 iwlagn_commit_rxon(priv, ctx);
660 struct iwl_rxon_context *ctx,
663 struct ieee80211_vif *vif = ctx->vif;
736 ctx->ht_need_multiple_chains = need_multiple;
791 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
803 if (unlikely(!ctx->vif)) {
813 ctx->qos_data.qos_active = bss_conf->qos;
814 iwlagn_update_qos(priv, ctx);
817 ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
819 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
821 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
826 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
838 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
840 if (ctx->ctxid == IWL_RXON_CTX_BSS)
847 if (ctx->ht.enabled) {
848 ctx->ht.protection = bss_conf->ht_operation_mode &
850 ctx->ht.non_gf_sta_present = !!(bss_conf->ht_operation_mode &
852 iwlagn_check_needed_chains(priv, ctx, bss_conf);
856 iwlagn_set_rxon_chain(priv, ctx);
859 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
861 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
864 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
866 ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
868 memcpy(ctx->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
873 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
874 priv->beacon_ctx = ctx;
876 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
891 ctx->staging.filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
893 ctx->staging.filter_flags &=
897 if (force || memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
898 iwlagn_commit_rxon(priv, ctx);
935 struct iwl_rxon_context *ctx;
948 for_each_context(priv, ctx)
949 if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
950 iwlagn_commit_rxon(priv, ctx);