Lines Matching refs:priv
125 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
156 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
159 usb_anchor_urb(urb, &priv->anchored);
168 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
173 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
179 struct rtl8187_priv *priv = dev->priv;
184 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
185 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
186 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
187 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
195 struct rtl8187_priv *priv = hw->priv;
197 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
202 if (priv->is_rtl8187b) {
203 skb_queue_tail(&priv->b_tx_status.queue, skb);
206 while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
209 dev_dbg(&priv->udev->dev,
212 old_skb = skb_dequeue(&priv->b_tx_status.queue);
220 if (priv->is_rtl8187b)
226 skb_queue_tail(&priv->b_tx_status.queue, skb);
227 ieee80211_queue_delayed_work(hw, &priv->work, 0);
233 struct rtl8187_priv *priv = dev->priv;
258 rts_dur = ieee80211_rts_duration(dev, priv->vif,
267 priv->seqno += 0x10;
269 tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
272 if (!priv->is_rtl8187b) {
296 ieee80211_generic_frame_duration(dev, priv->vif,
309 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
312 usb_anchor_urb(urb, &priv->anchored);
326 struct rtl8187_priv *priv = dev->priv;
332 spin_lock_irqsave(&priv->rx_queue.lock, f);
333 __skb_unlink(skb, &priv->rx_queue);
334 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
342 if (!priv->is_rtl8187b) {
375 priv->signal = signal;
398 skb_queue_tail(&priv->rx_queue, skb);
400 usb_anchor_urb(urb, &priv->anchored);
403 skb_unlink(skb, &priv->rx_queue);
410 struct rtl8187_priv *priv = dev->priv;
416 while (skb_queue_len(&priv->rx_queue) < 16) {
427 usb_fill_bulk_urb(entry, priv->udev,
428 usb_rcvbulkpipe(priv->udev,
429 priv->is_rtl8187b ? 3 : 1),
435 skb_queue_tail(&priv->rx_queue, skb);
436 usb_anchor_urb(entry, &priv->anchored);
439 skb_unlink(skb, &priv->rx_queue);
450 usb_kill_anchored_urbs(&priv->anchored);
457 struct rtl8187_priv *priv = hw->priv;
488 val = le64_to_cpu(priv->b_tx_status.buf);
502 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
503 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
520 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
523 __skb_unlink(skb, &priv->b_tx_status.queue);
530 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
533 usb_anchor_urb(urb, &priv->anchored);
540 struct rtl8187_priv *priv = dev->priv;
548 usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
549 &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
552 usb_anchor_urb(entry, &priv->anchored);
561 static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
566 if (!priv->is_rtl8187b) {
586 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
588 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
590 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
591 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
592 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
593 if (priv->is_rtl8187b)
594 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, anaparam3);
596 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
597 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
603 struct rtl8187_priv *priv = dev->priv;
607 reg = rtl818x_ioread8(priv, &priv->map->CMD);
610 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
615 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
626 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
631 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
646 struct rtl8187_priv *priv = dev->priv;
651 rtl8187_set_anaparam(priv, true);
653 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
656 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
657 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
658 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
665 rtl8187_set_anaparam(priv, true);
668 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
669 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
671 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
672 rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
673 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
675 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
677 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
678 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
681 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
683 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
685 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
686 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
687 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
690 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
691 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
694 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
695 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
696 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
697 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
698 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
699 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
700 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
701 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
702 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
703 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
706 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
707 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
708 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
709 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
711 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
712 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
714 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
717 priv->rf->init(dev);
719 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
720 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
721 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
722 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
723 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
724 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
725 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
762 struct rtl8187_priv *priv = dev->priv;
766 rtl8187_set_anaparam(priv, true);
770 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
771 reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
772 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
773 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
779 rtl8187_set_anaparam(priv, true);
784 rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
786 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
788 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
791 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
792 rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
794 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
796 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
798 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
799 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
800 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
803 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
805 rtl818x_iowrite8_idx(priv,
812 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
813 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
815 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
816 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
817 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
819 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
822 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
824 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
825 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
826 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
829 priv->rf->init(dev);
832 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
833 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
835 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
836 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
837 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
838 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
839 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
840 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
841 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
843 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
844 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
845 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
846 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
847 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
848 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
849 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
850 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
851 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
852 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
853 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
854 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
855 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
857 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
859 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
861 priv->slot_time = 0x9;
862 priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
863 priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
864 priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
865 priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
866 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
869 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
883 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
886 struct ieee80211_hw *dev = priv->dev;
892 mutex_lock(&priv->conf_mutex);
893 tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
894 length = skb_queue_len(&priv->b_tx_status.queue);
900 while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
903 old_skb = skb_dequeue(&priv->b_tx_status.queue);
911 mutex_unlock(&priv->conf_mutex);
916 struct rtl8187_priv *priv = dev->priv;
920 mutex_lock(&priv->conf_mutex);
922 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
927 init_usb_anchor(&priv->anchored);
928 priv->dev = dev;
930 if (priv->is_rtl8187b) {
941 priv->rx_conf = reg;
942 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
944 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
948 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
950 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
961 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
963 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
964 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
978 priv->rx_conf = reg;
979 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
981 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
984 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
986 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
990 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
995 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
997 reg = rtl818x_ioread8(priv, &priv->map->CMD);
1000 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1001 INIT_DELAYED_WORK(&priv->work, rtl8187_work);
1004 mutex_unlock(&priv->conf_mutex);
1010 struct rtl8187_priv *priv = dev->priv;
1014 mutex_lock(&priv->conf_mutex);
1015 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1017 reg = rtl818x_ioread8(priv, &priv->map->CMD);
1020 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1022 priv->rf->stop(dev);
1023 rtl8187_set_anaparam(priv, false);
1025 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1026 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1027 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1028 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1030 while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1033 usb_kill_anchored_urbs(&priv->anchored);
1034 mutex_unlock(&priv->conf_mutex);
1036 if (!priv->is_rtl8187b)
1037 cancel_delayed_work_sync(&priv->work);
1042 struct rtl8187_priv *priv = dev->priv;
1044 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1045 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1093 struct rtl8187_priv *priv = dev->priv;
1098 mutex_lock(&priv->conf_mutex);
1099 if (priv->vif)
1111 priv->vif = vif;
1120 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1122 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1124 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1127 mutex_unlock(&priv->conf_mutex);
1134 struct rtl8187_priv *priv = dev->priv;
1135 mutex_lock(&priv->conf_mutex);
1136 priv->vif = NULL;
1137 mutex_unlock(&priv->conf_mutex);
1142 struct rtl8187_priv *priv = dev->priv;
1146 mutex_lock(&priv->conf_mutex);
1147 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1152 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1154 priv->rf->set_chan(dev, conf);
1156 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1158 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1159 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1160 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1161 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1162 mutex_unlock(&priv->conf_mutex);
1179 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1182 if (priv->is_rtl8187b) {
1188 priv->slot_time = 0x9;
1192 priv->slot_time = 0x14;
1196 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1197 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1198 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1204 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1216 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1220 rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1221 priv->aifsn[queue] * priv->slot_time +
1224 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1226 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1227 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1228 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1230 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1231 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1232 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1242 struct rtl8187_priv *priv = dev->priv;
1250 mutex_lock(&priv->conf_mutex);
1252 rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1255 if (priv->is_rtl8187b)
1269 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1271 mutex_unlock(&priv->conf_mutex);
1275 rtl8187_conf_erp(priv, info->use_short_slot,
1300 struct rtl8187_priv *priv = dev->priv;
1303 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1305 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1307 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1309 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1311 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1315 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1317 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1319 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1321 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1324 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1331 struct rtl8187_priv *priv = dev->priv;
1340 if (priv->is_rtl8187b) {
1341 priv->aifsn[queue] = params->aifs;
1350 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1353 priv->slot_time + SIFS_TIME));
1358 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1383 struct rtl8187_priv *priv = dev->priv;
1384 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1395 struct rtl8187_priv *priv = dev->priv;
1407 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1416 struct rtl8187_priv *priv;
1425 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1431 priv = dev->priv;
1432 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1435 priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1436 if (!priv->io_dmabuf) {
1440 mutex_init(&priv->io_mutex);
1444 priv->udev = udev;
1448 skb_queue_head_init(&priv->rx_queue);
1450 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1451 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1453 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1454 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1455 priv->map = (struct rtl818x_csr *)0xFF00;
1457 priv->band.band = IEEE80211_BAND_2GHZ;
1458 priv->band.channels = priv->channels;
1459 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1460 priv->band.bitrates = priv->rates;
1461 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1462 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1475 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1480 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1492 channel = priv->channels;
1507 &priv->txpwr_base);
1509 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1510 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1514 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1515 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1516 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1518 if (!priv->is_rtl8187b) {
1520 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1527 priv->is_rtl8187b = 1;
1528 priv->hw_rev = RTL8187BvB;
1541 /*if (priv->asic_rev == 0) {
1544 priv->asic_rev = 1;
1546 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1549 priv->hw_rev = RTL8187BvB;
1553 priv->hw_rev = RTL8187BvD;
1557 priv->hw_rev = RTL8187BvE;
1561 priv->hw_rev = RTL8187BvB;
1565 if (!priv->is_rtl8187b) {
1586 priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1590 priv->rfkill_mask = RFKILL_MASK_8198;
1596 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1600 priv->rf = rtl8187_detect_rf(dev);
1601 dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1604 if (!priv->is_rtl8187b)
1614 mutex_init(&priv->conf_mutex);
1615 skb_queue_head_init(&priv->b_tx_status.queue);
1618 mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1619 priv->rfkill_mask);
1631 kfree(priv->io_dmabuf);
1642 struct rtl8187_priv *priv;
1653 priv = dev->priv;
1654 usb_reset_device(priv->udev);
1656 kfree(priv->io_dmabuf);