Cross Reference: /drivers/scsi/NCR5380.c

Lines Matching refs:STATUS_REG
425 	status = NCR5380_read(STATUS_REG);
430 	printk("STATUS_REG: %02x ", status);
466 	status = NCR5380_read(STATUS_REG);
905 	for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
912 			NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, 0, 5*HZ);
1181 			if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1189 			} else if ((NCR5380_read(STATUS_REG) & SR_RST) == SR_RST) {
1220 				dprintk(NDEBUG_INTR, ("scsi : unknown interrupt, BASR 0x%X, MR 0x%X, SR 0x%x\n", basr, NCR5380_read(MODE_REG), NCR5380_read(STATUS_REG)));
1454 	value = NCR5380_read(STATUS_REG) & (SR_BSY | SR_IO);
1466 	if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1483 	if (!(NCR5380_read(STATUS_REG) & SR_BSY)) {
1521 	err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
1623 		while (!((tmp = NCR5380_read(STATUS_REG)) & SR_REQ) && !break_allowed);
1669 		NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 5*HZ);
1695 	tmp = NCR5380_read(STATUS_REG);
1721 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1760 	rc = NCR5380_poll_politely(host, STATUS_REG, SR_REQ, SR_REQ, 60 * HZ);
1771 		rc = NCR5380_poll_politely(host, STATUS_REG, SR_REQ, 0, 3*HZ);
1828 	if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1936 		while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) {
1944 	dprintk(NDEBUG_DMA, ("scsi%d : polled DMA transfer complete, basr 0x%X, sr 0x%X\n", instance->host_no, tmp, NCR5380_read(STATUS_REG)));
1953 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
2013 				while (NCR5380_read(STATUS_REG) & SR_REQ);
2065 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
2111 		tmp = NCR5380_read(STATUS_REG);
2123 				while (NCR5380_read(STATUS_REG) & SR_REQ);
2312 					while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2347 						/* NCR538_poll_politely(instance, STATUS_REG, SR_BSY, 0, 30 * HZ); */
2348 						while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2541 	if(NCR5380_poll_politely(instance, STATUS_REG, SR_SEL, 0, 2*HZ)<0)
2551 	if(NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 2*HZ))
2693 	dprintk(NDEBUG_ABORT, ("        basr 0x%X, sr 0x%X\n", NCR5380_read(BUS_AND_STATUS_REG), NCR5380_read(STATUS_REG)));