Lines Matching refs:ioc
96 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
103 struct MPT2SAS_ADAPTER *ioc;
109 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
110 ioc->fwfault_debug = mpt2sas_fwfault_debug;
118 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
119 * @arg: input argument, used to derive ioc
126 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
129 if ((ioc == NULL))
132 pdev = ioc->pdev;
141 * _base_fault_reset_work - workq handling ioc fault conditions
142 * @work: input argument, used to derive ioc
150 struct MPT2SAS_ADAPTER *ioc =
157 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
158 if (ioc->shost_recovery)
160 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
162 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
165 ioc->name, __func__);
171 * and this call is safe since dead ioc will never return any
174 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
179 ioc->remove_host = 1;
181 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
182 "mpt2sas_dead_ioc_%d", ioc->id);
186 ioc->name, __func__);
190 ioc->name, __func__);
197 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
199 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
201 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
203 mpt2sas_base_fault_info(ioc, doorbell &
207 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
209 if (ioc->fault_reset_work_q)
210 queue_delayed_work(ioc->fault_reset_work_q,
211 &ioc->fault_reset_work,
213 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
218 * @ioc: per adapter object
224 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
228 if (ioc->fault_reset_work_q)
232 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
233 snprintf(ioc->fault_reset_work_q_name,
234 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
235 ioc->fault_reset_work_q =
236 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
237 if (!ioc->fault_reset_work_q) {
239 ioc->name, __func__, __LINE__);
242 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
243 if (ioc->fault_reset_work_q)
244 queue_delayed_work(ioc->fault_reset_work_q,
245 &ioc->fault_reset_work,
247 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
252 * @ioc: per adapter object
258 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
263 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
264 wq = ioc->fault_reset_work_q;
265 ioc->fault_reset_work_q = NULL;
266 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
268 if (!cancel_delayed_work(&ioc->fault_reset_work))
276 * @ioc: per adapter object
282 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
285 ioc->name, fault_code);
290 * @ioc: per adapter object
298 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
302 if (!ioc->fwfault_debug)
307 doorbell = readl(&ioc->chip->Doorbell);
309 mpt2sas_base_fault_info(ioc , doorbell);
311 writel(0xC0FFEE00, &ioc->chip->Doorbell);
313 "timeout\n", ioc->name);
321 * _base_sas_ioc_info - verbose translation of the ioc status
322 * @ioc: per adapter object
329 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
498 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
522 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
532 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
539 * @ioc: per adapter object
545 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
551 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
573 if (!ioc->hide_ir_msg)
580 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
605 if (!ioc->hide_ir_msg)
609 if (!ioc->hide_ir_msg)
613 if (!ioc->hide_ir_msg)
617 if (!ioc->hide_ir_msg)
625 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
631 * @ioc: per adapter object
637 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
660 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
672 if (!ioc->hide_ir_msg)
680 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
687 * @ioc: per adapter object
695 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
701 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
705 (ioc->logging_level & MPT_DEBUG_REPLY)) {
706 _base_sas_ioc_info(ioc , mpi_reply,
707 mpt2sas_base_get_msg_frame(ioc, smid));
711 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
716 * @ioc: per adapter object
725 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
730 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
734 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
737 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
739 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
740 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
742 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
744 complete(&ioc->base_cmds.done);
750 * @ioc: per adapter object
758 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
764 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
770 _base_display_event_data(ioc, mpi_reply);
774 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
777 ioc->name, __func__);
781 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
788 mpt2sas_base_put_smid_default(ioc, smid);
793 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
796 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
803 * @ioc: per adapter object
809 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
814 if (smid < ioc->hi_priority_smid) {
816 cb_idx = ioc->scsi_lookup[i].cb_idx;
817 } else if (smid < ioc->internal_smid) {
818 i = smid - ioc->hi_priority_smid;
819 cb_idx = ioc->hpr_lookup[i].cb_idx;
820 } else if (smid <= ioc->hba_queue_depth) {
821 i = smid - ioc->internal_smid;
822 cb_idx = ioc->internal_lookup[i].cb_idx;
830 * @ioc: per adapter object
837 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
841 ioc->mask_interrupts = 1;
842 him_register = readl(&ioc->chip->HostInterruptMask);
844 writel(him_register, &ioc->chip->HostInterruptMask);
845 readl(&ioc->chip->HostInterruptMask);
850 * @ioc: per adapter object
857 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
861 him_register = readl(&ioc->chip->HostInterruptMask);
863 writel(him_register, &ioc->chip->HostInterruptMask);
864 ioc->mask_interrupts = 0;
894 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
898 if (ioc->mask_interrupts)
924 if (reply > ioc->reply_dma_max_address ||
925 reply < ioc->reply_dma_min_address)
934 cb_idx = _base_get_cb_idx(ioc, smid);
936 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
939 _base_display_reply_info(ioc, smid, msix_index,
942 mpt2sas_base_free_smid(ioc, smid);
945 _base_async_event(ioc, msix_index, reply);
949 ioc->reply_free_host_index =
950 (ioc->reply_free_host_index ==
951 (ioc->reply_free_queue_depth - 1)) ?
952 0 : ioc->reply_free_host_index + 1;
953 ioc->reply_free[ioc->reply_free_host_index] =
956 writel(ioc->reply_free_host_index,
957 &ioc->chip->ReplyFreeHostIndex);
965 (ioc->reply_post_queue_depth - 1)) ? 0 :
986 if (ioc->is_warpdrive) {
988 ioc->reply_post_host_index[msix_index]);
993 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
1000 * @ioc: per adapter object
1004 _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
1006 return (ioc->facts.IOCCapabilities &
1007 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1012 * @ioc: per adapter object
1022 mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1029 if (!_base_is_controller_msix_enabled(ioc))
1032 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1033 if (ioc->shost_recovery)
1089 * @ioc: per adapter object
1099 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
1105 ioc->base_add_sg_single(paddr, flags_length, -1);
1151 * @ioc: per adapter object
1157 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1168 ioc->base_add_sg_single = &_base_add_sg_single_64;
1169 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1177 ioc->base_add_sg_single = &_base_add_sg_single_32;
1178 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1186 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1193 * @ioc: per adapter object
1199 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1205 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1207 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1208 "supported\n", ioc->name));
1214 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1215 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1216 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1217 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1218 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1219 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1220 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1221 ioc->msix_vector_count = 1;
1223 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1224 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1226 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1227 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
1234 * @ioc: per adapter object
1239 _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
1243 if (list_empty(&ioc->reply_queue_list))
1246 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1256 * @ioc: per adapter object
1263 _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
1271 ioc->name, (int)sizeof(struct adapter_reply_queue));
1274 reply_q->ioc = ioc;
1278 if (ioc->msix_enable)
1280 MPT2SAS_DRIVER_NAME, ioc->id, index);
1283 MPT2SAS_DRIVER_NAME, ioc->id);
1294 list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1300 * @ioc: per adapter object
1308 _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1314 if (!_base_is_controller_msix_enabled(ioc))
1317 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1321 if (ioc->cpu_count > ioc->msix_vector_count) {
1322 grouping = ioc->cpu_count / ioc->msix_vector_count;
1323 grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
1336 reply_q = list_entry(ioc->reply_queue_list.next,
1340 ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
1345 ioc->cpu_msix_table[cpu_id] =
1351 ioc->cpu_msix_table[cpu_id] =
1361 * @ioc: per adapter object
1365 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1367 if (ioc->msix_enable) {
1368 pci_disable_msix(ioc->pdev);
1369 ioc->msix_enable = 0;
1375 * @ioc: per adapter object
1379 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1386 INIT_LIST_HEAD(&ioc->reply_queue_list);
1394 if (_base_check_enable_msix(ioc) != 0)
1397 ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1398 ioc->msix_vector_count);
1400 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1403 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
1404 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
1409 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1412 r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
1414 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1415 "failed (r=%d) !!!\n", ioc->name, r));
1420 ioc->msix_enable = 1;
1421 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1422 r = _base_request_irq(ioc, i, a->vector);
1424 _base_free_irq(ioc);
1425 _base_disable_msix(ioc);
1437 r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1444 * @ioc: per adapter object
1449 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1451 struct pci_dev *pdev = ioc->pdev;
1459 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1460 ioc->name, __func__));
1462 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1465 "failed\n", ioc->name);
1470 if (pci_request_selected_regions(pdev, ioc->bars,
1473 "failed\n", ioc->name);
1483 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1485 ioc->name, pci_name(pdev));
1501 ioc->chip_phys = pci_resource_start(pdev, i);
1502 chip_phys = (u64)ioc->chip_phys;
1504 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1505 if (ioc->chip == NULL) {
1507 "adapter memory!\n", ioc->name);
1515 _base_mask_interrupts(ioc);
1516 r = _base_enable_msix(ioc);
1520 list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
1522 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1526 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1528 ioc->name, (unsigned long long)pio_chip, pio_sz);
1536 if (ioc->chip_phys)
1537 iounmap(ioc->chip);
1538 ioc->chip_phys = 0;
1539 pci_release_selected_regions(ioc->pdev, ioc->bars);
1547 * @ioc: per adapter object
1553 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1555 return (void *)(ioc->request + (smid * ioc->request_sz));
1560 * @ioc: per adapter object
1566 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1568 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1573 * @ioc: per adapter object
1579 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1581 return cpu_to_le32(ioc->sense_dma +
1587 * @ioc: per adapter object
1593 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1597 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1602 * @ioc: per adapter object
1608 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1614 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1615 if (list_empty(&ioc->internal_free_list)) {
1616 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1618 ioc->name, __func__);
1622 request = list_entry(ioc->internal_free_list.next,
1627 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1633 * @ioc: per adapter object
1640 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1647 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1648 if (list_empty(&ioc->free_list)) {
1649 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1651 ioc->name, __func__);
1655 request = list_entry(ioc->free_list.next,
1661 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1667 * @ioc: per adapter object
1673 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1679 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1680 if (list_empty(&ioc->hpr_free_list)) {
1681 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1685 request = list_entry(ioc->hpr_free_list.next,
1690 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1697 * @ioc: per adapter object
1703 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1709 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1710 if (smid < ioc->hi_priority_smid) {
1713 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1715 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1718 &ioc->free_chain_list);
1721 ioc->scsi_lookup[i].cb_idx = 0xFF;
1722 ioc->scsi_lookup[i].scmd = NULL;
1723 ioc->scsi_lookup[i].direct_io = 0;
1724 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1725 &ioc->free_list);
1726 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1732 if (ioc->shost_recovery && ioc->pending_io_count) {
1733 if (ioc->pending_io_count == 1)
1734 wake_up(&ioc->reset_wq);
1735 ioc->pending_io_count--;
1738 } else if (smid < ioc->internal_smid) {
1740 i = smid - ioc->hi_priority_smid;
1741 ioc->hpr_lookup[i].cb_idx = 0xFF;
1742 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1743 &ioc->hpr_free_list);
1744 } else if (smid <= ioc->hba_queue_depth) {
1746 i = smid - ioc->internal_smid;
1747 ioc->internal_lookup[i].cb_idx = 0xFF;
1748 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1749 &ioc->internal_free_list);
1751 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1756 * @ioc: per adapter object
1786 _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
1788 return ioc->cpu_msix_table[raw_smp_processor_id()];
1793 * @ioc: per adapter object
1800 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1807 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
1811 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1812 &ioc->scsi_lookup_lock);
1818 * @ioc: per adapter object
1824 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1835 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1836 &ioc->scsi_lookup_lock);
1841 * @ioc: per adapter object
1847 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1853 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
1857 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1858 &ioc->scsi_lookup_lock);
1863 * @ioc: per adapter object
1870 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1878 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
1882 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1883 &ioc->scsi_lookup_lock);
1888 * @ioc: per adapter object
1893 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1897 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1901 switch (ioc->pdev->subsystem_device) {
1934 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1939 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1940 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1941 ioc->pdev->subsystem_device);
1946 * @ioc: per adapter object
1951 _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1953 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
1956 switch (ioc->pdev->device) {
1958 switch (ioc->pdev->subsystem_device) {
1960 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1964 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1968 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1975 switch (ioc->pdev->subsystem_device) {
1977 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1981 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1985 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1989 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1993 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2006 * @ioc: per adapter object
2011 _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
2013 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
2016 switch (ioc->pdev->device) {
2018 switch (ioc->pdev->subsystem_device) {
2020 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2027 switch (ioc->pdev->subsystem_device) {
2029 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2033 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2037 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2041 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2054 * @ioc: per adapter object
2059 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
2066 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2067 strncpy(desc, ioc->manu_pg0.ChipName, 16);
2070 ioc->name, desc,
2071 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2072 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2073 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2074 ioc->facts.FWVersion.Word & 0x000000FF,
2075 ioc->pdev->revision,
2081 _base_display_dell_branding(ioc);
2082 _base_display_intel_branding(ioc);
2083 _base_display_hp_branding(ioc);
2085 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
2087 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2092 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2101 if (!ioc->hide_ir_msg) {
2102 if (ioc->facts.IOCCapabilities &
2109 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2114 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2119 if (ioc->facts.IOCCapabilities &
2125 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2130 if (ioc->facts.IOCCapabilities &
2136 if (ioc->facts.IOCCapabilities &
2142 if (ioc->facts.IOCCapabilities &
2148 if (ioc->facts.IOCCapabilities &
2154 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2165 * @ioc: per adapter object
2176 _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
2187 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
2196 ioc->name, __FILE__, __LINE__, __func__);
2199 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2202 ioc->name, __FILE__, __LINE__, __func__);
2209 ioc->name, __FILE__, __LINE__, __func__);
2233 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2242 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2244 "new(%d)\n", ioc->name, io_missing_delay_original,
2246 ioc->device_missing_delay = dmd_new;
2247 ioc->io_missing_delay = io_missing_delay;
2256 * @ioc: per adapter object
2261 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2266 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2267 if (ioc->ir_firmware)
2268 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2269 &ioc->manu_pg10);
2270 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2271 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2272 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2273 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2274 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2275 _base_display_ioc_capabilities(ioc);
2281 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2282 if ((ioc->facts.IOCCapabilities &
2289 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2290 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2296 * @ioc: per adapter object
2303 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2307 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2310 if (ioc->request) {
2311 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2312 ioc->request, ioc->request_dma);
2313 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2314 ": free\n", ioc->name, ioc->request));
2315 ioc->request = NULL;
2318 if (ioc->sense) {
2319 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2320 if (ioc->sense_dma_pool)
2321 pci_pool_destroy(ioc->sense_dma_pool);
2322 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2323 ": free\n", ioc->name, ioc->sense));
2324 ioc->sense = NULL;
2327 if (ioc->reply) {
2328 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2329 if (ioc->reply_dma_pool)
2330 pci_pool_destroy(ioc->reply_dma_pool);
2331 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2332 ": free\n", ioc->name, ioc->reply));
2333 ioc->reply = NULL;
2336 if (ioc->reply_free) {
2337 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2338 ioc->reply_free_dma);
2339 if (ioc->reply_free_dma_pool)
2340 pci_pool_destroy(ioc->reply_free_dma_pool);
2341 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2342 "(0x%p): free\n", ioc->name, ioc->reply_free));
2343 ioc->reply_free = NULL;
2346 if (ioc->reply_post_free) {
2347 pci_pool_free(ioc->reply_post_free_dma_pool,
2348 ioc->reply_post_free, ioc->reply_post_free_dma);
2349 if (ioc->reply_post_free_dma_pool)
2350 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2351 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2352 "reply_post_free_pool(0x%p): free\n", ioc->name,
2353 ioc->reply_post_free));
2354 ioc->reply_post_free = NULL;
2357 if (ioc->config_page) {
2358 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2359 "config_page(0x%p): free\n", ioc->name,
2360 ioc->config_page));
2361 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2362 ioc->config_page, ioc->config_page_dma);
2365 if (ioc->scsi_lookup) {
2366 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2367 ioc->scsi_lookup = NULL;
2369 kfree(ioc->hpr_lookup);
2370 kfree(ioc->internal_lookup);
2371 if (ioc->chain_lookup) {
2372 for (i = 0; i < ioc->chain_depth; i++) {
2373 if (ioc->chain_lookup[i].chain_buffer)
2374 pci_pool_free(ioc->chain_dma_pool,
2375 ioc->chain_lookup[i].chain_buffer,
2376 ioc->chain_lookup[i].chain_buffer_dma);
2378 if (ioc->chain_dma_pool)
2379 pci_pool_destroy(ioc->chain_dma_pool);
2380 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2381 ioc->chain_lookup = NULL;
2388 * @ioc: per adapter object
2394 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2404 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2408 facts = &ioc->facts;
2412 ioc->shost->sg_tablesize = (max_sgl_entries <
2416 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2427 ioc->hba_queue_depth = max_request_credit;
2428 ioc->hi_priority_depth = facts->HighPriorityCredit;
2429 ioc->internal_depth = ioc->hi_priority_depth + 5;
2432 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2435 ioc->reply_sz = facts->ReplyFrameSize * 4;
2440 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2441 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2442 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2445 max_sge_elements = ioc->request_sz - ioc->sge_size;
2446 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2448 ioc->chain_offset_value_for_main_message =
2450 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2455 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2456 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2460 ioc->shost->sg_tablesize = min_t(u16,
2461 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2462 * chains_needed_per_io), ioc->shost->sg_tablesize);
2464 ioc->chains_needed_per_io = chains_needed_per_io;
2467 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2470 if (!ioc->reply_free_queue_depth % 16)
2471 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
2473 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
2474 32 - (ioc->reply_free_queue_depth % 16);
2475 if (ioc->reply_post_queue_depth >
2477 ioc->reply_post_queue_depth = min_t(u16,
2480 (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
2481 ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
2482 ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
2486 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2488 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2489 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2490 ioc->chains_needed_per_io));
2492 ioc->scsiio_depth = ioc->hba_queue_depth -
2493 ioc->hi_priority_depth - ioc->internal_depth;
2498 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2499 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2500 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2505 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2506 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2509 sz += (ioc->hi_priority_depth * ioc->request_sz);
2512 sz += (ioc->internal_depth * ioc->request_sz);
2514 ioc->request_dma_sz = sz;
2515 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2516 if (!ioc->request) {
2519 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2520 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2521 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2524 ioc->hba_queue_depth = max_request_credit - retry_sz;
2531 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2532 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2536 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2537 ioc->request_sz);
2538 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2539 ioc->request_sz);
2542 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2543 ioc->request_sz);
2544 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2545 ioc->request_sz);
2548 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2549 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2550 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2551 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2552 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2553 ioc->name, (unsigned long long) ioc->request_dma));
2556 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2557 ioc->scsi_lookup_pages = get_order(sz);
2558 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2559 GFP_KERNEL, ioc->scsi_lookup_pages);
2560 if (!ioc->scsi_lookup) {
2562 "sz(%d)\n", ioc->name, (int)sz);
2566 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2567 "depth(%d)\n", ioc->name, ioc->request,
2568 ioc->scsiio_depth));
2570 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
2571 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2572 ioc->chain_pages = get_order(sz);
2574 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2575 GFP_KERNEL, ioc->chain_pages);
2576 if (!ioc->chain_lookup) {
2578 "sz(%d)\n", ioc->name, (int)sz);
2581 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2582 ioc->request_sz, 16, 0);
2583 if (!ioc->chain_dma_pool) {
2585 "failed\n", ioc->name);
2588 for (i = 0; i < ioc->chain_depth; i++) {
2589 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2590 ioc->chain_dma_pool , GFP_KERNEL,
2591 &ioc->chain_lookup[i].chain_buffer_dma);
2592 if (!ioc->chain_lookup[i].chain_buffer) {
2593 ioc->chain_depth = i;
2596 total_sz += ioc->request_sz;
2599 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2600 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2601 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2602 ioc->request_sz))/1024));
2605 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2607 if (!ioc->hpr_lookup) {
2609 ioc->name);
2612 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2613 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2614 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2615 ioc->hi_priority_depth, ioc->hi_priority_smid));
2618 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2620 if (!ioc->internal_lookup) {
2622 ioc->name);
2625 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2626 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2627 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2628 ioc->internal_depth, ioc->internal_smid));
2631 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2632 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2634 if (!ioc->sense_dma_pool) {
2636 ioc->name);
2639 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2640 &ioc->sense_dma);
2641 if (!ioc->sense) {
2643 ioc->name);
2646 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2648 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2650 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2651 ioc->name, (unsigned long long)ioc->sense_dma));
2655 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2656 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2658 if (!ioc->reply_dma_pool) {
2660 ioc->name);
2663 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2664 &ioc->reply_dma);
2665 if (!ioc->reply) {
2667 ioc->name);
2670 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2671 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2672 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2673 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2674 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2675 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2676 ioc->name, (unsigned long long)ioc->reply_dma));
2680 sz = ioc->reply_free_queue_depth * 4;
2681 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2682 ioc->pdev, sz, 16, 0);
2683 if (!ioc->reply_free_dma_pool) {
2685 "failed\n", ioc->name);
2688 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2689 &ioc->reply_free_dma);
2690 if (!ioc->reply_free) {
2692 "failed\n", ioc->name);
2695 memset(ioc->reply_free, 0, sz);
2696 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2697 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2698 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2699 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2700 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2704 reply_post_free_sz = ioc->reply_post_queue_depth *
2706 if (_base_is_controller_msix_enabled(ioc))
2707 sz = reply_post_free_sz * ioc->reply_queue_count;
2710 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2711 ioc->pdev, sz, 16, 0);
2712 if (!ioc->reply_post_free_dma_pool) {
2714 "failed\n", ioc->name);
2717 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2718 GFP_KERNEL, &ioc->reply_post_free_dma);
2719 if (!ioc->reply_post_free) {
2721 "failed\n", ioc->name);
2724 memset(ioc->reply_post_free, 0, sz);
2725 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2727 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2729 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2730 "(0x%llx)\n", ioc->name, (unsigned long long)
2731 ioc->reply_post_free_dma));
2734 ioc->config_page_sz = 512;
2735 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2736 ioc->config_page_sz, &ioc->config_page_dma);
2737 if (!ioc->config_page) {
2739 "failed\n", ioc->name);
2742 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2743 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2744 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2745 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2746 total_sz += ioc->config_page_sz;
2749 ioc->name, total_sz/1024);
2752 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2754 ioc->name, ioc->shost->sg_tablesize);
2764 * @ioc: Pointer to MPT_ADAPTER structure
2771 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2775 s = readl(&ioc->chip->Doorbell);
2781 * _base_wait_on_iocstate - waiting on a particular ioc state
2789 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2798 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2816 * @ioc: per adapter object
2825 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2834 int_status = readl(&ioc->chip->HostInterruptStatus);
2836 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2837 "successful count(%d), timeout(%d)\n", ioc->name,
2849 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2855 * @ioc: per adapter object
2865 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2875 int_status = readl(&ioc->chip->HostInterruptStatus);
2877 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2878 "successful count(%d), timeout(%d)\n", ioc->name,
2882 doorbell = readl(&ioc->chip->Doorbell);
2885 mpt2sas_base_fault_info(ioc , doorbell);
2900 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2906 * @ioc: per adapter object
2914 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2923 doorbell_reg = readl(&ioc->chip->Doorbell);
2925 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2926 "successful count(%d), timeout(%d)\n", ioc->name,
2938 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2944 * @ioc: per adapter object
2952 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2960 ioc->name, __func__);
2964 if (!(ioc->facts.IOCCapabilities &
2968 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2971 &ioc->chip->Doorbell);
2972 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2976 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2980 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2986 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2992 * @ioc: per adapter object
3003 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
3013 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3015 " (line=%d)\n", ioc->name, __LINE__);
3020 if (readl(&ioc->chip->HostInterruptStatus) &
3022 writel(0, &ioc->chip->HostInterruptStatus);
3024 /* send message to ioc */
3027 &ioc->chip->Doorbell);
3029 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3031 "int failed (line=%d)\n", ioc->name, __LINE__);
3034 writel(0, &ioc->chip->HostInterruptStatus);
3036 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3038 "ack failed (line=%d)\n", ioc->name, __LINE__);
3044 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3045 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3051 "sending request failed (line=%d)\n", ioc->name, __LINE__);
3056 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3058 "int failed (line=%d)\n", ioc->name, __LINE__);
3063 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3065 writel(0, &ioc->chip->HostInterruptStatus);
3066 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3068 "int failed (line=%d)\n", ioc->name, __LINE__);
3071 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3073 writel(0, &ioc->chip->HostInterruptStatus);
3076 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3078 "handshake int failed (line=%d)\n", ioc->name,
3083 dummy = readl(&ioc->chip->Doorbell);
3085 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3087 writel(0, &ioc->chip->HostInterruptStatus);
3090 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3091 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3092 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
3093 " (line=%d)\n", ioc->name, __LINE__));
3095 writel(0, &ioc->chip->HostInterruptStatus);
3097 if (ioc->logging_level & MPT_DEBUG_INIT) {
3109 * @ioc: per adapter object
3122 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
3134 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3137 mutex_lock(&ioc->base_cmds.mutex);
3139 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3141 ioc->name, __func__);
3147 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3151 "%s: failed due to ioc not operational\n",
3152 ioc->name, __func__);
3157 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3159 "operational state(count=%d)\n", ioc->name,
3163 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3166 ioc->name, __func__);
3172 ioc->base_cmds.status = MPT2_CMD_PENDING;
3173 request = mpt2sas_base_get_msg_frame(ioc, smid);
3174 ioc->base_cmds.smid = smid;
3178 ioc->ioc_link_reset_in_progress = 1;
3179 init_completion(&ioc->base_cmds.done);
3180 mpt2sas_base_put_smid_default(ioc, smid);
3181 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3185 ioc->ioc_link_reset_in_progress)
3186 ioc->ioc_link_reset_in_progress = 0;
3187 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3189 ioc->name, __func__);
3192 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3196 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3197 memcpy(mpi_reply, ioc->base_cmds.reply,
3201 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3206 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3208 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3211 mutex_unlock(&ioc->base_cmds.mutex);
3218 * @ioc: per adapter object
3228 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3239 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3242 mutex_lock(&ioc->base_cmds.mutex);
3244 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3246 ioc->name, __func__);
3252 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3256 "%s: failed due to ioc not operational\n",
3257 ioc->name, __func__);
3262 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3264 "operational state(count=%d)\n", ioc->name,
3268 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3271 ioc->name, __func__);
3277 ioc->base_cmds.status = MPT2_CMD_PENDING;
3278 request = mpt2sas_base_get_msg_frame(ioc, smid);
3279 ioc->base_cmds.smid = smid;
3281 init_completion(&ioc->base_cmds.done);
3282 mpt2sas_base_put_smid_default(ioc, smid);
3283 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3285 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3287 ioc->name, __func__);
3290 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3294 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3295 memcpy(mpi_reply, ioc->base_cmds.reply,
3299 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3304 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3306 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3309 mutex_unlock(&ioc->base_cmds.mutex);
3314 * _base_get_port_facts - obtain port facts reply and save in ioc
3315 * @ioc: per adapter object
3321 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3328 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3336 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3341 ioc->name, __func__, r);
3345 pfacts = &ioc->pfacts[port];
3357 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3358 * @ioc: per adapter object
3364 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3371 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3378 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3383 ioc->name, __func__, r);
3387 facts = &ioc->facts;
3404 ioc->ir_firmware = 1;
3410 ioc->shost->max_id = -1;
3419 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3420 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3422 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3423 "reply frame size(%d)\n", ioc->name,
3430 * @ioc: per adapter object
3436 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3444 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3455 if (_base_is_controller_msix_enabled(ioc))
3456 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
3457 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3459 cpu_to_le16(ioc->reply_post_queue_depth);
3461 cpu_to_le16(ioc->reply_free_queue_depth);
3464 cpu_to_le32((u64)ioc->sense_dma >> 32);
3466 cpu_to_le32((u64)ioc->reply_dma >> 32);
3468 cpu_to_le64((u64)ioc->request_dma);
3470 cpu_to_le64((u64)ioc->reply_free_dma);
3472 cpu_to_le64((u64)ioc->reply_post_free_dma);
3482 if (ioc->logging_level & MPT_DEBUG_INIT) {
3493 r = _base_handshake_req_reply_wait(ioc,
3500 ioc->name, __func__, r);
3507 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3516 * @ioc: per adapter object
3525 mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
3531 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
3535 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
3538 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
3540 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
3541 memcpy(ioc->port_enable_cmds.reply, mpi_reply,
3544 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
3549 ioc->port_enable_failed = 1;
3551 if (ioc->is_driver_loading) {
3553 mpt2sas_port_enable_complete(ioc);
3556 ioc->start_scan_failed = ioc_status;
3557 ioc->start_scan = 0;
3561 complete(&ioc->port_enable_cmds.done);
3568 * @ioc: per adapter object
3574 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3583 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3585 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3587 ioc->name, __func__);
3591 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3594 ioc->name, __func__);
3598 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3599 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3600 ioc->port_enable_cmds.smid = smid;
3604 init_completion(&ioc->port_enable_cmds.done);
3605 mpt2sas_base_put_smid_default(ioc, smid);
3606 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
3608 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
3610 ioc->name, __func__);
3613 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
3619 mpi_reply = ioc->port_enable_cmds.reply;
3624 ioc->name, __func__, ioc_status);
3629 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
3630 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
3637 * @ioc: per adapter object
3642 mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
3647 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3649 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3651 ioc->name, __func__);
3655 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3658 ioc->name, __func__);
3662 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3663 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3664 ioc->port_enable_cmds.smid = smid;
3668 mpt2sas_base_put_smid_default(ioc, smid);
3674 * @ioc: per adapter object
3682 _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
3686 * turn on the bit in ioc->pd_handles to indicate PD
3690 if (ioc->ir_firmware)
3694 if (!ioc->bios_pg3.BiosVersion)
3704 if ((ioc->bios_pg2.CurrentBootDeviceForm &
3708 (ioc->bios_pg2.ReqBootDeviceForm &
3712 (ioc->bios_pg2.ReqAltBootDeviceForm &
3723 * @ioc: per adapter object
3726 * The mask is stored in ioc->event_masks.
3729 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3739 ioc->event_masks[0] &= ~desired_event;
3741 ioc->event_masks[1] &= ~desired_event;
3743 ioc->event_masks[2] &= ~desired_event;
3745 ioc->event_masks[3] &= ~desired_event;
3750 * @ioc: per adapter object
3756 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3764 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3767 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3769 ioc->name, __func__);
3773 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3776 ioc->name, __func__);
3779 ioc->base_cmds.status = MPT2_CMD_PENDING;
3780 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3781 ioc->base_cmds.smid = smid;
3788 cpu_to_le32(ioc->event_masks[i]);
3789 init_completion(&ioc->base_cmds.done);
3790 mpt2sas_base_put_smid_default(ioc, smid);
3791 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3792 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3794 ioc->name, __func__);
3797 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3802 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3803 ioc->name, __func__));
3804 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3810 * @ioc: per adapter object
3817 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3829 (ioc->event_masks[i] & desired_event)) {
3830 ioc->event_masks[i] &= ~desired_event;
3840 mutex_lock(&ioc->base_cmds.mutex);
3841 _base_event_notification(ioc, CAN_SLEEP);
3842 mutex_unlock(&ioc->base_cmds.mutex);
3847 * @ioc: per adapter object
3853 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3860 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3861 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3862 ioc->name));
3869 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3870 "sequence\n", ioc->name));
3871 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3872 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3873 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3874 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3875 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3876 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3877 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3888 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3889 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3891 ioc->name, count, host_diagnostic));
3895 hcb_size = readl(&ioc->chip->HCBSize);
3897 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3898 ioc->name));
3900 &ioc->chip->HostDiagnostic);
3908 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3924 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3926 ioc->name));
3929 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3931 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3932 "re-enable the HCDW\n", ioc->name));
3934 &ioc->chip->HCBSize);
3937 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3938 ioc->name));
3940 &ioc->chip->HostDiagnostic);
3942 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3943 "diagnostic register\n", ioc->name));
3944 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3946 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3947 "READY state\n", ioc->name));
3948 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3952 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3956 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3960 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3966 * @ioc: per adapter object
3973 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3979 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3982 if (ioc->pci_error_recovery)
3985 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3986 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3987 ioc->name, __func__, ioc_state));
3993 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
3994 "active!\n", ioc->name));
3999 mpt2sas_base_fault_info(ioc, ioc_state &
4008 if (!(_base_send_ioc_reset(ioc,
4010 ioc->ioc_reset_count++;
4015 rc = _base_diag_reset(ioc, CAN_SLEEP);
4016 ioc->ioc_reset_count++;
4022 * @ioc: per adapter object
4028 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4040 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4045 &ioc->delayed_tr_list, list) {
4051 &ioc->delayed_tr_volume_list, list) {
4057 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4058 INIT_LIST_HEAD(&ioc->free_list);
4060 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
4061 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
4062 ioc->scsi_lookup[i].cb_idx = 0xFF;
4063 ioc->scsi_lookup[i].smid = smid;
4064 ioc->scsi_lookup[i].scmd = NULL;
4065 ioc->scsi_lookup[i].direct_io = 0;
4066 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
4067 &ioc->free_list);
4071 INIT_LIST_HEAD(&ioc->hpr_free_list);
4072 smid = ioc->hi_priority_smid;
4073 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
4074 ioc->hpr_lookup[i].cb_idx = 0xFF;
4075 ioc->hpr_lookup[i].smid = smid;
4076 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
4077 &ioc->hpr_free_list);
4081 INIT_LIST_HEAD(&ioc->internal_free_list);
4082 smid = ioc->internal_smid;
4083 for (i = 0; i < ioc->internal_depth; i++, smid++) {
4084 ioc->internal_lookup[i].cb_idx = 0xFF;
4085 ioc->internal_lookup[i].smid = smid;
4086 list_add_tail(&ioc->internal_lookup[i].tracker_list,
4087 &ioc->internal_free_list);
4091 INIT_LIST_HEAD(&ioc->free_chain_list);
4092 for (i = 0; i < ioc->chain_depth; i++)
4093 list_add_tail(&ioc->chain_lookup[i].tracker_list,
4094 &ioc->free_chain_list);
4096 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4099 for (i = 0, reply_address = (u32)ioc->reply_dma ;
4100 i < ioc->reply_free_queue_depth ; i++, reply_address +=
4101 ioc->reply_sz)
4102 ioc->reply_free[i] = cpu_to_le32(reply_address);
4105 if (ioc->is_driver_loading)
4106 _base_assign_reply_queues(ioc);
4109 reply_post_free = (long)ioc->reply_post_free;
4110 reply_post_free_sz = ioc->reply_post_queue_depth *
4112 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4116 for (i = 0; i < ioc->reply_post_queue_depth; i++)
4119 if (!_base_is_controller_msix_enabled(ioc))
4125 r = _base_send_ioc_init(ioc, sleep_flag);
4130 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
4131 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
4134 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4136 &ioc->chip->ReplyPostHostIndex);
4137 if (!_base_is_controller_msix_enabled(ioc))
4143 _base_unmask_interrupts(ioc);
4145 r = _base_event_notification(ioc, sleep_flag);
4150 _base_static_config_pages(ioc);
4153 if (ioc->is_driver_loading) {
4154 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
4156 hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
4159 ioc->mfg_pg10_hide_flag = hide_flag;
4161 ioc->wait_for_discovery_to_complete =
4162 _base_determine_wait_on_discovery(ioc);
4165 r = _base_send_port_enable(ioc, sleep_flag);
4174 * @ioc: per adapter object
4179 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
4181 struct pci_dev *pdev = ioc->pdev;
4183 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4186 _base_mask_interrupts(ioc);
4187 ioc->shost_recovery = 1;
4188 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4189 ioc->shost_recovery = 0;
4190 _base_free_irq(ioc);
4191 _base_disable_msix(ioc);
4192 if (ioc->chip_phys)
4193 iounmap(ioc->chip);
4194 ioc->chip_phys = 0;
4195 pci_release_selected_regions(ioc->pdev, ioc->bars);
4203 * @ioc: per adapter object
4208 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
4213 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4217 ioc->cpu_count = num_online_cpus();
4220 ioc->cpu_msix_table_sz = last_cpu_id + 1;
4221 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
4222 ioc->reply_queue_count = 1;
4223 if (!ioc->cpu_msix_table) {
4224 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
4225 "cpu_msix_table failed!!!\n", ioc->name));
4230 if (ioc->is_warpdrive) {
4231 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
4233 if (!ioc->reply_post_host_index) {
4234 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
4235 "for cpu_msix_table failed!!!\n", ioc->name));
4241 r = mpt2sas_base_map_resources(ioc);
4245 if (ioc->is_warpdrive) {
4246 ioc->reply_post_host_index[0] =
4247 (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
4249 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
4250 ioc->reply_post_host_index[i] = (resource_size_t *)
4251 ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
4255 pci_set_drvdata(ioc->pdev, ioc->shost);
4256 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4260 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4264 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
4266 if (!ioc->pfacts) {
4271 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
4272 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
4277 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
4281 init_waitqueue_head(&ioc->reset_wq);
4284 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
4285 if (ioc->facts.MaxDevHandle % 8)
4286 ioc->pd_handles_sz++;
4287 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
4289 if (!ioc->pd_handles) {
4294 ioc->fwfault_debug = mpt2sas_fwfault_debug;
4297 mutex_init(&ioc->base_cmds.mutex);
4298 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4299 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4302 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4303 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
4306 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4307 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
4308 mutex_init(&ioc->transport_cmds.mutex);
4311 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4312 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
4313 mutex_init(&ioc->scsih_cmds.mutex);
4316 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4317 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
4318 mutex_init(&ioc->tm_cmds.mutex);
4321 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4322 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
4323 mutex_init(&ioc->config_cmds.mutex);
4326 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4327 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4328 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
4329 mutex_init(&ioc->ctl_cmds.mutex);
4331 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4332 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4333 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
4334 !ioc->ctl_cmds.sense) {
4339 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4340 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4341 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
4347 ioc->event_masks[i] = -1;
4350 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
4351 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
4352 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
4353 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
4354 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
4355 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
4356 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
4357 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
4358 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
4359 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
4360 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
4365 _base_update_missing_delay(ioc, missing_delay[0],
4372 ioc->remove_host = 1;
4373 mpt2sas_base_free_resources(ioc);
4374 _base_release_memory_pools(ioc);
4375 pci_set_drvdata(ioc->pdev, NULL);
4376 kfree(ioc->cpu_msix_table);
4377 if (ioc->is_warpdrive)
4378 kfree(ioc->reply_post_host_index);
4379 kfree(ioc->pd_handles);
4380 kfree(ioc->tm_cmds.reply);
4381 kfree(ioc->transport_cmds.reply);
4382 kfree(ioc->scsih_cmds.reply);
4383 kfree(ioc->config_cmds.reply);
4384 kfree(ioc->base_cmds.reply);
4385 kfree(ioc->port_enable_cmds.reply);
4386 kfree(ioc->ctl_cmds.reply);
4387 kfree(ioc->ctl_cmds.sense);
4388 kfree(ioc->pfacts);
4389 ioc->ctl_cmds.reply = NULL;
4390 ioc->base_cmds.reply = NULL;
4391 ioc->tm_cmds.reply = NULL;
4392 ioc->scsih_cmds.reply = NULL;
4393 ioc->transport_cmds.reply = NULL;
4394 ioc->config_cmds.reply = NULL;
4395 ioc->pfacts = NULL;
4402 * @ioc: per adapter object
4407 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4410 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4413 mpt2sas_base_stop_watchdog(ioc);
4414 mpt2sas_base_free_resources(ioc);
4415 _base_release_memory_pools(ioc);
4416 pci_set_drvdata(ioc->pdev, NULL);
4417 kfree(ioc->cpu_msix_table);
4418 if (ioc->is_warpdrive)
4419 kfree(ioc->reply_post_host_index);
4420 kfree(ioc->pd_handles);
4421 kfree(ioc->pfacts);
4422 kfree(ioc->ctl_cmds.reply);
4423 kfree(ioc->ctl_cmds.sense);
4424 kfree(ioc->base_cmds.reply);
4425 kfree(ioc->port_enable_cmds.reply);
4426 kfree(ioc->tm_cmds.reply);
4427 kfree(ioc->transport_cmds.reply);
4428 kfree(ioc->scsih_cmds.reply);
4429 kfree(ioc->config_cmds.reply);
4434 * @ioc: per adapter object
4445 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4447 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4448 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4451 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4452 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4455 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4456 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4457 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4458 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4459 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4460 complete(&ioc->transport_cmds.done);
4462 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4463 ioc->base_cmds.status |= MPT2_CMD_RESET;
4464 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4465 complete(&ioc->base_cmds.done);
4467 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
4468 ioc->port_enable_failed = 1;
4469 ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
4470 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
4471 if (ioc->is_driver_loading) {
4472 ioc->start_scan_failed =
4474 ioc->start_scan = 0;
4475 ioc->port_enable_cmds.status =
4478 complete(&ioc->port_enable_cmds.done);
4481 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4482 ioc->config_cmds.status |= MPT2_CMD_RESET;
4483 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4484 ioc->config_cmds.smid = USHRT_MAX;
4485 complete(&ioc->config_cmds.done);
4489 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4490 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4497 * @ioc: Pointer to MPT_ADAPTER structure
4504 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4510 ioc->pending_io_count = 0;
4514 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4519 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4520 for (i = 0; i < ioc->scsiio_depth; i++)
4521 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4522 ioc->pending_io_count++;
4523 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4525 if (!ioc->pending_io_count)
4529 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4534 * @ioc: Pointer to MPT_ADAPTER structure
4541 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4547 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4550 if (ioc->pci_error_recovery) {
4552 ioc->name, __func__);
4558 mpt2sas_halt_firmware(ioc);
4568 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4571 } while (ioc->shost_recovery == 1);
4572 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4574 return ioc->ioc_reset_in_progress_status;
4577 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4578 ioc->shost_recovery = 1;
4579 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4581 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4582 _wait_for_commands_to_complete(ioc, sleep_flag);
4583 _base_mask_interrupts(ioc);
4584 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4587 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4592 if (ioc->is_driver_loading && ioc->port_enable_failed) {
4593 ioc->remove_host = 1;
4597 r = _base_make_ioc_operational(ioc, sleep_flag);
4599 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4601 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4602 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4604 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4605 ioc->ioc_reset_in_progress_status = r;
4606 ioc->shost_recovery = 0;
4607 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4608 mutex_unlock(&ioc->reset_in_progress_mutex);
4611 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,