Cross Reference: /drivers/scsi/mvsas/mv

Lines Matching refs:mvi
44 static inline u32 mvs_cr32(struct mvs_info *mvi, u32 addr)
46 	void __iomem *regs = mvi->regs;
51 static inline void mvs_cw32(struct mvs_info *mvi, u32 addr, u32 val)
53 	void __iomem *regs = mvi->regs;
58 static inline u32 mvs_read_phy_ctl(struct mvs_info *mvi, u32 port)
60 	void __iomem *regs = mvi->regs;
65 static inline void mvs_write_phy_ctl(struct mvs_info *mvi, u32 port, u32 val)
67 	void __iomem *regs = mvi->regs;
74 static inline u32 mvs_read_port(struct mvs_info *mvi, u32 off,
77 	void __iomem *regs = mvi->regs + off;
78 	void __iomem *regs2 = mvi->regs + off2;
83 static inline void mvs_write_port(struct mvs_info *mvi, u32 off, u32 off2,
86 	void __iomem *regs = mvi->regs + off;
87 	void __iomem *regs2 = mvi->regs + off2;
94 static inline u32 mvs_read_port_cfg_data(struct mvs_info *mvi, u32 port)
96 	return mvs_read_port(mvi, MVS_P0_CFG_DATA,
100 static inline void mvs_write_port_cfg_data(struct mvs_info *mvi,
103 	mvs_write_port(mvi, MVS_P0_CFG_DATA,
107 static inline void mvs_write_port_cfg_addr(struct mvs_info *mvi,
110 	mvs_write_port(mvi, MVS_P0_CFG_ADDR,
115 static inline u32 mvs_read_port_vsr_data(struct mvs_info *mvi, u32 port)
117 	return mvs_read_port(mvi, MVS_P0_VSR_DATA,
121 static inline void mvs_write_port_vsr_data(struct mvs_info *mvi,
124 	mvs_write_port(mvi, MVS_P0_VSR_DATA,
128 static inline void mvs_write_port_vsr_addr(struct mvs_info *mvi,
131 	mvs_write_port(mvi, MVS_P0_VSR_ADDR,
136 static inline u32 mvs_read_port_irq_stat(struct mvs_info *mvi, u32 port)
138 	return mvs_read_port(mvi, MVS_P0_INT_STAT,
142 static inline void mvs_write_port_irq_stat(struct mvs_info *mvi,
145 	mvs_write_port(mvi, MVS_P0_INT_STAT,
149 static inline u32 mvs_read_port_irq_mask(struct mvs_info *mvi, u32 port)
151 	return mvs_read_port(mvi, MVS_P0_INT_MASK,
156 static inline void mvs_write_port_irq_mask(struct mvs_info *mvi,
159 	mvs_write_port(mvi, MVS_P0_INT_MASK,
163 static inline void __devinit mvs_phy_hacks(struct mvs_info *mvi)
167 	tmp = mvs_cr32(mvi, CMD_PHY_TIMER);
170 	mvs_cw32(mvi, CMD_PHY_TIMER, tmp);
173 	mvs_cw32(mvi, CMD_SAS_CTL1, 0x7f7f);
176 	tmp = mvs_cr32(mvi, CMD_SAS_CTL0);
179 	mvs_cw32(mvi, CMD_SAS_CTL0, tmp);
181 	mvs_cw32(mvi, CMD_WD_TIMER, 0x7a0000);
184 	mvs_cw32(mvi, CMD_APP_ERR_CONFIG, 0xffefbf7d);
187 static inline void mvs_int_sata(struct mvs_info *mvi)
190 	void __iomem *regs = mvi->regs;
194 	MVS_CHIP_DISP->clear_active_cmds(mvi);
197 static inline void mvs_int_full(struct mvs_info *mvi)
199 	void __iomem *regs = mvi->regs;
204 	mvs_int_rx(mvi, false);
206 	for (i = 0; i < mvi->chip->n_phy; i++) {
209 			mvs_int_port(mvi, i, tmp);
213 		MVS_CHIP_DISP->non_spec_ncq_error(mvi);
216 		mvs_int_sata(mvi);
221 static inline void mvs_start_delivery(struct mvs_info *mvi, u32 tx)
223 	void __iomem *regs = mvi->regs;
227 static inline u32 mvs_rx_update(struct mvs_info *mvi)
229 	void __iomem *regs = mvi->regs;
243 static inline void mvs_show_pcie_usage(struct mvs_info *mvi)
251 	if (mvi->flags & MVF_FLAG_SOC || mvi->id > 0)
254 	pci_read_config_word(mvi->pdev, PCR_LINK_STAT, &link_stat);
258 	dev_printk(KERN_INFO, mvi->dev,