Lines Matching defs:pm8001_ha

59 	struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
62 pm8001_ha->main_cfg_tbl.interface_rev);
79 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
82 (u8)(pm8001_ha->main_cfg_tbl.firmware_rev >> 24),
83 (u8)(pm8001_ha->main_cfg_tbl.firmware_rev >> 16),
84 (u8)(pm8001_ha->main_cfg_tbl.firmware_rev >> 8),
85 (u8)(pm8001_ha->main_cfg_tbl.firmware_rev));
100 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
103 pm8001_ha->main_cfg_tbl.max_out_io);
118 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
121 (u16)(pm8001_ha->main_cfg_tbl.max_sgl >> 16));
137 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
140 pm8001_ha->main_cfg_tbl.max_sgl & 0x0000FFFF);
175 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
176 mode = (pm8001_ha->main_cfg_tbl.ctrl_cap_flag & 0xfe000000)>>25;
196 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
198 be64_to_cpu(*(__be64 *)pm8001_ha->sas_addr));
215 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
217 return snprintf(buf, PAGE_SIZE, "%08xh\n", pm8001_ha->logging_level);
224 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
230 pm8001_ha->logging_level = val;
248 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
251 (*(u32 *)((u8*)pm8001_ha->memoryMap.region[AAP1].virt_ptr + (r) * 32 \
284 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
286 (*(u32 *)((u8*)pm8001_ha->memoryMap.region[IOP].virt_ptr + (r) * 32 \
346 static int pm8001_set_nvmd(struct pm8001_hba_info *pm8001_ha)
358 if ((pm8001_ha->fw_image->size <= 0) ||
359 (pm8001_ha->fw_image->size > 4096)) {
364 memcpy((u8 *)payload->func_specific, (u8 *)pm8001_ha->fw_image->data,
365 pm8001_ha->fw_image->size);
366 payload->length = pm8001_ha->fw_image->size;
368 pm8001_ha->nvmd_completion = &completion;
369 ret = PM8001_CHIP_DISP->set_nvmd_req(pm8001_ha, payload);
376 static int pm8001_update_flash(struct pm8001_hba_info *pm8001_ha)
392 image_hdr = (struct pm8001_fw_image_header *)pm8001_ha->fw_image->data;
395 if (pm8001_ha->fw_image->size < 28) {
400 while (sizeRead < pm8001_ha->fw_image->size) {
427 (u8 *)pm8001_ha->fw_image->data + sizeRead,
433 (u8 *)pm8001_ha->fw_image->data + sizeRead,
438 pm8001_ha->nvmd_completion = &completion;
439 ret = PM8001_CHIP_DISP->fw_flash_update_req(pm8001_ha, payload);
462 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
496 if (pm8001_ha->fw_status == FLASH_IN_PROGRESS) {
500 err = request_firmware(&pm8001_ha->fw_image,
502 pm8001_ha->dev);
505 PM8001_FAIL_DBG(pm8001_ha,
514 pm8001_ha->fw_status = FLASH_IN_PROGRESS;
515 err = pm8001_update_flash(pm8001_ha);
518 pm8001_ha->fw_status = FLASH_IN_PROGRESS;
519 err = pm8001_set_nvmd(pm8001_ha);
522 pm8001_ha->fw_status = FAIL_PARAMETERS;
526 release_firmware(pm8001_ha->fw_image);
530 pm8001_ha->fw_status = err;
544 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
547 if (flash_error_table[i].err_code == pm8001_ha->fw_status)
550 if (pm8001_ha->fw_status != FLASH_IN_PROGRESS)
551 pm8001_ha->fw_status = FLASH_OK;