Lines Matching refs:hw
67 void (*rx_word)(struct au1550_spi *hw);
68 void (*tx_word)(struct au1550_spi *hw);
70 irqreturn_t (*irq_callback)(struct au1550_spi *hw);
105 static void au1550_spi_bits_handlers_set(struct au1550_spi *hw, int bpw);
117 static u32 au1550_spi_baudcfg(struct au1550_spi *hw, unsigned speed_hz)
119 u32 mainclk_hz = hw->pdata->mainclk_hz;
140 static inline void au1550_spi_mask_ack_all(struct au1550_spi *hw)
142 hw->regs->psc_spimsk =
148 hw->regs->psc_spievent =
155 static void au1550_spi_reset_fifos(struct au1550_spi *hw)
159 hw->regs->psc_spipcr = PSC_SPIPCR_RC | PSC_SPIPCR_TC;
162 pcr = hw->regs->psc_spipcr;
178 struct au1550_spi *hw = spi_master_get_devdata(spi->master);
184 if (hw->pdata->deactivate_cs)
185 hw->pdata->deactivate_cs(hw->pdata, spi->chip_select,
190 au1550_spi_bits_handlers_set(hw, spi->bits_per_word);
192 cfg = hw->regs->psc_spicfg;
194 hw->regs->psc_spicfg = cfg & ~PSC_SPICFG_DE_ENABLE;
211 if (hw->usedma && spi->bits_per_word <= 8)
220 cfg |= au1550_spi_baudcfg(hw, spi->max_speed_hz);
222 hw->regs->psc_spicfg = cfg | PSC_SPICFG_DE_ENABLE;
225 stat = hw->regs->psc_spistat;
229 if (hw->pdata->activate_cs)
230 hw->pdata->activate_cs(hw->pdata, spi->chip_select,
238 struct au1550_spi *hw = spi_master_get_devdata(spi->master);
256 if (hz > spi->max_speed_hz || hz > hw->freq_max || hz < hw->freq_min) {
262 au1550_spi_bits_handlers_set(hw, spi->bits_per_word);
264 cfg = hw->regs->psc_spicfg;
266 hw->regs->psc_spicfg = cfg & ~PSC_SPICFG_DE_ENABLE;
269 if (hw->usedma && bpw <= 8)
278 cfg |= au1550_spi_baudcfg(hw, hz);
280 hw->regs->psc_spicfg = cfg;
285 stat = hw->regs->psc_spistat;
290 au1550_spi_reset_fifos(hw);
291 au1550_spi_mask_ack_all(hw);
297 struct au1550_spi *hw = spi_master_get_devdata(spi->master);
306 spi->max_speed_hz = hw->freq_max;
307 if (spi->max_speed_hz > hw->freq_max
308 || spi->max_speed_hz < hw->freq_min)
311 * NOTE: cannot change speed and other hw settings immediately,
326 static int au1550_spi_dma_rxtmp_alloc(struct au1550_spi *hw, unsigned size)
328 hw->dma_rx_tmpbuf = kmalloc(size, GFP_KERNEL);
329 if (!hw->dma_rx_tmpbuf)
331 hw->dma_rx_tmpbuf_size = size;
332 hw->dma_rx_tmpbuf_addr = dma_map_single(hw->dev, hw->dma_rx_tmpbuf,
334 if (dma_mapping_error(hw->dev, hw->dma_rx_tmpbuf_addr)) {
335 kfree(hw->dma_rx_tmpbuf);
336 hw->dma_rx_tmpbuf = 0;
337 hw->dma_rx_tmpbuf_size = 0;
343 static void au1550_spi_dma_rxtmp_free(struct au1550_spi *hw)
345 dma_unmap_single(hw->dev, hw->dma_rx_tmpbuf_addr,
346 hw->dma_rx_tmpbuf_size, DMA_FROM_DEVICE);
347 kfree(hw->dma_rx_tmpbuf);
348 hw->dma_rx_tmpbuf = 0;
349 hw->dma_rx_tmpbuf_size = 0;
354 struct au1550_spi *hw = spi_master_get_devdata(spi->master);
359 hw->len = t->len;
360 hw->tx_count = 0;
361 hw->rx_count = 0;
363 hw->tx = t->tx_buf;
364 hw->rx = t->rx_buf;
378 dma_tx_addr = dma_map_single(hw->dev,
381 if (dma_mapping_error(hw->dev, dma_tx_addr))
382 dev_err(hw->dev, "tx dma map error\n");
388 dma_rx_addr = dma_map_single(hw->dev,
391 if (dma_mapping_error(hw->dev, dma_rx_addr))
392 dev_err(hw->dev, "rx dma map error\n");
395 if (t->len > hw->dma_rx_tmpbuf_size) {
398 au1550_spi_dma_rxtmp_free(hw);
399 ret = au1550_spi_dma_rxtmp_alloc(hw, max(t->len,
404 hw->rx = hw->dma_rx_tmpbuf;
405 dma_rx_addr = hw->dma_rx_tmpbuf_addr;
406 dma_sync_single_for_device(hw->dev, dma_rx_addr,
411 dma_sync_single_for_device(hw->dev, dma_rx_addr,
413 hw->tx = hw->rx;
417 res = au1xxx_dbdma_put_dest(hw->dma_rx_ch, virt_to_phys(hw->rx),
420 dev_err(hw->dev, "rx dma put dest error\n");
422 res = au1xxx_dbdma_put_source(hw->dma_tx_ch, virt_to_phys(hw->tx),
425 dev_err(hw->dev, "tx dma put source error\n");
427 au1xxx_dbdma_start(hw->dma_rx_ch);
428 au1xxx_dbdma_start(hw->dma_tx_ch);
431 hw->regs->psc_spimsk = PSC_SPIMSK_SD;
435 hw->regs->psc_spipcr = PSC_SPIPCR_MS;
438 wait_for_completion(&hw->master_done);
440 au1xxx_dbdma_stop(hw->dma_tx_ch);
441 au1xxx_dbdma_stop(hw->dma_rx_ch);
445 dma_sync_single_for_cpu(hw->dev, dma_rx_addr, t->len,
450 dma_unmap_single(hw->dev, dma_rx_addr, t->len,
453 dma_unmap_single(hw->dev, dma_tx_addr, t->len,
456 return hw->rx_count < hw->tx_count ? hw->rx_count : hw->tx_count;
459 static irqreturn_t au1550_spi_dma_irq_callback(struct au1550_spi *hw)
463 stat = hw->regs->psc_spistat;
464 evnt = hw->regs->psc_spievent;
467 dev_err(hw->dev, "Unexpected IRQ!\n");
480 au1550_spi_mask_ack_all(hw);
481 au1xxx_dbdma_stop(hw->dma_rx_ch);
482 au1xxx_dbdma_stop(hw->dma_tx_ch);
485 hw->rx_count = hw->len - au1xxx_get_dma_residue(hw->dma_rx_ch);
486 hw->tx_count = hw->len - au1xxx_get_dma_residue(hw->dma_tx_ch);
488 au1xxx_dbdma_reset(hw->dma_rx_ch);
489 au1xxx_dbdma_reset(hw->dma_tx_ch);
490 au1550_spi_reset_fifos(hw);
493 dev_err(hw->dev,
496 dev_err(hw->dev,
500 complete(&hw->master_done);
506 au1550_spi_mask_ack_all(hw);
507 hw->rx_count = hw->len;
508 hw->tx_count = hw->len;
509 complete(&hw->master_done);
517 static void au1550_spi_rx_word_##size(struct au1550_spi *hw) \
519 u32 fifoword = hw->regs->psc_spitxrx & (u32)(mask); \
521 if (hw->rx) { \
522 *(u##size *)hw->rx = (u##size)fifoword; \
523 hw->rx += (size) / 8; \
525 hw->rx_count += (size) / 8; \
529 static void au1550_spi_tx_word_##size(struct au1550_spi *hw) \
532 if (hw->tx) { \
533 fifoword = *(u##size *)hw->tx & (u32)(mask); \
534 hw->tx += (size) / 8; \
536 hw->tx_count += (size) / 8; \
537 if (hw->tx_count >= hw->len) \
539 hw->regs->psc_spitxrx = fifoword; \
553 struct au1550_spi *hw = spi_master_get_devdata(spi->master);
555 hw->tx = t->tx_buf;
556 hw->rx = t->rx_buf;
557 hw->len = t->len;
558 hw->tx_count = 0;
559 hw->rx_count = 0;
565 while (hw->tx_count < hw->len) {
567 hw->tx_word(hw);
569 if (hw->tx_count >= hw->len) {
574 stat = hw->regs->psc_spistat;
581 hw->regs->psc_spimsk = mask;
585 hw->regs->psc_spipcr = PSC_SPIPCR_MS;
588 wait_for_completion(&hw->master_done);
590 return hw->rx_count < hw->tx_count ? hw->rx_count : hw->tx_count;
593 static irqreturn_t au1550_spi_pio_irq_callback(struct au1550_spi *hw)
598 stat = hw->regs->psc_spistat;
599 evnt = hw->regs->psc_spievent;
602 dev_err(hw->dev, "Unexpected IRQ!\n");
614 au1550_spi_mask_ack_all(hw);
615 au1550_spi_reset_fifos(hw);
616 dev_err(hw->dev,
619 complete(&hw->master_done);
629 stat = hw->regs->psc_spistat;
641 if (!(stat & PSC_SPISTAT_RE) && hw->rx_count < hw->len) {
642 hw->rx_word(hw);
645 if (!(stat & PSC_SPISTAT_TF) && hw->tx_count < hw->len)
646 hw->tx_word(hw);
650 hw->regs->psc_spievent = PSC_SPIEVNT_RR | PSC_SPIEVNT_TR;
669 hw->regs->psc_spievent = PSC_SPIEVNT_TU | PSC_SPIEVNT_MD;
671 hw->regs->psc_spipcr = PSC_SPIPCR_MS;
675 if (hw->rx_count >= hw->len) {
677 au1550_spi_mask_ack_all(hw);
678 complete(&hw->master_done);
685 struct au1550_spi *hw = spi_master_get_devdata(spi->master);
686 return hw->txrx_bufs(spi, t);
691 struct au1550_spi *hw = dev;
692 return hw->irq_callback(hw);
695 static void au1550_spi_bits_handlers_set(struct au1550_spi *hw, int bpw)
698 if (hw->usedma) {
699 hw->txrx_bufs = &au1550_spi_dma_txrxb;
700 hw->irq_callback = &au1550_spi_dma_irq_callback;
702 hw->rx_word = &au1550_spi_rx_word_8;
703 hw->tx_word = &au1550_spi_tx_word_8;
704 hw->txrx_bufs = &au1550_spi_pio_txrxb;
705 hw->irq_callback = &au1550_spi_pio_irq_callback;
708 hw->rx_word = &au1550_spi_rx_word_16;
709 hw->tx_word = &au1550_spi_tx_word_16;
710 hw->txrx_bufs = &au1550_spi_pio_txrxb;
711 hw->irq_callback = &au1550_spi_pio_irq_callback;
713 hw->rx_word = &au1550_spi_rx_word_32;
714 hw->tx_word = &au1550_spi_tx_word_32;
715 hw->txrx_bufs = &au1550_spi_pio_txrxb;
716 hw->irq_callback = &au1550_spi_pio_irq_callback;
720 static void __init au1550_spi_setup_psc_as_spi(struct au1550_spi *hw)
725 hw->regs->psc_ctrl = PSC_CTRL_DISABLE;
727 hw->regs->psc_sel = PSC_SEL_PS_SPIMODE;
730 hw->regs->psc_spicfg = 0;
733 hw->regs->psc_ctrl = PSC_CTRL_ENABLE;
737 stat = hw->regs->psc_spistat;
742 cfg = hw->usedma ? 0 : PSC_SPICFG_DD_DISABLE;
752 hw->regs->psc_spicfg = cfg;
755 au1550_spi_mask_ack_all(hw);
757 hw->regs->psc_spicfg |= PSC_SPICFG_DE_ENABLE;
761 stat = hw->regs->psc_spistat;
765 au1550_spi_reset_fifos(hw);
771 struct au1550_spi *hw;
786 hw = spi_master_get_devdata(master);
788 hw->master = spi_master_get(master);
789 hw->pdata = pdev->dev.platform_data;
790 hw->dev = &pdev->dev;
792 if (hw->pdata == NULL) {
804 hw->irq = r->start;
806 hw->usedma = 0;
809 hw->dma_tx_id = r->start;
812 hw->dma_rx_id = r->start;
817 hw->usedma = 1;
829 hw->ioarea = request_mem_region(r->start, sizeof(psc_spi_t),
831 if (!hw->ioarea) {
837 hw->regs = (psc_spi_t __iomem *)ioremap(r->start, sizeof(psc_spi_t));
838 if (!hw->regs) {
844 platform_set_drvdata(pdev, hw);
846 init_completion(&hw->master_done);
848 hw->bitbang.master = hw->master;
849 hw->bitbang.setup_transfer = au1550_spi_setupxfer;
850 hw->bitbang.chipselect = au1550_spi_chipsel;
851 hw->bitbang.master->setup = au1550_spi_setup;
852 hw->bitbang.txrx_bufs = au1550_spi_txrx_bufs;
854 if (hw->usedma) {
855 hw->dma_tx_ch = au1xxx_dbdma_chan_alloc(ddma_memid,
856 hw->dma_tx_id, NULL, (void *)hw);
857 if (hw->dma_tx_ch == 0) {
863 au1xxx_dbdma_set_devwidth(hw->dma_tx_ch, 8);
864 if (au1xxx_dbdma_ring_alloc(hw->dma_tx_ch,
873 hw->dma_rx_ch = au1xxx_dbdma_chan_alloc(hw->dma_rx_id,
874 ddma_memid, NULL, (void *)hw);
875 if (hw->dma_rx_ch == 0) {
881 au1xxx_dbdma_set_devwidth(hw->dma_rx_ch, 8);
882 if (au1xxx_dbdma_ring_alloc(hw->dma_rx_ch,
890 err = au1550_spi_dma_rxtmp_alloc(hw,
899 au1550_spi_bits_handlers_set(hw, 8);
901 err = request_irq(hw->irq, au1550_spi_irq, 0, pdev->name, hw);
908 master->num_chipselect = hw->pdata->num_chipselect;
922 hw->freq_max = hw->pdata->mainclk_hz / min_div;
923 hw->freq_min = hw->pdata->mainclk_hz / (max_div + 1) + 1;
926 au1550_spi_setup_psc_as_spi(hw);
928 err = spi_bitbang_start(&hw->bitbang);
941 free_irq(hw->irq, hw);
944 au1550_spi_dma_rxtmp_free(hw);
948 if (hw->usedma)
949 au1xxx_dbdma_chan_free(hw->dma_rx_ch);
953 if (hw->usedma)
954 au1xxx_dbdma_chan_free(hw->dma_tx_ch);
957 iounmap((void __iomem *)hw->regs);
960 release_resource(hw->ioarea);
961 kfree(hw->ioarea);
965 spi_master_put(hw->master);
973 struct au1550_spi *hw = platform_get_drvdata(pdev);
976 hw->master->bus_num);
978 spi_bitbang_stop(&hw->bitbang);
979 free_irq(hw->irq, hw);
980 iounmap((void __iomem *)hw->regs);
981 release_resource(hw->ioarea);
982 kfree(hw->ioarea);
984 if (hw->usedma) {
985 au1550_spi_dma_rxtmp_free(hw);
986 au1xxx_dbdma_chan_free(hw->dma_rx_ch);
987 au1xxx_dbdma_chan_free(hw->dma_tx_ch);
992 spi_master_put(hw->master);