Lines Matching refs:fifo
39 struct mpc512x_psc_fifo __iomem *fifo;
139 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
160 * depends on the fifo size.
162 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz));
168 setbits32(&fifo->txcmd, MPC512x_PSC_FIFO_EOF);
169 out_8(&fifo->txdata_8, data);
175 /* interrupt on tx fifo empty */
176 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
177 out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY);
187 /* rx fifo should have count bytes in it */
188 rxcount = in_be32(&fifo->rxcnt);
192 rxcount = in_be32(&fifo->rxcnt);
194 dev_warn(&spi->dev, "expected %d bytes in rx fifo "
200 data = in_8(&fifo->rxdata_8);
204 while (in_be32(&fifo->rxcnt)) {
205 in_8(&fifo->rxdata_8);
211 /* disable transmiter/receiver and fifo interrupt */
213 out_be32(&fifo->tximr, 0);
329 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
348 /* Disable psc interrupts all useful interrupts are in fifo */
351 /* Disable fifo interrupts, will be enabled later */
352 out_be32(&fifo->tximr, 0);
353 out_be32(&fifo->rximr, 0);
355 /* Setup fifo slice address and size */
356 /*out_be32(&fifo->txsz, 0x0fe00004);*/
357 /*out_be32(&fifo->rxsz, 0x0ff00004);*/
378 out_be32(&fifo->rxalarm, 0xfff);
379 out_be32(&fifo->txalarm, 0);
382 out_be32(&fifo->rxcmd,
384 out_be32(&fifo->txcmd,
395 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
398 if (in_be32(&fifo->txisr) &
399 in_be32(&fifo->tximr) & MPC512x_PSC_FIFO_EMPTY) {
400 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
401 out_be32(&fifo->tximr, 0);
453 mps->fifo =