Lines Matching refs:ccr
83 u16 ccr;
104 * Because psc->ccr is defined as 16bit register instead of 32bit
107 ccr = in_be16((u16 __iomem *)&psc->ccr);
108 ccr &= 0xFF00;
110 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF;
112 ccr |= (MCLK / 1000000 - 1) & 0xFF;
113 out_be16((u16 __iomem *)&psc->ccr, ccr);
340 out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */