Cross Reference: /drivers/staging/comedi/drivers/cb

Lines Matching defs:plx_control_bits
1108 	volatile uint32_t plx_control_bits;	/*  last bits written to plx9080 control register */
1336 	priv(dev)->plx_control_bits =
1343 	DEBUG_PRINT(" plx control reg 0x%x\n", priv(dev)->plx_control_bits);
3885 	priv(dev)->plx_control_bits &= ~CTL_EE_CLK & ~CTL_EE_CS;
3887 	priv(dev)->plx_control_bits |= CTL_USERO;
3888 	writel(priv(dev)->plx_control_bits, plx_control_addr);
3891 	priv(dev)->plx_control_bits |= CTL_EE_CS;
3892 	writel(priv(dev)->plx_control_bits, plx_control_addr);
3899 			priv(dev)->plx_control_bits |= CTL_EE_W;
3901 			priv(dev)->plx_control_bits &= ~CTL_EE_W;
3902 		writel(priv(dev)->plx_control_bits, plx_control_addr);
3905 		priv(dev)->plx_control_bits |= CTL_EE_CLK;
3906 		writel(priv(dev)->plx_control_bits, plx_control_addr);
3908 		priv(dev)->plx_control_bits &= ~CTL_EE_CLK;
3909 		writel(priv(dev)->plx_control_bits, plx_control_addr);
3916 		priv(dev)->plx_control_bits |= CTL_EE_CLK;
3917 		writel(priv(dev)->plx_control_bits, plx_control_addr);
3919 		priv(dev)->plx_control_bits &= ~CTL_EE_CLK;
3920 		writel(priv(dev)->plx_control_bits, plx_control_addr);
3928 	priv(dev)->plx_control_bits &= ~CTL_EE_CS;
3929 	writel(priv(dev)->plx_control_bits, plx_control_addr);
4206 		priv(dev)->plx_control_bits &= ~data_bit;
4207 		writel(priv(dev)->plx_control_bits, plx_control_addr);
4211 		priv(dev)->plx_control_bits |= data_bit;
4212 		writel(priv(dev)->plx_control_bits, plx_control_addr);
4226 		priv(dev)->plx_control_bits &= ~clock_bit;
4227 		writel(priv(dev)->plx_control_bits, plx_control_addr);
4231 		priv(dev)->plx_control_bits |= clock_bit;
4232 		writel(priv(dev)->plx_control_bits, plx_control_addr);
4291 	priv(dev)->plx_control_bits &= ~CTL_EE_CS;