Lines Matching refs:bridge
173 /* Bridge API ver. for which this bridge driver is built. */
255 dev_dbg(bridge, "%s Unknown Bridge file name", __func__);
468 dev_dbg(bridge,
517 dev_dbg(bridge, "Not able to get the symbol for Load "
528 dev_dbg(bridge,
544 dev_dbg(bridge, "%s: DSP clock rate (KHZ): 0x%x \n",
583 dev_dbg(bridge, "%s Unreset\n", __func__);
591 dev_dbg(bridge, "Waiting for Sync @ 0x%x\n", dw_sync_addr);
592 dev_dbg(bridge, "DSP c_int00 Address = 0x%x\n", dsp_addr);
756 struct drv_data *drv_datap = dev_get_drvdata(bridge);
758 /* Allocate and initialize a data structure to contain the bridge driver
848 dev_dbg(bridge,
854 dev_dbg(bridge, "pt_attrs %p L2 NumPages %x pg_info %p\n",
973 struct drv_data *drv_datap = dev_get_drvdata(bridge);
1012 dev_dbg(bridge, "%s: Error getting shm size "
1150 dev_dbg(bridge,
1221 dev_dbg(bridge,
1235 dev_dbg(bridge,
1339 dev_dbg(bridge, "%s status %x\n", __func__, status);
1379 dev_dbg(bridge, "%s dev_ctxt %p, va %x, NumBytes %x l1_base_va %x, "
1534 dev_dbg(bridge,
1692 dev_dbg(bridge, "PTE: L2 BaseVa %x, BasePa %x, PageNum "
1700 dev_dbg(bridge, "PTE: pg_tbl_va %x, pa %x, va %x, size %x\n",
1702 dev_dbg(bridge, "PTE: endianism %x, element_size %x, "
1784 dev_dbg(bridge, "%s status %x\n", __func__, status);