Cross Reference: /drivers/staging/tidspbridge/hw/MMURegAcM.h

Lines Matching refs:offset
33     const u32 offset = MMU_MMU_SYSCONFIG_OFFSET;\
34     register u32 data = __raw_readl((base_address)+offset);\
41     __raw_writel(new_value, base_address+offset);\
46     const u32 offset = MMU_MMU_SYSCONFIG_OFFSET;\
47     register u32 data = __raw_readl((base_address)+offset);\
54     __raw_writel(new_value, base_address+offset);\
63     const u32 offset = MMU_MMU_IRQSTATUS_OFFSET;\
66     __raw_writel(new_value, (base_address)+offset);\
75     const u32 offset = MMU_MMU_IRQENABLE_OFFSET;\
78     __raw_writel(new_value, (base_address)+offset);\
95     const u32 offset = MMU_MMU_CNTL_OFFSET;\
96     register u32 data = __raw_readl((base_address)+offset);\
103     __raw_writel(new_value, base_address+offset);\
108     const u32 offset = MMU_MMU_CNTL_OFFSET;\
109     register u32 data = __raw_readl((base_address)+offset);\
116     __raw_writel(new_value, base_address+offset);\
125     const u32 offset = MMU_MMU_TTB_OFFSET;\
128     __raw_writel(new_value, (base_address)+offset);\
137     const u32 offset = MMU_MMU_LOCK_OFFSET;\
140     __raw_writel(new_value, (base_address)+offset);\
151     const u32 offset = MMU_MMU_LOCK_OFFSET;\
152     register u32 data = __raw_readl((base_address)+offset);\
159     __raw_writel(new_value, base_address+offset);\
170     const u32 offset = MMU_MMU_LOCK_OFFSET;\
171     register u32 data = __raw_readl((base_address)+offset);\
178     __raw_writel(new_value, base_address+offset);\
193     const u32 offset = MMU_MMU_LD_TLB_OFFSET;\
196     __raw_writel(new_value, (base_address)+offset);\
201     const u32 offset = MMU_MMU_CAM_OFFSET;\
204     __raw_writel(new_value, (base_address)+offset);\
209     const u32 offset = MMU_MMU_RAM_OFFSET;\
212     __raw_writel(new_value, (base_address)+offset);\
217     const u32 offset = MMU_MMU_FLUSH_ENTRY_OFFSET;\
220     __raw_writel(new_value, (base_address)+offset);\