Lines Matching refs:PORT_CTRL
220 PORT_CTRL = 4,
566 dc->port[PORT_CTRL].dl_addr[CH_A] =
568 dc->port[PORT_CTRL].dl_size[CH_A] =
601 dc->port[PORT_CTRL].ul_addr[CH_A] =
603 dc->port[PORT_CTRL].ul_size[CH_A] =
934 read_mem32((u32 *) &ctrl_dl, dc->port[PORT_CTRL].dl_addr[CH_A], 2);
1058 write_mem32(dc->port[PORT_CTRL].ul_addr[0], \
1549 write_mem32(dc->port[PORT_CTRL].ul_addr[0], (u32 *)&ctrl, 2);
1578 enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));
1589 enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));