Lines Matching refs:port

72 #define siu_read(port, offset)		readb((port)->membase + (offset))
73 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
77 struct uart_port *port;
81 port = &siu_uart_ports[0];
83 spin_lock_irqsave(&port->lock, flags);
85 irsel = siu_read(port, SIUIRSEL);
90 siu_write(port, SIUIRSEL, irsel);
92 spin_unlock_irqrestore(&port->lock, flags);
98 struct uart_port *port;
102 port = &siu_uart_ports[0];
104 spin_lock_irqsave(&port->lock, flags);
106 irsel = siu_read(port, SIUIRSEL);
111 siu_write(port, SIUIRSEL, irsel);
113 spin_unlock_irqrestore(&port->lock, flags);
119 struct uart_port *port;
123 port = &siu_uart_ports[0];
125 spin_lock_irqsave(&port->lock, flags);
127 irsel = siu_read(port, SIUIRSEL);
144 siu_write(port, SIUIRSEL, irsel);
146 spin_unlock_irqrestore(&port->lock, flags);
150 static inline void siu_clear_fifo(struct uart_port *port)
152 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
153 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
155 siu_write(port, UART_FCR, 0);
158 static inline unsigned long siu_port_size(struct uart_port *port)
160 switch (port->type) {
170 static inline unsigned int siu_check_type(struct uart_port *port)
172 if (port->line == 0)
174 if (port->line == 1 && port->irq)
180 static inline const char *siu_type_name(struct uart_port *port)
182 switch (port->type) {
192 static unsigned int siu_tx_empty(struct uart_port *port)
196 lsr = siu_read(port, UART_LSR);
203 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
218 siu_write(port, UART_MCR, mcr);
221 static unsigned int siu_get_mctrl(struct uart_port *port)
226 msr = siu_read(port, UART_MSR);
239 static void siu_stop_tx(struct uart_port *port)
244 spin_lock_irqsave(&port->lock, flags);
246 ier = siu_read(port, UART_IER);
248 siu_write(port, UART_IER, ier);
250 spin_unlock_irqrestore(&port->lock, flags);
253 static void siu_start_tx(struct uart_port *port)
258 spin_lock_irqsave(&port->lock, flags);
260 ier = siu_read(port, UART_IER);
262 siu_write(port, UART_IER, ier);
264 spin_unlock_irqrestore(&port->lock, flags);
267 static void siu_stop_rx(struct uart_port *port)
272 spin_lock_irqsave(&port->lock, flags);
274 ier = siu_read(port, UART_IER);
276 siu_write(port, UART_IER, ier);
278 port->read_status_mask &= ~UART_LSR_DR;
280 spin_unlock_irqrestore(&port->lock, flags);
283 static void siu_enable_ms(struct uart_port *port)
288 spin_lock_irqsave(&port->lock, flags);
290 ier = siu_read(port, UART_IER);
292 siu_write(port, UART_IER, ier);
294 spin_unlock_irqrestore(&port->lock, flags);
297 static void siu_break_ctl(struct uart_port *port, int ctl)
302 spin_lock_irqsave(&port->lock, flags);
304 lcr = siu_read(port, UART_LCR);
309 siu_write(port, UART_LCR, lcr);
311 spin_unlock_irqrestore(&port->lock, flags);
314 static inline void receive_chars(struct uart_port *port, uint8_t *status)
321 tty = port->state->port.tty;
325 ch = siu_read(port, UART_RX);
326 port->icount.rx++;
330 lsr |= lsr_break_flag[port->line];
331 lsr_break_flag[port->line] = 0;
337 port->icount.brk++;
339 if (uart_handle_break(port))
344 port->icount.frame++;
346 port->icount.parity++;
348 port->icount.overrun++;
350 lsr &= port->read_status_mask;
359 if (uart_handle_sysrq_char(port, ch))
362 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
365 lsr = siu_read(port, UART_LSR);
373 static inline void check_modem_status(struct uart_port *port)
377 msr = siu_read(port, UART_MSR);
381 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
383 port->icount.rng++;
385 port->icount.dsr++;
387 uart_handle_cts_change(port, msr & UART_MSR_CTS);
389 wake_up_interruptible(&port->state->port.delta_msr_wait);
392 static inline void transmit_chars(struct uart_port *port)
397 xmit = &port->state->xmit;
399 if (port->x_char) {
400 siu_write(port, UART_TX, port->x_char);
401 port->icount.tx++;
402 port->x_char = 0;
406 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
407 siu_stop_tx(port);
412 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
414 port->icount.tx++;
420 uart_write_wakeup(port);
423 siu_stop_tx(port);
428 struct uart_port *port;
431 port = (struct uart_port *)dev_id;
433 iir = siu_read(port, UART_IIR);
437 lsr = siu_read(port, UART_LSR);
439 receive_chars(port, &lsr);
441 check_modem_status(port);
444 transmit_chars(port);
449 static int siu_startup(struct uart_port *port)
453 if (port->membase == NULL)
456 siu_clear_fifo(port);
458 (void)siu_read(port, UART_LSR);
459 (void)siu_read(port, UART_RX);
460 (void)siu_read(port, UART_IIR);
461 (void)siu_read(port, UART_MSR);
463 if (siu_read(port, UART_LSR) == 0xff)
466 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
470 if (port->type == PORT_VR41XX_DSIU)
473 siu_write(port, UART_LCR, UART_LCR_WLEN8);
475 spin_lock_irq(&port->lock);
476 siu_set_mctrl(port, port->mctrl);
477 spin_unlock_irq(&port->lock);
479 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
481 (void)siu_read(port, UART_LSR);
482 (void)siu_read(port, UART_RX);
483 (void)siu_read(port, UART_IIR);
484 (void)siu_read(port, UART_MSR);
489 static void siu_shutdown(struct uart_port *port)
494 siu_write(port, UART_IER, 0);
496 spin_lock_irqsave(&port->lock, flags);
498 port->mctrl &= ~TIOCM_OUT2;
499 siu_set_mctrl(port, port->mctrl);
501 spin_unlock_irqrestore(&port->lock, flags);
503 lcr = siu_read(port, UART_LCR);
505 siu_write(port, UART_LCR, lcr);
507 siu_clear_fifo(port);
509 (void)siu_read(port, UART_RX);
511 if (port->type == PORT_VR41XX_DSIU)
514 free_irq(port->irq, port);
517 static void siu_set_termios(struct uart_port *port, struct ktermios *new,
550 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
551 quot = uart_get_divisor(port, baud);
555 spin_lock_irqsave(&port->lock, flags);
557 uart_update_timeout(port, c_cflag, baud);
561 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
563 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
565 port->read_status_mask |= UART_LSR_BI;
567 port->ignore_status_mask = 0;
569 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
571 port->ignore_status_mask |= UART_LSR_BI;
573 port->ignore_status_mask |= UART_LSR_OE;
577 port->ignore_status_mask |= UART_LSR_DR;
579 ier = siu_read(port, UART_IER);
581 if (UART_ENABLE_MS(port, c_cflag))
583 siu_write(port, UART_IER, ier);
585 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
587 siu_write(port, UART_DLL, (uint8_t)quot);
588 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
590 siu_write(port, UART_LCR, lcr);
592 siu_write(port, UART_FCR, fcr);
594 siu_set_mctrl(port, port->mctrl);
596 spin_unlock_irqrestore(&port->lock, flags);
599 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
603 switch (port->type) {
613 switch (port->type) {
625 static const char *siu_type(struct uart_port *port)
627 return siu_type_name(port);
630 static void siu_release_port(struct uart_port *port)
634 if (port->flags & UPF_IOREMAP) {
635 iounmap(port->membase);
636 port->membase = NULL;
639 size = siu_port_size(port);
640 release_mem_region(port->mapbase, size);
643 static int siu_request_port(struct uart_port *port)
648 size = siu_port_size(port);
649 res = request_mem_region(port->mapbase, size, siu_type_name(port));
653 if (port->flags & UPF_IOREMAP) {
654 port->membase = ioremap(port->mapbase, size);
655 if (port->membase == NULL) {
664 static void siu_config_port(struct uart_port *port, int flags)
667 port->type = siu_check_type(port);
668 (void)siu_request_port(port);
672 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
674 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
676 if (port->irq != serial->irq)
678 if (port->iotype != serial->io_type)
680 if (port->mapbase != (unsigned long)serial->iomem_base)
708 struct uart_port *port;
716 port = siu_uart_ports;
718 port->type = type[i];
719 if (port->type == PORT_UNKNOWN)
721 port->irq = platform_get_irq(pdev, i);
722 port->uartclk = SIU_BAUD_BASE * 16;
723 port->fifosize = 16;
724 port->regshift = 0;
725 port->iotype = UPIO_MEM;
726 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
727 port->line = i;
729 port->mapbase = res->start;
730 port++;
740 static void wait_for_xmitr(struct uart_port *port)
746 lsr = siu_read(port, UART_LSR);
748 lsr_break_flag[port->line] = UART_LSR_BI;
754 if (port->flags & UPF_CONS_FLOW) {
758 msr = siu_read(port, UART_MSR);
765 static void siu_console_putchar(struct uart_port *port, int ch)
767 wait_for_xmitr(port);
768 siu_write(port, UART_TX, ch);
773 struct uart_port *port;
776 port = &siu_uart_ports[con->index];
778 ier = siu_read(port, UART_IER);
779 siu_write(port, UART_IER, 0);
781 uart_console_write(port, s, count, siu_console_putchar);
783 wait_for_xmitr(port);
784 siu_write(port, UART_IER, ier);
789 struct uart_port *port;
798 port = &siu_uart_ports[con->index];
799 if (port->membase == NULL) {
800 if (port->mapbase == 0)
802 port->membase = ioremap(port->mapbase, siu_port_size(port));
805 if (port->type == PORT_VR41XX_SIU)
811 return uart_set_options(port, con, baud, parity, bits, flow);
828 struct uart_port *port;
832 port = &siu_uart_ports[i];
833 port->ops = &siu_uart_ops;
843 void __init vr41xx_siu_early_setup(struct uart_port *port)
845 if (port->type == PORT_UNKNOWN)
848 siu_uart_ports[port->line].line = port->line;
849 siu_uart_ports[port->line].type = port->type;
850 siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16;
851 siu_uart_ports[port->line].mapbase = port->mapbase;
852 siu_uart_ports[port->line].mapbase = port->mapbase;
853 siu_uart_ports[port->line].ops = &siu_uart_ops;
872 struct uart_port *port;
885 port = &siu_uart_ports[i];
886 port->ops = &siu_uart_ops;
887 port->dev = &dev->dev;
889 retval = uart_add_one_port(&siu_uart_driver, port);
891 port->dev = NULL;
906 struct uart_port *port;
910 port = &siu_uart_ports[i];
911 if (port->dev == &dev->dev) {
912 uart_remove_one_port(&siu_uart_driver, port);
913 port->dev = NULL;
924 struct uart_port *port;
928 port = &siu_uart_ports[i];
929 if ((port->type == PORT_VR41XX_SIU ||
930 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
931 uart_suspend_port(&siu_uart_driver, port);
940 struct uart_port *port;
944 port = &siu_uart_ports[i];
945 if ((port->type == PORT_VR41XX_SIU ||
946 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
947 uart_resume_port(&siu_uart_driver, port);