Lines Matching refs:tmp
2307 u32 tmp;
2312 tmp = omap_readl(OTG_REV);
2318 tmp >> 4, tmp & 0xf, ctrl_name, trans);
2319 tmp = omap_readw(OTG_SYSCON_1);
2321 FOURBITS "\n", tmp,
2322 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
2323 trx_mode(USB1_TRX_MODE(tmp), trans & CONF_USB1_UNI_R),
2324 (USB0_TRX_MODE(tmp) == 0 && !cpu_is_omap1710())
2326 : trx_mode(USB0_TRX_MODE(tmp), 1),
2327 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2328 (tmp & HST_IDLE_EN) ? " !host" : "",
2329 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2330 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2331 tmp = omap_readl(OTG_SYSCON_2);
2333 " b_ase_brst=%d hmc=%d\n", tmp,
2334 (tmp & OTG_EN) ? " otg_en" : "",
2335 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2337 (tmp & SRP_DATA) ? " srp_data" : "",
2338 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2339 (tmp & OTG_PADEN) ? " otg_paden" : "",
2340 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2341 (tmp & UHOST_EN) ? " uhost_en" : "",
2342 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2343 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2344 B_ASE_BRST(tmp),
2345 OTG_HMC(tmp));
2346 tmp = omap_readl(OTG_CTRL);
2347 seq_printf(s, "otg_ctrl %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2348 (tmp & OTG_ASESSVLD) ? " asess" : "",
2349 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2350 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2351 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2352 (tmp & OTG_ID) ? " id" : "",
2353 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2354 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2355 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2356 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2357 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2358 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2359 (tmp & OTG_PULLDOWN) ? " down" : "",
2360 (tmp & OTG_PULLUP) ? " up" : "",
2361 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2362 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2363 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2364 (tmp & OTG_PU_ID) ? " pu_id" : ""
2366 tmp = omap_readw(OTG_IRQ_EN);
2367 seq_printf(s, "otg_irq_en %04x" "\n", tmp);
2368 tmp = omap_readw(OTG_IRQ_SRC);
2369 seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2370 tmp = omap_readw(OTG_OUTCTRL);
2371 seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2372 tmp = omap_readw(OTG_TEST);
2373 seq_printf(s, "otg_test %04x" "\n", tmp);
2379 u32 tmp;
2393 tmp = omap_readw(UDC_REV) & 0xff;
2397 tmp >> 4, tmp & 0xf,
2416 tmp = omap_readw(UDC_SYSCON1);
2417 seq_printf(s, "\nsyscon1 %04x" EIGHTBITS "\n", tmp,
2418 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2419 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2420 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2421 (tmp & UDC_NAK_EN) ? " nak" : "",
2422 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2423 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2424 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2425 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2429 if (!(tmp & UDC_PULLUP_EN)) {
2435 tmp = omap_readw(UDC_DEVSTAT);
2436 seq_printf(s, "devstat %04x" EIGHTBITS "%s%s\n", tmp,
2437 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2438 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2439 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2440 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2441 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2442 (tmp & UDC_SUS) ? " SUS" : "",
2443 (tmp & UDC_CFG) ? " CFG" : "",
2444 (tmp & UDC_ADD) ? " ADD" : "",
2445 (tmp & UDC_DEF) ? " DEF" : "",
2446 (tmp & UDC_ATT) ? " ATT" : "");
2448 tmp = omap_readw(UDC_IRQ_EN);
2449 seq_printf(s, "irq_en %04x" FOURBITS "%s\n", tmp,
2450 (tmp & UDC_SOF_IE) ? " sof" : "",
2451 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2452 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2453 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2454 (tmp & UDC_EP0_IE) ? " ep0" : "");
2455 tmp = omap_readw(UDC_IRQ_SRC);
2456 seq_printf(s, "irq_src %04x" EIGHTBITS "%s%s\n", tmp,
2457 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2458 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2459 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2460 (tmp & UDC_IRQ_SOF) ? " sof" : "",
2461 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2462 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2463 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2464 (tmp & UDC_SETUP) ? " setup" : "",
2465 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2466 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2470 tmp = omap_readw(UDC_DMA_IRQ_EN);
2471 seq_printf(s, "dma_irq_en %04x%s" EIGHTBITS "\n", tmp,
2472 (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2473 (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2474 (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2476 (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2477 (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2478 (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2480 (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2481 (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2482 (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2484 tmp = omap_readw(UDC_RXDMA_CFG);
2485 seq_printf(s, "rxdma_cfg %04x\n", tmp);
2486 if (tmp) {
2488 if ((tmp & (0x0f << (i * 4))) == 0)
2494 tmp = omap_readw(UDC_TXDMA_CFG);
2495 seq_printf(s, "txdma_cfg %04x\n", tmp);
2496 if (tmp) {
2498 if (!(tmp & (0x0f << (i * 4))))
2506 tmp = omap_readw(UDC_DEVSTAT);
2507 if (tmp & UDC_ATT) {
2509 if (tmp & UDC_ADD) {
2658 unsigned tmp, buf;
2700 for (tmp = 1; tmp < 15; tmp++) {
2701 omap_writew(0, UDC_EP_RX(tmp));
2702 omap_writew(0, UDC_EP_TX(tmp));
2856 u32 tmp = omap_readl(FUNC_MUX_CTRL_0);
2857 tmp &= ~VBUS_CTRL_1510;
2858 omap_writel(tmp, FUNC_MUX_CTRL_0);
2859 tmp |= VBUS_MODE_1510;
2860 tmp &= ~VBUS_CTRL_1510;
2861 omap_writel(tmp, FUNC_MUX_CTRL_0);