Lines Matching refs:pipenum

53 static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
61 r8a66597_bset(r8a66597, (1 << pipenum), reg);
65 static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
73 r8a66597_bclr(r8a66597, (1 << pipenum), reg);
104 static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum)
109 if (pipenum == 0) {
111 } else if (pipenum < R8A66597_MAX_NUM_PIPE) {
112 offset = get_pipectr_addr(pipenum);
116 pipenum);
122 static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum,
127 if (pipenum == 0) {
129 } else if (pipenum < R8A66597_MAX_NUM_PIPE) {
130 offset = get_pipectr_addr(pipenum);
134 pipenum);
138 static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum)
140 control_reg_set_pid(r8a66597, pipenum, PID_BUF);
143 static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum)
145 control_reg_set_pid(r8a66597, pipenum, PID_NAK);
148 static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum)
150 control_reg_set_pid(r8a66597, pipenum, PID_STALL);
153 static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum)
158 if (pipenum == 0) {
160 } else if (pipenum < R8A66597_MAX_NUM_PIPE) {
161 offset = get_pipectr_addr(pipenum);
165 pipenum);
171 static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum)
175 pipe_stop(r8a66597, pipenum);
177 if (pipenum == 0) {
179 } else if (pipenum < R8A66597_MAX_NUM_PIPE) {
180 offset = get_pipectr_addr(pipenum);
184 pipenum);
188 static void control_reg_sqset(struct r8a66597 *r8a66597, u16 pipenum)
192 pipe_stop(r8a66597, pipenum);
194 if (pipenum == 0) {
196 } else if (pipenum < R8A66597_MAX_NUM_PIPE) {
197 offset = get_pipectr_addr(pipenum);
201 "unexpect pipe num(%d)\n", pipenum);
205 static u16 control_reg_sqmon(struct r8a66597 *r8a66597, u16 pipenum)
209 if (pipenum == 0) {
211 } else if (pipenum < R8A66597_MAX_NUM_PIPE) {
212 offset = get_pipectr_addr(pipenum);
216 "unexpect pipe num(%d)\n", pipenum);
222 static u16 save_usb_toggle(struct r8a66597 *r8a66597, u16 pipenum)
224 return control_reg_sqmon(r8a66597, pipenum);
227 static void restore_usb_toggle(struct r8a66597 *r8a66597, u16 pipenum,
231 control_reg_sqset(r8a66597, pipenum);
233 control_reg_sqclr(r8a66597, pipenum);
236 static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum)
241 if (pipenum == 0) {
250 r8a66597_write(r8a66597, pipenum, PIPESEL);
272 static void r8a66597_change_curpipe(struct r8a66597 *r8a66597, u16 pipenum,
278 if (!pipenum) {
283 loop = pipenum;
299 static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum)
301 struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
306 r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel);
390 "ep_release: unexpect pipenum (%d)\n", info->pipe);
404 r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel);
415 u16 pipenum, int dma)
422 ep->pipectr = get_pipectr_addr(pipenum);
423 if (is_bulk_pipe(pipenum) || is_isoc_pipe(pipenum)) {
424 ep->pipetre = get_pipetre_addr(pipenum);
425 ep->pipetrn = get_pipetrn_addr(pipenum);
430 ep->pipenum = pipenum;
432 r8a66597->pipenum2ep[pipenum] = ep;
441 u16 pipenum = ep->pipenum;
443 if (pipenum == 0)
448 ep->pipenum = 0;
464 if (ep->pipenum) /* already allocated pipe */
542 info.pipe = ep->pipenum;
551 static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum)
553 enable_irq_ready(r8a66597, pipenum);
554 enable_irq_nrdy(r8a66597, pipenum);
557 static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
559 disable_irq_ready(r8a66597, pipenum);
560 disable_irq_nrdy(r8a66597, pipenum);
576 pipe_change(r8a66597, ep->pipenum);
589 static void disable_fifosel(struct r8a66597 *r8a66597, u16 pipenum,
595 if (tmp == pipenum)
599 static void change_bfre_mode(struct r8a66597 *r8a66597, u16 pipenum,
602 struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
606 r8a66597_write(r8a66597, pipenum, PIPESEL);
612 pipe_stop(r8a66597, pipenum);
613 disable_fifosel(r8a66597, pipenum, CFIFOSEL);
614 disable_fifosel(r8a66597, pipenum, D0FIFOSEL);
615 disable_fifosel(r8a66597, pipenum, D1FIFOSEL);
617 toggle = save_usb_toggle(r8a66597, pipenum);
619 r8a66597_write(r8a66597, pipenum, PIPESEL);
629 restore_usb_toggle(r8a66597, pipenum, toggle);
642 if (!is_bulk_pipe(ep->pipenum))
655 change_bfre_mode(r8a66597, ep->pipenum, 1);
707 pipe_change(r8a66597, ep->pipenum);
708 disable_irq_empty(r8a66597, ep->pipenum);
709 pipe_start(r8a66597, ep->pipenum);
714 r8a66597_write(r8a66597, ~(1 << ep->pipenum), BRDYSTS);
717 pipe_change(r8a66597, ep->pipenum);
718 disable_irq_empty(r8a66597, ep->pipenum);
719 pipe_start(r8a66597, ep->pipenum);
722 pipe_irq_enable(r8a66597, ep->pipenum);
727 pipe_change(r8a66597, ep->pipenum);
728 disable_irq_nrdy(r8a66597, ep->pipenum);
729 pipe_start(r8a66597, ep->pipenum);
730 enable_irq_nrdy(r8a66597, ep->pipenum);
740 u16 pipenum = ep->pipenum;
742 if (ep->pipenum == 0) {
745 pipe_start(r8a66597, pipenum);
746 pipe_irq_enable(r8a66597, pipenum);
748 pipe_stop(r8a66597, pipenum);
750 enable_irq_nrdy(r8a66597, pipenum);
760 change_bfre_mode(r8a66597, ep->pipenum, 0);
761 pipe_start(r8a66597, pipenum); /* trigger once */
762 pipe_irq_enable(r8a66597, pipenum);
764 pipe_change(r8a66597, pipenum);
766 pipe_start(r8a66597, pipenum); /* trigger once */
908 if (unlikely(ep->pipenum == 0)) {
945 u16 pipenum = ep->pipenum;
948 pipe_change(r8a66597, pipenum);
964 bufsize = get_buffer_size(r8a66597, pipenum);
983 disable_irq_ready(r8a66597, pipenum);
984 disable_irq_empty(r8a66597, pipenum);
986 disable_irq_ready(r8a66597, pipenum);
987 enable_irq_empty(r8a66597, pipenum);
989 pipe_start(r8a66597, pipenum);
999 u16 pipenum = ep->pipenum;
1002 pipe_change(r8a66597, pipenum);
1005 pipe_stop(r8a66597, pipenum);
1006 pipe_irq_disable(r8a66597, pipenum);
1008 "write fifo not ready. pipnum=%d\n", pipenum);
1013 bufsize = get_buffer_size(r8a66597, pipenum);
1033 disable_irq_ready(r8a66597, pipenum);
1034 enable_irq_empty(r8a66597, pipenum);
1036 disable_irq_empty(r8a66597, pipenum);
1037 pipe_irq_enable(r8a66597, pipenum);
1048 u16 pipenum = ep->pipenum;
1052 pipe_change(r8a66597, pipenum);
1056 pipe_stop(r8a66597, pipenum);
1057 pipe_irq_disable(r8a66597, pipenum);
1064 bufsize = get_buffer_size(r8a66597, pipenum);
1080 pipe_stop(r8a66597, pipenum);
1081 pipe_irq_disable(r8a66597, pipenum);
1094 if ((ep->pipenum != 0) && finish)
1101 u16 pipenum;
1113 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1114 check = 1 << pipenum;
1117 ep = r8a66597->pipenum2ep[pipenum];
1132 u16 pipenum;
1143 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
1144 check = 1 << pipenum;
1147 tmp = control_reg_get(r8a66597, pipenum);
1149 disable_irq_empty(r8a66597, pipenum);
1150 pipe_irq_disable(r8a66597, pipenum);
1151 pipe_stop(r8a66597, pipenum);
1152 ep = r8a66597->pipenum2ep[pipenum];
1180 pid = control_reg_get_pid(r8a66597, ep->pipenum);
1217 pipe_stop(r8a66597, ep->pipenum);
1218 control_reg_sqclr(r8a66597, ep->pipenum);
1233 pipe_start(r8a66597, ep->pipenum);
1276 pipe_stall(r8a66597, ep->pipenum);
1405 u16 pipenum;
1410 pipenum = ep->pipenum;
1411 pipe_change(r8a66597, pipenum);
1418 __func__, pipenum);
1437 disable_irq_ready(r8a66597, pipenum);
1438 enable_irq_empty(r8a66597, pipenum);
1441 r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
1451 u16 pipenum;
1456 pipenum = (r8a66597_read(r8a66597, D0FIFOSEL) & CURPIPE);
1457 ep = r8a66597->pipenum2ep[pipenum];
1581 pipe_irq_disable(ep->r8a66597, ep->pipenum);
1676 pipe_stall(ep->r8a66597, ep->pipenum);
1680 pipe_stop(ep->r8a66597, ep->pipenum);
1713 pipe_stop(ep->r8a66597, ep->pipenum);
1970 r8a66597->ep[0].pipenum = 0;