Lines Matching refs:cinfo
387 static void switch_monitor(struct cirrusfb_info *cinfo, int on);
388 static void WGen(const struct cirrusfb_info *cinfo,
390 static unsigned char RGen(const struct cirrusfb_info *cinfo, int regnum);
391 static void AttrOn(const struct cirrusfb_info *cinfo);
392 static void WHDR(const struct cirrusfb_info *cinfo, unsigned char val);
393 static void WSFR(struct cirrusfb_info *cinfo, unsigned char val);
394 static void WSFR2(struct cirrusfb_info *cinfo, unsigned char val);
395 static void WClut(struct cirrusfb_info *cinfo, unsigned char regnum,
398 static void RClut(struct cirrusfb_info *cinfo, unsigned char regnum,
427 static inline int is_laguna(const struct cirrusfb_info *cinfo)
429 return cinfo->btype == BT_LAGUNA || cinfo->btype == BT_LAGUNAB;
457 struct cirrusfb_info *cinfo = info->par;
458 long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f;
484 struct cirrusfb_info *cinfo = info->par;
492 maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx];
493 cinfo->multiplexing = 0;
508 switch (cinfo->btype) {
513 cinfo->multiplexing = 1;
517 cinfo->multiplexing = 1;
527 cinfo->doubleVCLK = 0;
528 if (cinfo->btype == BT_SD64 && info->fix.smem_len <= MB_ &&
530 cinfo->doubleVCLK = 1;
542 struct cirrusfb_info *cinfo = info->par;
649 if (!is_laguna(cinfo))
657 struct cirrusfb_info *cinfo = info->par;
660 assert(cinfo != NULL);
661 old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40;
667 old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1;
671 vga_wseq(cinfo->regbase, CL_SEQR1E, old1e);
673 vga_wseq(cinfo->regbase, CL_SEQR1F, old1f);
683 struct cirrusfb_info *cinfo = info->par;
685 u8 __iomem *regbase = cinfo->regbase;
720 bi = &cirrusfb_board_info[cinfo->btype];
758 if (cinfo->multiplexing) {
861 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64)
863 if (cinfo->multiplexing)
865 if (cinfo->doubleVCLK)
878 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_PICASSO4 ||
879 cinfo->btype == BT_SD64) {
888 if (is_laguna(cinfo)) {
889 long pcifc = fb_readl(cinfo->laguna_mmio + 0x3fc);
890 unsigned char tile = fb_readb(cinfo->laguna_mmio + 0x407);
893 if (cinfo->btype == BT_LAGUNAB) {
894 tile_control = fb_readw(cinfo->laguna_mmio + 0x2c4);
896 fb_writew(tile_control, cinfo->laguna_mmio + 0x2c4);
899 fb_writel(pcifc | 0x10000000l, cinfo->laguna_mmio + 0x3fc);
900 fb_writeb(tile & 0x3f, cinfo->laguna_mmio + 0x407);
901 control = fb_readw(cinfo->laguna_mmio + 0x402);
902 threshold = fb_readw(cinfo->laguna_mmio + 0xea);
912 if ((cinfo->btype == BT_SD64) ||
913 (cinfo->btype == BT_ALPINE) ||
914 (cinfo->btype == BT_GD5480))
918 if (is_laguna(cinfo)) {
949 WGen(cinfo, VGA_MIS_W, tmp);
968 switch (cinfo->btype) {
977 cinfo->multiplexing ?
993 switch (cinfo->btype) {
1021 WGen(cinfo, VGA_PEL_MSK, 0x01);
1022 if (cinfo->multiplexing)
1024 WHDR(cinfo, 0x4a);
1027 WHDR(cinfo, 0);
1042 switch (cinfo->btype) {
1051 cinfo->multiplexing ?
1067 switch (cinfo->btype) {
1095 if (cinfo->multiplexing)
1097 WHDR(cinfo, 0x4a);
1100 WHDR(cinfo, 0);
1111 switch (cinfo->btype) {
1130 cinfo->doubleVCLK ? 0xa3 : 0xa7);
1155 WHDR(cinfo, cinfo->doubleVCLK ? 0xe1 : 0xc1);
1158 WHDR(cinfo, 0xa0); /* hidden dac reg: nothing special */
1170 switch (cinfo->btype) {
1213 WHDR(cinfo, 0xc5);
1237 if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19)
1240 if (is_laguna(cinfo)) {
1264 AttrOn(cinfo);
1266 if (is_laguna(cinfo)) {
1268 fb_writew(control | 0x1000, cinfo->laguna_mmio + 0x402);
1269 fb_writew(format, cinfo->laguna_mmio + 0xc0);
1270 fb_writew(threshold, cinfo->laguna_mmio + 0xea);
1303 struct cirrusfb_info *cinfo = info->par;
1320 cinfo->pseudo_palette[regno] = v;
1325 WClut(cinfo, regno, red >> 10, green >> 10, blue >> 10);
1342 struct cirrusfb_info *cinfo = info->par;
1361 if (!is_laguna(cinfo))
1362 cirrusfb_WaitBLT(cinfo->regbase);
1365 vga_wcrt(cinfo->regbase, VGA_CRTC_START_LO, base & 0xff);
1366 vga_wcrt(cinfo->regbase, VGA_CRTC_START_HI, (base >> 8) & 0xff);
1369 tmp = vga_rcrt(cinfo->regbase, CL_CRT1B) & 0xf2;
1378 vga_wcrt(cinfo->regbase, CL_CRT1B, tmp);
1381 if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) {
1382 tmp = vga_rcrt(cinfo->regbase, CL_CRT1D);
1383 if (is_laguna(cinfo))
1387 vga_wcrt(cinfo->regbase, CL_CRT1D, tmp);
1395 vga_wattr(cinfo->regbase, CL_AR33, xpix);
1414 struct cirrusfb_info *cinfo = info->par;
1415 int current_mode = cinfo->blank_mode;
1434 val |= vga_rseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE) & 0xdf;
1435 vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, val);
1456 vga_wgfx(cinfo->regbase, CL_GRE, val);
1458 cinfo->blank_mode = blank_mode;
1471 struct cirrusfb_info *cinfo = info->par;
1474 assert(cinfo != NULL);
1476 bi = &cirrusfb_board_info[cinfo->btype];
1479 switch (cinfo->btype) {
1481 WSFR(cinfo, 0x01);
1483 WSFR(cinfo, 0x51);
1487 WSFR2(cinfo, 0xff);
1492 WSFR(cinfo, 0x1f);
1494 WSFR(cinfo, 0x4f);
1499 vga_wcrt(cinfo->regbase, CL_CRT51, 0x00);
1502 vga_wgfx(cinfo->regbase, CL_GR31, 0x00);
1505 vga_wgfx(cinfo->regbase, CL_GR2F, 0x00);
1508 vga_wgfx(cinfo->regbase, CL_GR33, 0x00);
1528 if (cinfo->btype != BT_PICASSO4) {
1529 WGen(cinfo, CL_VSSM, 0x10); /* EGS: 0x16 */
1530 WGen(cinfo, CL_POS102, 0x01);
1531 WGen(cinfo, CL_VSSM, 0x08); /* EGS: 0x0e */
1533 if (cinfo->btype != BT_SD64)
1534 WGen(cinfo, CL_VSSM2, 0x01);
1537 vga_wseq(cinfo->regbase, VGA_SEQ_RESET, 0x03);
1540 vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, 0x21);
1543 /* vga_wgfx(cinfo->regbase, CL_GRA, 0xce); */
1545 vga_wseq(cinfo->regbase, CL_SEQR6, 0x12);
1547 switch (cinfo->btype) {
1549 vga_wseq(cinfo->regbase, CL_SEQRF, 0x98);
1557 vga_wseq(cinfo->regbase, CL_SEQRF, 0xb8);
1561 vga_wseq(cinfo->regbase, CL_SEQR16, 0x0f);
1562 vga_wseq(cinfo->regbase, CL_SEQRF, 0xb0);
1567 vga_wseq(cinfo->regbase, VGA_SEQ_PLANE_WRITE, 0xff);
1569 vga_wseq(cinfo->regbase, VGA_SEQ_CHARACTER_MAP, 0x00);
1571 vga_wseq(cinfo->regbase, VGA_SEQ_MEMORY_MODE, 0x0a);
1575 vga_wseq(cinfo->regbase, CL_SEQR7, bi->sr07);
1577 /* vga_wseq(cinfo->regbase, CL_SEQR8, 0x00); */
1581 vga_wseq(cinfo->regbase, CL_SEQR10, 0x00);
1583 vga_wseq(cinfo->regbase, CL_SEQR11, 0x00);
1585 vga_wseq(cinfo->regbase, CL_SEQR12, 0x00);
1587 vga_wseq(cinfo->regbase, CL_SEQR13, 0x00);
1590 if (cinfo->btype != BT_PICASSO4) {
1592 vga_wseq(cinfo->regbase, CL_SEQR17, 0x00);
1594 vga_wseq(cinfo->regbase, CL_SEQR18, 0x02);
1598 vga_wcrt(cinfo->regbase, VGA_CRTC_PRESET_ROW, 0x00);
1600 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_START, 0x20);
1602 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_END, 0x00);
1604 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_HI, 0x00);
1606 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_LO, 0x00);
1609 vga_wcrt(cinfo->regbase, VGA_CRTC_UNDERLINE, 0x00);
1612 vga_wcrt(cinfo->regbase, CL_CRT1B, 0x02);
1615 vga_wgfx(cinfo->regbase, VGA_GFX_SR_VALUE, 0x00);
1617 vga_wgfx(cinfo->regbase, VGA_GFX_SR_ENABLE, 0x00);
1619 vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_VALUE, 0x00);
1621 vga_wgfx(cinfo->regbase, VGA_GFX_DATA_ROTATE, 0x00);
1623 vga_wgfx(cinfo->regbase, VGA_GFX_PLANE_READ, 0x00);
1625 vga_wgfx(cinfo->regbase, VGA_GFX_MODE, 0x00);
1627 vga_wgfx(cinfo->regbase, VGA_GFX_MISC, 0x01);
1629 vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_MASK, 0x0f);
1631 vga_wgfx(cinfo->regbase, VGA_GFX_BIT_MASK, 0xff);
1633 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64 ||
1634 is_laguna(cinfo))
1636 vga_wgfx(cinfo->regbase, CL_GRB, 0x20);
1641 vga_wgfx(cinfo->regbase, CL_GRB, 0x28);
1643 vga_wgfx(cinfo->regbase, CL_GRC, 0xff); /* Color Key compare: - */
1644 vga_wgfx(cinfo->regbase, CL_GRD, 0x00); /* Color Key compare mask: - */
1645 vga_wgfx(cinfo->regbase, CL_GRE, 0x00); /* Miscellaneous control: - */
1647 /* vga_wgfx (cinfo->regbase, CL_GR10, 0x00); */
1648 /* vga_wgfx (cinfo->regbase, CL_GR11, 0x00); */
1651 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE0, 0x00);
1652 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE1, 0x01);
1653 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE2, 0x02);
1654 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE3, 0x03);
1655 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE4, 0x04);
1656 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE5, 0x05);
1657 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE6, 0x06);
1658 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE7, 0x07);
1659 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE8, 0x08);
1660 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE9, 0x09);
1661 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEA, 0x0a);
1662 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEB, 0x0b);
1663 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEC, 0x0c);
1664 vga_wattr(cinfo->regbase, VGA_ATC_PALETTED, 0x0d);
1665 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEE, 0x0e);
1666 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEF, 0x0f);
1669 vga_wattr(cinfo->regbase, VGA_ATC_MODE, 0x01);
1671 vga_wattr(cinfo->regbase, VGA_ATC_OVERSCAN, 0x00);
1673 vga_wattr(cinfo->regbase, VGA_ATC_PLANE_ENABLE, 0x0f);
1675 vga_wattr(cinfo->regbase, VGA_ATC_COLOR_PAGE, 0x00);
1677 WGen(cinfo, VGA_PEL_MSK, 0xff); /* Pixel mask: no mask */
1680 vga_wgfx(cinfo->regbase, CL_GR31, 0x04);
1682 vga_wgfx(cinfo->regbase, CL_GR31, 0x00);
1685 WHDR(cinfo, 0); /* Hidden DAC register: - */
1689 static void switch_monitor(struct cirrusfb_info *cinfo, int on)
1694 if (cinfo->btype == BT_PICASSO4)
1696 if (cinfo->btype == BT_ALPINE)
1698 if (cinfo->btype == BT_GD5480)
1700 if (cinfo->btype == BT_PICASSO) {
1702 WSFR(cinfo, 0xff);
1706 switch (cinfo->btype) {
1708 WSFR(cinfo, cinfo->SFR | 0x21);
1711 WSFR(cinfo, cinfo->SFR | 0x28);
1714 WSFR(cinfo, 0x6f);
1719 switch (cinfo->btype) {
1721 WSFR(cinfo, cinfo->SFR & 0xde);
1724 WSFR(cinfo, cinfo->SFR & 0xd7);
1727 WSFR(cinfo, 0x4f);
1742 struct cirrusfb_info *cinfo = info->par;
1744 if (!is_laguna(cinfo)) {
1745 while (vga_rgfx(cinfo->regbase, CL_GR31) & 0x03)
1756 struct cirrusfb_info *cinfo = info->par;
1759 cinfo->pseudo_palette[region->color] : region->color;
1782 cirrusfb_RectFill(cinfo->regbase,
1795 struct cirrusfb_info *cinfo = info->par;
1823 cirrusfb_BitBLT(cinfo->regbase, info->var.bits_per_pixel,
1834 struct cirrusfb_info *cinfo = info->par;
1842 else if ((cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64) &&
1859 cirrusfb_RectFill(cinfo->regbase,
1867 cirrusfb_RectFill(cinfo->regbase,
1899 struct cirrusfb_info *cinfo = info->par;
1901 if (is_laguna(cinfo)) {
1927 if (cinfo->btype != BT_ALPINE && (SRF & 0x80) != 0)
1961 struct cirrusfb_info *cinfo = info->par;
1963 if (cinfo->laguna_mmio == NULL)
1964 iounmap(cinfo->laguna_mmio);
1978 struct cirrusfb_info *cinfo = info->par;
1984 iounmap(cinfo->regbase);
2008 struct cirrusfb_info *cinfo = info->par;
2011 info->pseudo_palette = cinfo->pseudo_palette;
2018 if (noaccel || is_laguna(cinfo)) {
2026 if (cinfo->btype == BT_GD5480) {
2034 strlcpy(info->fix.id, cirrusfb_board_info[cinfo->btype].name,
2057 struct cirrusfb_info *cinfo = info->par;
2061 assert(cinfo->btype != BT_NONE);
2101 struct cirrusfb_info *cinfo = info->par;
2103 switch_monitor(cinfo, 0);
2107 cinfo->unmap(info);
2115 struct cirrusfb_info *cinfo;
2133 cinfo = info->par;
2134 cinfo->btype = (enum cirrus_board) ent->driver_data;
2138 (unsigned long long)pdev->resource[0].start, cinfo->btype);
2148 cinfo->regbase = (char __iomem *) info->fix.mmio_start;
2154 cinfo->regbase = NULL;
2155 cinfo->laguna_mmio = ioremap(info->fix.mmio_start, 0x1000);
2161 board_size = (cinfo->btype == BT_GD5480) ?
2162 32 * MB_ : cirrusfb_get_memsize(info, cinfo->regbase);
2189 cinfo->unmap = cirrusfb_pci_unmap;
2211 if (cinfo->laguna_mmio != NULL)
2212 iounmap(cinfo->laguna_mmio);
2248 struct cirrusfb_info *cinfo;
2298 cinfo = info->par;
2299 cinfo->btype = btype;
2302 cinfo->regbase = regbase > 16 * MB_ ? ioremap(regbase, 64 * 1024)
2304 if (!cinfo->regbase) {
2320 cinfo->unmap = cirrusfb_zorro_unmap;
2328 vga_wseq(cinfo->regbase, CL_SEQR1F,
2347 iounmap(cinfo->regbase);
2452 static void WGen(const struct cirrusfb_info *cinfo,
2457 if (cinfo->btype == BT_PICASSO) {
2465 vga_w(cinfo->regbase, regofs + regnum, val);
2469 static unsigned char RGen(const struct cirrusfb_info *cinfo, int regnum)
2473 if (cinfo->btype == BT_PICASSO) {
2481 return vga_r(cinfo->regbase, regofs + regnum);
2485 static void AttrOn(const struct cirrusfb_info *cinfo)
2487 assert(cinfo != NULL);
2489 if (vga_rcrt(cinfo->regbase, CL_CRT24) & 0x80) {
2492 vga_w(cinfo->regbase, VGA_ATT_IW,
2493 vga_r(cinfo->regbase, VGA_ATT_R));
2496 /* vga_w(cinfo->regbase, VGA_ATT_IW, 0x20); */
2497 vga_w(cinfo->regbase, VGA_ATT_IW, 0x33);
2500 vga_w(cinfo->regbase, VGA_ATT_IW, 0x00);
2509 static void WHDR(const struct cirrusfb_info *cinfo, unsigned char val)
2513 if (is_laguna(cinfo))
2515 if (cinfo->btype == BT_PICASSO) {
2518 WGen(cinfo, VGA_PEL_MSK, 0x00);
2521 dummy = RGen(cinfo, VGA_PEL_IW);
2526 dummy = RGen(cinfo, VGA_PEL_MSK);
2528 dummy = RGen(cinfo, VGA_PEL_MSK);
2530 dummy = RGen(cinfo, VGA_PEL_MSK);
2532 dummy = RGen(cinfo, VGA_PEL_MSK);
2535 WGen(cinfo, VGA_PEL_MSK, val);
2538 if (cinfo->btype == BT_PICASSO) {
2540 dummy = RGen(cinfo, VGA_PEL_IW);
2545 WGen(cinfo, VGA_PEL_MSK, 0xff);
2551 static void WSFR(struct cirrusfb_info *cinfo, unsigned char val)
2554 assert(cinfo->regbase != NULL);
2555 cinfo->SFR = val;
2556 z_writeb(val, cinfo->regbase + 0x8000);
2561 static void WSFR2(struct cirrusfb_info *cinfo, unsigned char val)
2566 assert(cinfo->regbase != NULL);
2567 cinfo->SFR = val;
2568 z_writeb(val, cinfo->regbase + 0x9000);
2573 static void WClut(struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char red,
2579 vga_w(cinfo->regbase, VGA_PEL_IW, regnum);
2581 if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 ||
2582 cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480 ||
2583 cinfo->btype == BT_SD64 || is_laguna(cinfo)) {
2585 if (cinfo->btype == BT_PICASSO)
2587 vga_w(cinfo->regbase, data, red);
2588 vga_w(cinfo->regbase, data, green);
2589 vga_w(cinfo->regbase, data, blue);
2591 vga_w(cinfo->regbase, data, blue);
2592 vga_w(cinfo->regbase, data, green);
2593 vga_w(cinfo->regbase, data, red);
2599 static void RClut(struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char *red,
2604 vga_w(cinfo->regbase, VGA_PEL_IR, regnum);
2606 if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 ||
2607 cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480) {
2608 if (cinfo->btype == BT_PICASSO)
2610 *red = vga_r(cinfo->regbase, data);
2611 *green = vga_r(cinfo->regbase, data);
2612 *blue = vga_r(cinfo->regbase, data);
2614 *blue = vga_r(cinfo->regbase, data);
2615 *green = vga_r(cinfo->regbase, data);
2616 *red = vga_r(cinfo->regbase, data);