Lines Matching refs:tmp
686 unsigned char tmp;
791 tmp = hsyncend % 32;
793 tmp += 128;
794 dev_dbg(info->device, "CRT5: %d\n", tmp);
795 vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp);
800 tmp = 16; /* LineCompare bit #9 */
802 tmp |= 1;
804 tmp |= 2;
806 tmp |= 4;
808 tmp |= 8;
810 tmp |= 32;
812 tmp |= 64;
814 tmp |= 128;
815 dev_dbg(info->device, "CRT7: %d\n", tmp);
816 vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp);
818 tmp = 0x40; /* LineCompare bit #8 */
820 tmp |= 0x20;
822 tmp |= 0x80;
823 dev_dbg(info->device, "CRT9: %d\n", tmp);
824 vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp);
844 tmp = 0;
846 tmp |= 1;
848 tmp |= 16;
850 tmp |= 32;
852 tmp |= 64;
854 tmp |= 128;
856 dev_dbg(info->device, "CRT1a: %d\n", tmp);
857 vga_wcrt(regbase, CL_CRT1A, tmp);
908 tmp = den << 1;
910 tmp |= 1;
915 tmp |= 0x80;
919 vga_wseq(regbase, CL_SEQRE, tmp);
923 vga_wseq(regbase, CL_SEQR1E, tmp);
944 tmp = 0x03 | 0xc;
946 tmp |= 0x40;
948 tmp |= 0x80;
949 WGen(cinfo, VGA_MIS_W, tmp);
1229 tmp = 0x22;
1231 tmp |= 0x10; /* offset overflow bit */
1234 vga_wcrt(regbase, CL_CRT1B, tmp);
1241 tmp = 0;
1243 tmp |= 128;
1245 tmp |= 64;
1247 tmp |= 48;
1249 tmp |= 8;
1251 tmp |= 4;
1253 tmp |= 3;
1255 vga_wcrt(regbase, CL_CRT1E, tmp);
1256 dev_dbg(info->device, "CRT1e: %d\n", tmp);
1274 tmp = 0x01;
1278 tmp |= 0x08;
1281 vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, tmp);
1282 dev_dbg(info->device, "CL_SEQR1: %d\n", tmp);
1341 unsigned char tmp, xpix;
1368 /* 0xf2 is %11110010, exclude tmp bits */
1369 tmp = vga_rcrt(cinfo->regbase, CL_CRT1B) & 0xf2;
1372 tmp |= 0x01;
1374 tmp |= 0x04;
1376 tmp |= 0x08;
1378 vga_wcrt(cinfo->regbase, CL_CRT1B, tmp);
1382 tmp = vga_rcrt(cinfo->regbase, CL_CRT1D);
1384 tmp = (tmp & ~0x18) | ((base >> 16) & 0x18);
1386 tmp = (tmp & ~0x80) | ((base >> 12) & 0x80);
1387 vga_wcrt(cinfo->regbase, CL_CRT1D, tmp);