Searched defs:ControllerBaseAddress (Results 1 - 2 of 2) sorted by relevance

/drivers/block/
H A DDAC960.c540 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
550 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
569 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
577 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
594 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
602 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
620 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
628 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
646 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
654 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
672 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
698 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
723 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
740 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
1161 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
1368 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
5267 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
5308 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
5350 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
5392 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
5430 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
5468 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
5506 void __iomem *ControllerBaseAddress = Controller->BaseAddress; local
[all...]
H A DDAC960.h2636 void DAC960_GEM_HardwareMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
2642 ControllerBaseAddress + DAC960_GEM_InboundDoorBellRegisterReadSetOffset);
2646 void DAC960_GEM_AcknowledgeHardwareMailboxStatus(void __iomem *ControllerBaseAddress) argument
2652 ControllerBaseAddress + DAC960_GEM_InboundDoorBellRegisterClearOffset);
2656 void DAC960_GEM_GenerateInterrupt(void __iomem *ControllerBaseAddress) argument
2662 ControllerBaseAddress + DAC960_GEM_InboundDoorBellRegisterReadSetOffset);
2666 void DAC960_GEM_ControllerReset(void __iomem *ControllerBaseAddress) argument
2672 ControllerBaseAddress + DAC960_GEM_InboundDoorBellRegisterReadSetOffset);
2676 void DAC960_GEM_MemoryMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
2682 ControllerBaseAddress
2686 DAC960_GEM_HardwareMailboxFullP(void __iomem *ControllerBaseAddress) argument
2696 DAC960_GEM_InitializationInProgressP(void __iomem *ControllerBaseAddress) argument
2706 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
2716 DAC960_GEM_AcknowledgeMemoryMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
2726 DAC960_GEM_AcknowledgeInterrupt(void __iomem *ControllerBaseAddress) argument
2737 DAC960_GEM_HardwareMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
2747 DAC960_GEM_MemoryMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
2757 DAC960_GEM_EnableInterrupts(void __iomem *ControllerBaseAddress) argument
2768 DAC960_GEM_DisableInterrupts(void __iomem *ControllerBaseAddress) argument
2779 DAC960_GEM_InterruptsEnabledP(void __iomem *ControllerBaseAddress) argument
2803 DAC960_GEM_WriteHardwareMailbox(void __iomem *ControllerBaseAddress, dma_addr_t CommandMailboxDMA) argument
2812 DAC960_GEM_ReadCommandIdentifier(void __iomem *ControllerBaseAddress) argument
2818 DAC960_GEM_ReadCommandStatus(void __iomem *ControllerBaseAddress) argument
2824 DAC960_GEM_ReadErrorStatus(void __iomem *ControllerBaseAddress, unsigned char *ErrorStatus, unsigned char *Parameter0, unsigned char *Parameter1) argument
2947 DAC960_BA_HardwareMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
2957 DAC960_BA_AcknowledgeHardwareMailboxStatus(void __iomem *ControllerBaseAddress) argument
2967 DAC960_BA_GenerateInterrupt(void __iomem *ControllerBaseAddress) argument
2977 DAC960_BA_ControllerReset(void __iomem *ControllerBaseAddress) argument
2987 DAC960_BA_MemoryMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
2997 DAC960_BA_HardwareMailboxFullP(void __iomem *ControllerBaseAddress) argument
3006 DAC960_BA_InitializationInProgressP(void __iomem *ControllerBaseAddress) argument
3015 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3025 DAC960_BA_AcknowledgeMemoryMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3035 DAC960_BA_AcknowledgeInterrupt(void __iomem *ControllerBaseAddress) argument
3046 DAC960_BA_HardwareMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
3055 DAC960_BA_MemoryMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
3064 DAC960_BA_EnableInterrupts(void __iomem *ControllerBaseAddress) argument
3075 DAC960_BA_DisableInterrupts(void __iomem *ControllerBaseAddress) argument
3086 DAC960_BA_InterruptsEnabledP(void __iomem *ControllerBaseAddress) argument
3109 DAC960_BA_WriteHardwareMailbox(void __iomem *ControllerBaseAddress, dma_addr_t CommandMailboxDMA) argument
3118 DAC960_BA_ReadCommandIdentifier(void __iomem *ControllerBaseAddress) argument
3124 DAC960_BA_ReadCommandStatus(void __iomem *ControllerBaseAddress) argument
3130 DAC960_BA_ReadErrorStatus(void __iomem *ControllerBaseAddress, unsigned char *ErrorStatus, unsigned char *Parameter0, unsigned char *Parameter1) argument
3252 DAC960_LP_HardwareMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
3262 DAC960_LP_AcknowledgeHardwareMailboxStatus(void __iomem *ControllerBaseAddress) argument
3272 DAC960_LP_GenerateInterrupt(void __iomem *ControllerBaseAddress) argument
3282 DAC960_LP_ControllerReset(void __iomem *ControllerBaseAddress) argument
3292 DAC960_LP_MemoryMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
3302 DAC960_LP_HardwareMailboxFullP(void __iomem *ControllerBaseAddress) argument
3311 DAC960_LP_InitializationInProgressP(void __iomem *ControllerBaseAddress) argument
3320 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3330 DAC960_LP_AcknowledgeMemoryMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3340 DAC960_LP_AcknowledgeInterrupt(void __iomem *ControllerBaseAddress) argument
3351 DAC960_LP_HardwareMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
3360 DAC960_LP_MemoryMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
3369 DAC960_LP_EnableInterrupts(void __iomem *ControllerBaseAddress) argument
3379 DAC960_LP_DisableInterrupts(void __iomem *ControllerBaseAddress) argument
3389 DAC960_LP_InterruptsEnabledP(void __iomem *ControllerBaseAddress) argument
3411 DAC960_LP_WriteHardwareMailbox(void __iomem *ControllerBaseAddress, dma_addr_t CommandMailboxDMA) argument
3420 DAC960_LP_ReadCommandIdentifier(void __iomem *ControllerBaseAddress) argument
3426 DAC960_LP_ReadCommandStatus(void __iomem *ControllerBaseAddress) argument
3432 DAC960_LP_ReadErrorStatus(void __iomem *ControllerBaseAddress, unsigned char *ErrorStatus, unsigned char *Parameter0, unsigned char *Parameter1) argument
3566 DAC960_LA_HardwareMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
3576 DAC960_LA_AcknowledgeHardwareMailboxStatus(void __iomem *ControllerBaseAddress) argument
3586 DAC960_LA_GenerateInterrupt(void __iomem *ControllerBaseAddress) argument
3596 DAC960_LA_ControllerReset(void __iomem *ControllerBaseAddress) argument
3606 DAC960_LA_MemoryMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
3616 DAC960_LA_HardwareMailboxFullP(void __iomem *ControllerBaseAddress) argument
3625 DAC960_LA_InitializationInProgressP(void __iomem *ControllerBaseAddress) argument
3634 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3644 DAC960_LA_AcknowledgeMemoryMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3654 DAC960_LA_AcknowledgeInterrupt(void __iomem *ControllerBaseAddress) argument
3665 DAC960_LA_HardwareMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
3674 DAC960_LA_MemoryMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
3683 DAC960_LA_EnableInterrupts(void __iomem *ControllerBaseAddress) argument
3693 DAC960_LA_DisableInterrupts(void __iomem *ControllerBaseAddress) argument
3703 DAC960_LA_InterruptsEnabledP(void __iomem *ControllerBaseAddress) argument
3726 DAC960_LA_WriteHardwareMailbox(void __iomem *ControllerBaseAddress, DAC960_V1_CommandMailbox_T *CommandMailbox) argument
3740 DAC960_LA_ReadStatusCommandIdentifier(void __iomem *ControllerBaseAddress) argument
3747 DAC960_LA_ReadStatusRegister(void __iomem *ControllerBaseAddress) argument
3753 DAC960_LA_ReadErrorStatus(void __iomem *ControllerBaseAddress, unsigned char *ErrorStatus, unsigned char *Parameter0, unsigned char *Parameter1) argument
3887 DAC960_PG_HardwareMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
3897 DAC960_PG_AcknowledgeHardwareMailboxStatus(void __iomem *ControllerBaseAddress) argument
3907 DAC960_PG_GenerateInterrupt(void __iomem *ControllerBaseAddress) argument
3917 DAC960_PG_ControllerReset(void __iomem *ControllerBaseAddress) argument
3927 DAC960_PG_MemoryMailboxNewCommand(void __iomem *ControllerBaseAddress) argument
3937 DAC960_PG_HardwareMailboxFullP(void __iomem *ControllerBaseAddress) argument
3946 DAC960_PG_InitializationInProgressP(void __iomem *ControllerBaseAddress) argument
3955 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3965 DAC960_PG_AcknowledgeMemoryMailboxInterrupt(void __iomem *ControllerBaseAddress) argument
3975 DAC960_PG_AcknowledgeInterrupt(void __iomem *ControllerBaseAddress) argument
3986 DAC960_PG_HardwareMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
3995 DAC960_PG_MemoryMailboxStatusAvailableP(void __iomem *ControllerBaseAddress) argument
4004 DAC960_PG_EnableInterrupts(void __iomem *ControllerBaseAddress) argument
4016 DAC960_PG_DisableInterrupts(void __iomem *ControllerBaseAddress) argument
4028 DAC960_PG_InterruptsEnabledP(void __iomem *ControllerBaseAddress) argument
4051 DAC960_PG_WriteHardwareMailbox(void __iomem *ControllerBaseAddress, DAC960_V1_CommandMailbox_T *CommandMailbox) argument
4065 DAC960_PG_ReadStatusCommandIdentifier(void __iomem *ControllerBaseAddress) argument
4072 DAC960_PG_ReadStatusRegister(void __iomem *ControllerBaseAddress) argument
4078 DAC960_PG_ReadErrorStatus(void __iomem *ControllerBaseAddress, unsigned char *ErrorStatus, unsigned char *Parameter0, unsigned char *Parameter1) argument
4207 DAC960_PD_NewCommand(void __iomem *ControllerBaseAddress) argument
4217 DAC960_PD_AcknowledgeStatus(void __iomem *ControllerBaseAddress) argument
4227 DAC960_PD_GenerateInterrupt(void __iomem *ControllerBaseAddress) argument
4237 DAC960_PD_ControllerReset(void __iomem *ControllerBaseAddress) argument
4247 DAC960_PD_MailboxFullP(void __iomem *ControllerBaseAddress) argument
4256 DAC960_PD_InitializationInProgressP(void __iomem *ControllerBaseAddress) argument
4265 DAC960_PD_AcknowledgeInterrupt(void __iomem *ControllerBaseAddress) argument
4275 DAC960_PD_StatusAvailableP(void __iomem *ControllerBaseAddress) argument
4284 DAC960_PD_EnableInterrupts(void __iomem *ControllerBaseAddress) argument
4294 DAC960_PD_DisableInterrupts(void __iomem *ControllerBaseAddress) argument
4304 DAC960_PD_InterruptsEnabledP(void __iomem *ControllerBaseAddress) argument
4313 DAC960_PD_WriteCommandMailbox(void __iomem *ControllerBaseAddress, DAC960_V1_CommandMailbox_T *CommandMailbox) argument
4327 DAC960_PD_ReadStatusCommandIdentifier(void __iomem *ControllerBaseAddress) argument
4334 DAC960_PD_ReadStatusRegister(void __iomem *ControllerBaseAddress) argument
4340 DAC960_PD_ReadErrorStatus(void __iomem *ControllerBaseAddress, unsigned char *ErrorStatus, unsigned char *Parameter0, unsigned char *Parameter1) argument
[all...]

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