Searched defs:IMR (Results 1 - 13 of 13) sorted by relevance
| /drivers/net/ethernet/realtek/ |
| H A D | atp.h | 40 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator in enum:page0_regs
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| /drivers/video/ |
| H A D | i740_reg.h | 231 #define IMR 0x3034 macro
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| /drivers/video/i810/ |
| H A D | i810_regs.h | 46 #define IMR 0x020A8 macro
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| /drivers/net/ethernet/ |
| H A D | fealnx.c | 175 IMR = 0x38, /* interrupt mask */ enumerator in enum:fealnx_offsets
909 iowrite32(np->imrvalue, ioaddr + IMR);
1137 iowrite32(0, ioaddr + IMR);
1172 iowrite32(np->imrvalue, ioaddr + IMR);
1447 iowrite32(0, ioaddr + IMR);
1605 iowrite32(np->imrvalue, ioaddr + IMR);
1905 iowrite32(0x0000, ioaddr + IMR);
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| /drivers/net/wan/ |
| H A D | dscc4.c | 274 #define IMR 0x54 macro
1075 scc_writel(EventsMask, dpriv, dev, IMR);
1099 scc_writel(EventsMask, dpriv, dev, IMR);
1135 scc_writel(0xffffffff, dpriv, dev, IMR);
1195 scc_writel(0xffffffff, dpriv, dev, IMR);
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| /drivers/atm/ |
| H A D | firestream.h | 297 #define IMR 0x6c macro
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| /drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 282 #define IMR 0x3a macro
289 // IMR/ISR
341 write_reg16(info, CHA + IMR, info->imra_value);
344 write_reg16(info, CHB + IMR, info->imrb_value);
351 write_reg16(info, CHA + IMR, info->imra_value);
354 write_reg16(info, CHB + IMR, info->imrb_value);
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| /drivers/net/ethernet/natsemi/ |
| H A D | ns83820.c | 328 #define IMR 0x14 macro
767 writel(dev->IMR_cache, dev->base + IMR);
788 writel(dev->IMR_cache, dev->base + IMR);
796 readl(dev->base + IMR);
950 writel(dev->IMR_cache, dev->base + IMR);
1387 writel(0, dev->base + IMR);
1438 writel(dev->IMR_cache, dev->base + IMR);
1495 writel(dev->IMR_cache, dev->base + IMR);
1509 writel(dev->IMR_cache, dev->base + IMR);
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| /drivers/staging/rtl8187se/ |
| H A D | r8180_hw.h | 186 #define IMR 0x006C macro
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| /drivers/video/intelfb/ |
| H A D | intelfbhw.h | 94 #define IMR 0x20A8 macro
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| /drivers/gpu/drm/gma500/ |
| H A D | psb_intel_reg.h | 744 #define IMR 0x020a8 macro
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| /drivers/net/ethernet/via/ |
| H A D | via-velocity.h | 565 * Bits in the IMR register
595 /* 0x0013FB0FUL = initial value of IMR */
944 #define IMR_MASK_VALUE 0x0033FF0FUL /* initial value of IMR
948 #define IMR_MASK_VALUE 0x0013FB0FUL /* initial value of IMR
996 volatile __le32 IMR; member in struct:mac_regs
1161 #define mac_write_int_mask(mask, regs) writel((mask),&((regs)->IMR));
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| /drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | 456 #define IMR 0x020a8 macro
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