Searched defs:PIPE_VBLANK_INTERRUPT_ENABLE (Results 1 - 2 of 2) sorted by relevance

/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h501 #define PIPE_VBLANK_INTERRUPT_ENABLE (1UL << 17) macro
/drivers/gpu/drm/i915/
H A Di915_reg.h2452 #define PIPE_VBLANK_INTERRUPT_ENABLE (1UL<<17) macro

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