Searched defs:PORT (Results 1 - 7 of 7) sorted by relevance
/drivers/tty/serial/8250/ |
H A D | 8250_accent.c | 13 #define PORT(_base,_irq) \ macro 23 PORT(0x330, 4), 24 PORT(0x338, 4),
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H A D | 8250_boca.c | 13 #define PORT(_base,_irq) \ macro 23 PORT(0x100, 12), 24 PORT(0x108, 12), 25 PORT(0x110, 12), 26 PORT(0x118, 12), 27 PORT(0x120, 12), 28 PORT(0x128, 12), 29 PORT(0x130, 12), 30 PORT(0x138, 12), 31 PORT( [all...] |
H A D | 8250_exar_st16c554.c | 16 #define PORT(_base,_irq) \ macro 26 PORT(0x100, 5), 27 PORT(0x108, 5), 28 PORT(0x110, 5), 29 PORT(0x118, 5),
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H A D | 8250_fourport.c | 13 #define PORT(_base,_irq) \ macro 23 PORT(0x1a0, 9), 24 PORT(0x1a8, 9), 25 PORT(0x1b0, 9), 26 PORT(0x1b8, 9), 27 PORT(0x2a0, 5), 28 PORT(0x2a8, 5), 29 PORT(0x2b0, 5), 30 PORT(0x2b8, 5),
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H A D | 8250_mca.c | 23 #define PORT(_base,_irq) \ macro 33 PORT(0x3220, 3), 34 PORT(0x3228, 3), 35 PORT(0x4220, 3), 36 PORT(0x4228, 3), 37 PORT(0x5220, 3), 38 PORT(0x5228, 3),
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/drivers/net/ethernet/amd/ |
H A D | ni65.c | 112 #define PORT p->cmdr_addr macro 159 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \ 160 outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);} 161 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\ 162 inw(PORT+L_DATAREG)) 164 #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT [all...] |
/drivers/net/ethernet/i825xx/ |
H A D | lp486e.c | 49 the PORT and CA signal, and the interrupt glue needed for a pc. 51 PORT SIZE ACTION MEANING 52 0xCB0 2 WRITE Lower 16 bits for PORT command 53 0xCB2 2 WRITE Upper 16 bits for PORT command, and issue of PORT command 496 PORT(phys_addr a, unsigned int cmd) { function 498 printk("lp486e.c: PORT: address not aligned\n"); 525 PORT(va_to_pa(outp), portcmd); 581 PORT(0, PORT_RESET); /* address part ignored */ 588 PORT(va_to_p [all...] |
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