Searched defs:bank (Results 1 - 25 of 71) sorted by relevance

123

/drivers/mfd/
H A Dab8500-sysctrl.c16 static inline bool valid_bank(u8 bank) argument
18 return ((bank == AB8500_SYS_CTRL1_BLOCK) ||
19 (bank == AB8500_SYS_CTRL2_BLOCK));
24 u8 bank; local
29 bank = (reg >> 8);
30 if (!valid_bank(bank))
33 return abx500_get_register_interruptible(sysctrl_dev, bank,
39 u8 bank; local
44 bank = (reg >> 8);
45 if (!valid_bank(bank))
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H A Dab5500-core.h49 const struct ab5500_i2c_ranges *bank; member in struct:ab5500_i2c_banks
55 * @name: Documentation name of the bank. For reference
84 int ab5500_get_register_interruptible_raw(struct ab5500 *ab, u8 bank, u8 reg,
86 int ab5500_mask_and_set_register_interruptible_raw(struct ab5500 *ab, u8 bank,
H A Dabx500-core.c66 int abx500_set_register_interruptible(struct device *dev, u8 bank, u8 reg, argument
73 return ops->set_register(dev, bank, reg, value);
79 int abx500_get_register_interruptible(struct device *dev, u8 bank, u8 reg, argument
86 return ops->get_register(dev, bank, reg, value);
92 int abx500_get_register_page_interruptible(struct device *dev, u8 bank, argument
99 return ops->get_register_page(dev, bank,
106 int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank, argument
113 return ops->mask_and_set_register(dev, bank,
H A Dab5500-core.c41 * Permissible register ranges for reading and writing per device and bank.
53 .bank = (struct ab5500_i2c_ranges []) {
124 .bank = (struct ab5500_i2c_ranges []) {
165 .bank = (struct ab5500_i2c_ranges []) {
181 .bank = (struct ab5500_i2c_ranges []) {
252 .bank = (struct ab5500_i2c_ranges []) {
334 .bank = (struct ab5500_i2c_ranges []) {
350 .bank = (struct ab5500_i2c_ranges []) {
371 .bank = (struct ab5500_i2c_ranges []) {
392 .bank
999 ab5500_get_register_interruptible_raw(struct ab5500 *ab, u8 bank, u8 reg, u8 *value) argument
1017 get_register_page_interruptible(struct ab5500 *ab, u8 bank, u8 first_reg, u8 *regvals, u8 numregs) argument
1048 ab5500_mask_and_set_register_interruptible_raw(struct ab5500 *ab, u8 bank, u8 reg, u8 bitmask, u8 bitvalues) argument
1083 set_register_interruptible(struct ab5500 *ab, u8 bank, u8 reg, u8 value) argument
1092 get_bankref(u8 devid, u8 bank) argument
1105 page_write_allowed(u8 devid, u8 bank, u8 first_reg, u8 last_reg) argument
1124 reg_write_allowed(u8 devid, u8 bank, u8 reg) argument
1129 page_read_allowed(u8 devid, u8 bank, u8 first_reg, u8 last_reg) argument
1162 reg_read_allowed(u8 devid, u8 bank, u8 reg) argument
1178 ab5500_mask_and_set_register_interruptible(struct device *dev, u8 bank, u8 reg, u8 bitmask, u8 bitvalues) argument
1193 ab5500_set_register_interruptible(struct device *dev, u8 bank, u8 reg, u8 value) argument
1200 ab5500_get_register_interruptible(struct device *dev, u8 bank, u8 reg, u8 *value) argument
1214 ab5500_get_register_page_interruptible(struct device *dev, u8 bank, u8 first_reg, u8 *regvals, u8 numregs) argument
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H A Dab5500-debugfs.c519 u8 bank = (u8)ab->debug_bank; local
522 for (bank = 0; bank < AB5500_NUM_BANKS; bank++) {
523 seq_printf(s, " bank %u, %s (0x%x):\n", bank,
524 bankinfo[bank].name,
525 bankinfo[bank].slave_addr);
526 for (i = 0; i < ab5500_reg_ranges[bank].nranges; i++) {
530 for (reg = ab5500_reg_ranges[bank]
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H A Dab8500-debugfs.c36 * @bankid: bank identifier
361 u32 bank = debug_bank; local
365 seq_printf(s, " bank %u:\n", bank);
366 for (i = 0; i < debug_ranges[bank].num_ranges; i++) {
369 for (reg = debug_ranges[bank].range[i].first;
370 reg <= debug_ranges[bank].range[i].last;
376 (u8)bank, (u8)reg, &value);
382 err = seq_printf(s, " [%u/0x%02X]: 0x%02X\n", bank,
564 ab8500_reg_file = debugfs_create_file("all-bank
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H A Dezx-pcap.c25 u8 bank; member in struct:pcap_adc_request
253 /* start conversion on requested bank, save TS_M bits */
258 if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1)
305 int pcap_adc_async(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[], argument
315 req->bank = bank;
348 int pcap_adc_sync(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[], argument
355 ret = pcap_adc_async(pcap, bank, flags, ch, pcap_adc_sync_cb,
/drivers/hwspinlock/
H A Dhwspinlock_internal.h44 * @bank: the hwspinlock_device structure which owns this lock
49 struct hwspinlock_device *bank; member in struct:hwspinlock
72 int local_id = hwlock - &hwlock->bank->lock[0];
74 return hwlock->bank->base_id + local_id;
H A Dhwspinlock_core.c120 ret = hwlock->bank->ops->trylock(hwlock);
202 if (hwlock->bank->ops->relax)
203 hwlock->bank->ops->relax(hwlock);
248 hwlock->bank->ops->unlock(hwlock);
312 * @bank: the hwspinlock device, which usually provides numerous hw locks
315 * @base_id: id of the first hardware spinlock in this bank
325 int hwspin_lock_register(struct hwspinlock_device *bank, struct device *dev, argument
331 if (!bank || !ops || !dev || !num_locks || !ops->trylock ||
337 bank->dev = dev;
338 bank
373 hwspin_lock_unregister(struct hwspinlock_device *bank) argument
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H A Domap_hwspinlock.c84 struct hwspinlock_device *bank; local
113 bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL);
114 if (!bank) {
119 platform_set_drvdata(pdev, bank);
121 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
130 ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
139 kfree(bank);
147 struct hwspinlock_device *bank = platform_get_drvdata(pdev); local
148 void __iomem *io_base = bank
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H A Du8500_hsem.c97 struct hwspinlock_device *bank; local
122 bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL);
123 if (!bank) {
128 platform_set_drvdata(pdev, bank);
130 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
136 ret = hwspin_lock_register(bank, &pdev->dev, &u8500_hwspinlock_ops,
145 kfree(bank);
153 struct hwspinlock_device *bank = platform_get_drvdata(pdev); local
154 void __iomem *io_base = bank
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/drivers/media/dvb/frontends/
H A Dcxd2820r_priv.h56 u8 bank[2]; member in struct:cxd2820r_priv
H A Dcxd2820r_core.c95 u8 bank = (reginfo >> 8) & 0xff; local
104 /* switch bank if needed */
105 if (bank != priv->bank[i2c]) {
106 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
109 priv->bank[i2c] = bank;
121 u8 bank = (reginfo >> 8) & 0xff; local
130 /* switch bank if needed */
131 if (bank !
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/drivers/dma/ipu/
H A Dipu_irq.c76 struct ipu_irq_bank *bank; member in struct:ipu_irq_map
100 struct ipu_irq_bank *bank; local
106 bank = map->bank;
107 if (!bank) {
113 reg = ipu_read_reg(bank->ipu, bank->control);
115 ipu_write_reg(bank->ipu, reg, bank->control);
123 struct ipu_irq_bank *bank; local
146 struct ipu_irq_bank *bank; local
171 struct ipu_irq_bank *bank; local
277 struct ipu_irq_bank *bank = irq_bank + i; local
318 struct ipu_irq_bank *bank = irq_bank + i; local
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/drivers/staging/line6/
H A Dvariax.h96 Name of current model bank.
98 unsigned char bank[18]; member in struct:usb_line6_variax
/drivers/gpio/
H A Dgpio-adp5588.c78 unsigned bank, bit; local
82 bank = ADP5588_BANK(off);
87 dev->dat_out[bank] |= bit;
89 dev->dat_out[bank] &= ~bit;
91 adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
92 dev->dat_out[bank]);
99 unsigned bank; local
103 bank = ADP5588_BANK(off);
106 dev->dir[bank] &= ~ADP5588_BIT(off);
107 ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, de
117 unsigned bank, bit; local
199 unsigned bank, bit; local
246 unsigned status, bank, bit, pending; local
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H A Dgpio-davinci.c257 /* we only care about one bank */
348 unsigned gpio, irq, bank; local
359 printk(KERN_ERR "Don't know first GPIO bank IRQ.\n");
372 * banked IRQs. Having GPIOs in the first GPIO bank use direct
376 for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) {
377 chips[bank].chip.to_irq = gpio_to_irq_banked;
378 chips[bank].irq_base = soc_info->gpio_unbanked
391 /* pass "bank 0" GPIO IRQs to AINTC */
421 for (gpio = 0, irq = gpio_to_irq(0), bank
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H A Dgpio-ep93xx.c322 void __iomem *mmio_base, struct ep93xx_gpio_bank *bank)
324 void __iomem *data = mmio_base + bank->data;
325 void __iomem *dir = mmio_base + bank->dir;
332 bgc->gc.label = bank->label;
333 bgc->gc.base = bank->base;
335 if (bank->has_debounce) {
375 struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i]; local
377 if (ep93xx_gpio_add_bank(bgc, &pdev->dev, mmio, bank))
378 dev_warn(&pdev->dev, "Unable to add gpio bank %s\n",
379 bank
321 ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev, void __iomem *mmio_base, struct ep93xx_gpio_bank *bank) argument
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H A Dgpio-stmpe.c243 int bank = num_banks - i - 1; local
244 unsigned int enabled = stmpe_gpio->regs[REG_IE][bank];
253 int line = bank * 8 + bit;
/drivers/leds/
H A Dleds-mc13783.c78 int bank, off, shift; local
106 bank = off/3;
108 shift = (off - bank * 3) * 5 + MC13783_LED_C3_TC_P;
137 int ret, bank; local
167 bank = (led->id - MC13783_LED_R1)/3;
168 reg = MC13783_REG_LED_CONTROL_3 + bank;
169 shift = ((led->id - MC13783_LED_R1) - bank * 3) * 2;
/drivers/pinctrl/
H A Dpinctrl-tegra.c46 static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg) argument
48 return readl(pmx->regs[bank] + reg);
51 static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg) argument
53 writel(val, pmx->regs[bank] + reg);
207 s8 *bank, s16 *reg, s8 *bit, s8 *width)
211 *bank = g->pupd_bank;
217 *bank = g->tri_bank;
223 *bank = g->einput_bank;
229 *bank = g->odrain_bank;
235 *bank
204 tegra_pinconf_reg(struct tegra_pmx *pmx, const struct tegra_pingroup *g, enum tegra_pinconf_param param, s8 *bank, s16 *reg, s8 *bit, s8 *width) argument
323 s8 bank, bit, width; local
352 s8 bank, bit, width; local
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/drivers/regulator/
H A Dab8500.c33 * @update_bank: bank to control on/off
37 * @voltage_bank: bank to control regulator voltage
122 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
147 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
174 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
224 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
286 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
355 * update bank, reg, mask, enable val
356 * volt bank, reg, mask, table, table length
446 * update bank, re
559 u8 bank; member in struct:ab8500_reg_init
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/drivers/input/keyboard/
H A Dadp5588-keys.c78 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); local
81 return !!(adp5588_read(kpad->client, GPIO_DAT_STAT1 + bank) & bit);
88 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); local
94 kpad->dat_out[bank] |= bit;
96 kpad->dat_out[bank] &= ~bit;
98 adp5588_write(kpad->client, GPIO_DAT_OUT1 + bank,
99 kpad->dat_out[bank]);
107 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); local
113 kpad->dir[bank] &= ~bit;
114 ret = adp5588_write(kpad->client, GPIO_DIR1 + bank, kpa
125 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); local
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/drivers/mtd/nand/
H A Dfsl_elbc_nand.c56 int bank; /* Chip select bank number */ member in struct:fsl_elbc_mtd
198 dev_vdbg(priv->dev, "set_addr: bank=%d, "
227 "fbcr=%08x bank=%d\n",
229 in_be32(&lbc->fbcr), priv->bank);
233 out_be32(&lbc->lsor, priv->bank);
525 * chips per bank.
718 clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);
721 setbits32(&lbc->bank[pri
856 int bank; local
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/drivers/edac/
H A Dppc4xx_edac.c44 * - Up to 1 GiB per bank/rank in 32-bit mode and up to 512 MiB per
45 * bank/rank in 16-bit mode.
57 * - Up to 4 GiB per bank/rank in 64-bit mode and up to 2 GiB
58 * per bank/rank in 32-bit mode.
71 * - Up to 16 GiB per bank/rank in 64-bit mode and up to 8 GiB
72 * per bank/rank in 32-bit mode.
133 * Macros to convert bank configuration size enumerations into MiB and
273 * ppc4xx_edac_check_bank_error - check a bank for an ECC bank error
275 * ECC bank erro
285 ppc4xx_edac_check_bank_error(const struct ppc4xx_ecc_status *status, unsigned int bank) argument
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