Searched defs:cqn (Results 1 - 16 of 16) sorted by relevance

/drivers/infiniband/hw/amso1100/
H A Dc2_user.h69 __u32 cqn; member in struct:c2_create_cq_resp
H A Dc2_cq.c46 static struct c2_cq *c2_cq_get(struct c2_dev *c2dev, int cqn) argument
52 cq = c2dev->qptr_array[cqn];
369 cq->cqn = cq->mq.index;
370 c2dev->qptr_array[cq->cqn] = cq;
H A Dc2_provider.h95 int cqn; member in struct:c2_cq
/drivers/net/ethernet/mellanox/mlx4/
H A Den_resources.c41 int is_tx, int rss, int qpn, int cqn,
61 context->cqn_send = cpu_to_be32(cqn);
62 context->cqn_recv = cpu_to_be32(cqn);
40 mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, int is_tx, int rss, int qpn, int cqn, struct mlx4_qp_context *context) argument
H A Dsrq.c165 int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd, argument
197 srq_context->pg_offset_cqn = cpu_to_be32(cqn & 0xffffff);
H A Dcq.c56 void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn) argument
61 cqn & (dev->caps.num_cqs - 1));
63 mlx4_dbg(dev, "Completion event for bogus CQ %08x\n", cqn);
72 void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type) argument
79 cq = radix_tree_lookup(&cq_table->tree, cqn & (dev->caps.num_cqs - 1));
86 mlx4_warn(dev, "Async event for bogus CQ %08x\n", cqn);
136 err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 1);
164 err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 0);
171 int __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn) argument
177 *cqn
198 mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn) argument
217 __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn) argument
227 mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn) argument
[all...]
H A Deq.c235 int cqn; local
254 cqn = be32_to_cpu(eqe->event.comp.cqn) & 0xffffff;
255 mlx4_cq_completion(dev, cqn);
376 be32_to_cpu(eqe->event.cq_err.cqn) & 0xffffff);
380 be32_to_cpu(eqe->event.cq_err.cqn)
397 be32_to_cpu(eqe->event.cq_err.cqn)
H A Dmlx4_en.h235 u16 cqn; /* index of port CQ associated with this ring */ member in struct:mlx4_en_tx_ring
272 u16 cqn; /* index of port CQ associated with this ring */ member in struct:mlx4_en_rx_ring
543 int is_tx, int rss, int qpn, int cqn,
H A Dresource_tracker.c876 static int cq_res_start_move_to(struct mlx4_dev *dev, int slave, int cqn, argument
885 r = radix_tree_lookup(&tracker->res_tree[RES_CQ], cqn);
1137 int cqn; local
1142 err = __mlx4_cq_alloc_icm(dev, &cqn);
1146 err = add_res_range(dev, slave, cqn, 1, RES_CQ, 0);
1148 __mlx4_cq_free_icm(dev, cqn);
1152 set_param_l(out_param, cqn);
1427 int cqn; local
1432 cqn = get_param_l(&in_param);
1433 err = rem_res_range(dev, slave, cqn,
2111 int cqn = vhcr->in_modifier; local
2149 int cqn = vhcr->in_modifier; local
2173 int cqn = vhcr->in_modifier; local
2245 int cqn = vhcr->in_modifier; local
2822 int cqn; local
[all...]
H A Dmlx4.h324 __be32 cqn; member in struct:mlx4_eqe::__anon2677::__anon2678
341 __be32 cqn; member in struct:mlx4_eqe::__anon2677::__anon2682
800 int __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn);
801 void __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn);
977 void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
978 void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
/drivers/infiniband/hw/mlx4/
H A Duser.h70 __u32 cqn; member in struct:mlx4_ib_create_cq_resp
H A Dsrq.c79 u32 cqn; local
179 cqn = (init_attr->srq_type == IB_SRQT_XRC) ?
180 to_mcq(init_attr->ext.xrc.cq)->mcq.cqn : 0;
184 err = mlx4_srq_alloc(dev->dev, to_mpd(pd)->pdn, cqn, xrcdn, &srq->mtt,
/drivers/infiniband/hw/mthca/
H A Dmthca_user.h83 __u32 cqn; member in struct:mthca_create_cq_resp
H A Dmthca_cq.c76 __be32 cqn; member in struct:mthca_cq_context
211 mthca_write64(MTHCA_TAVOR_CQ_DB_INC_CI | cq->cqn, incr - 1,
222 void mthca_cq_completion(struct mthca_dev *dev, u32 cqn) argument
226 cq = mthca_array_get(&dev->cq_table.cq, cqn & (dev->limits.num_cqs - 1));
229 mthca_warn(dev, "Completion event for bogus CQ %08x\n", cqn);
238 void mthca_cq_event(struct mthca_dev *dev, u32 cqn, argument
246 cq = mthca_array_get(&dev->cq_table.cq, cqn & (dev->limits.num_cqs - 1));
253 mthca_warn(dev, "Async event for bogus CQ %08x\n", cqn);
302 qpn, cq->cqn, cq->cons_index, prod_index);
389 cq->cqn, c
[all...]
H A Dmthca_eq.c132 __be32 cqn; member in struct:mthca_eqe::__anon1012::__anon1013
149 __be32 cqn; member in struct:mthca_eqe::__anon1012::__anon1017
219 static inline void disarm_cq(struct mthca_dev *dev, int eqn, int cqn) argument
222 mthca_write64(MTHCA_EQ_DB_DISARM_CQ | eqn, cqn,
276 disarm_cqn = be32_to_cpu(eqe->event.comp.cqn) & 0xffffff;
343 be32_to_cpu(eqe->event.cq_err.cqn) & 0xffffff);
344 mthca_cq_event(dev, be32_to_cpu(eqe->event.cq_err.cqn),
H A Dmthca_provider.h141 * a qp may be locked, with the cq with the lower cqn locked first.
205 int cqn; member in struct:mthca_cq

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