/arch/arm/plat-versatile/ |
H A D | sched-clock.c | 27 static void __iomem *ctr; variable 31 if (ctr) 32 return readl(ctr); 39 ctr = reg;
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/arch/alpha/oprofile/ |
H A D | op_model_ev4.c | 22 struct op_counter_config *ctr, 40 ctl |= (ctr[0].enabled ? ctr[0].event << 8 : 14 << 8); 41 ctl |= (ctr[1].enabled ? (ctr[1].event - 16) << 32 : 7ul << 32); 49 count = ctr[0].count; 54 ctr[0].count = count; 55 ctl |= (ctr[0].enabled && hilo) << 3; 57 count = ctr[1].count; 62 ctr[ 21 ev4_reg_setup(struct op_register_config *reg, struct op_counter_config *ctr, struct op_system_config *sys) argument 94 ev4_handle_interrupt(unsigned long which, struct pt_regs *regs, struct op_counter_config *ctr) argument [all...] |
H A D | op_model_ev6.c | 22 struct op_counter_config *ctr, 30 if (ctr[0].enabled && ctr[0].event) 31 ctl |= (ctr[0].event & 1) << 4; 32 if (ctr[1].enabled) 33 ctl |= (ctr[1].event - 2) & 15; 48 unsigned long count = ctr[i].count; 49 if (!ctr[i].enabled) 54 ctr[i].count = count; 80 ev6_reset_ctr(struct op_register_config *reg, unsigned long ctr) argument 21 ev6_reg_setup(struct op_register_config *reg, struct op_counter_config *ctr, struct op_system_config *sys) argument 86 ev6_handle_interrupt(unsigned long which, struct pt_regs *regs, struct op_counter_config *ctr) argument [all...] |
H A D | common.c | 29 static struct op_counter_config ctr[20]; variable in typeref:struct:op_counter_config 38 model->handle_interrupt(which, regs, ctr); 59 if (ctr[i].enabled) 64 model->reg_setup(®, ctr, &sys); 119 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); 120 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); 121 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count); 123 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); 124 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); 125 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[ [all...] |
H A D | op_model_ev5.c | 27 struct op_counter_config *ctr, 48 unsigned long event = ctr[i].event; 49 if (!ctr[i].enabled) 92 unsigned long max, hilo, count = ctr[i].count; 93 if (!ctr[i].enabled) 104 ctr[i].count = count; 118 struct op_counter_config *ctr, 121 common_reg_setup(reg, ctr, sys, 19, 22); 126 struct op_counter_config *ctr, 129 common_reg_setup(reg, ctr, sy 26 common_reg_setup(struct op_register_config *reg, struct op_counter_config *ctr, struct op_system_config *sys, int cbox1_ofs, int cbox2_ofs) argument 117 ev5_reg_setup(struct op_register_config *reg, struct op_counter_config *ctr, struct op_system_config *sys) argument 125 pca56_reg_setup(struct op_register_config *reg, struct op_counter_config *ctr, struct op_system_config *sys) argument 158 ev5_reset_ctr(struct op_register_config *reg, unsigned long ctr) argument 184 ev5_handle_interrupt(unsigned long which, struct pt_regs *regs, struct op_counter_config *ctr) argument [all...] |
H A D | op_model_ev67.c | 23 struct op_counter_config *ctr, 33 if (ctr[1].enabled) { 34 ctl |= (ctr[1].event & 3) << 2; 36 if (ctr[0].event == 0) /* cycles */ 53 unsigned long count = ctr[i].count; 54 if (!ctr[i].enabled) 59 ctr[i].count = count; 85 ev67_reset_ctr(struct op_register_config *reg, unsigned long ctr) argument 87 wrperfmon(6, reg->reset_values | (1 << ctr)); 134 struct op_counter_config *ctr, unsigne 22 ev67_reg_setup(struct op_register_config *reg, struct op_counter_config *ctr, struct op_system_config *sys) argument 133 op_add_pm(unsigned long pc, int kern, unsigned long counter, struct op_counter_config *ctr, unsigned long event) argument 144 ev67_handle_interrupt(unsigned long which, struct pt_regs *regs, struct op_counter_config *ctr) argument [all...] |
/arch/mips/oprofile/ |
H A D | common.c | 24 static struct op_counter_config ctr[20]; variable in typeref:struct:op_counter_config 29 model->reg_setup(ctr); 48 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); 49 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); 50 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count); 51 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); 52 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); 53 oprofilefs_create_ulong(sb, dir, "exl", &ctr[i].exl); 55 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
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H A D | op_model_rm9000.c | 39 static void rm9000_reg_setup(struct op_counter_config *ctr) argument 45 if (ctr[0].enabled) 46 control |= RM9K_COUNTER1_EVENT(ctr[0].event) | 50 if (ctr[1].enabled) 51 control |= RM9K_COUNTER2_EVENT(ctr[1].event) | 57 reg.reset_counter1 = 0x80000000 - ctr[0].count; 58 reg.reset_counter2 = 0x80000000 - ctr[1].count;
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H A D | op_model_mipsxx.c | 134 static void mipsxx_reg_setup(struct op_counter_config *ctr) argument 144 if (!ctr[i].enabled) 147 reg.control[i] = M_PERFCTL_EVENT(ctr[i].event) | 149 if (ctr[i].kernel) 151 if (ctr[i].user) 153 if (ctr[i].exl) 155 reg.counter[i] = 0x80000000 - ctr[i].count;
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/arch/mn10300/kernel/ |
H A D | mn10300-watchdog.c | 80 u8 ctr; local 89 ctr = WDCTR_WDCK_65536th; 90 WDCTR = WDCTR_WDRST | ctr; 91 WDCTR = ctr; 94 tmp = __muldiv64u(1 << (16 + ctr * 2), 1000000, MN10300_WDCLK);
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/arch/powerpc/oprofile/ |
H A D | common.c | 28 static struct op_counter_config ctr[OP_MAX_COUNTER]; variable in typeref:struct:op_counter_config 35 model->handle_interrupt(regs, ctr); 42 ret = model->cpu_setup(ctr); 60 op_per_cpu_rc = model->reg_setup(ctr, &sys, model->num_counters); 90 ret = model->start(ctr); 100 return model->global_start(ctr); 165 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); 166 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); 167 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count); 176 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[ [all...] |
H A D | op_model_pa6t.c | 92 static int pa6t_reg_setup(struct op_counter_config *ctr, argument 106 if (!ctr[pmc].enabled) { 134 reset_value[pmc] = (0x1UL << 39) - ctr[pmc].count; 143 static int pa6t_cpu_setup(struct op_counter_config *ctr) argument 163 static int pa6t_start(struct op_counter_config *ctr) argument 171 if (ctr[i].enabled) 201 struct op_counter_config *ctr) 219 if (oprofile_running && ctr[i].enabled) { 200 pa6t_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr) argument
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H A D | op_model_rs64.c | 90 static int rs64_reg_setup(struct op_counter_config *ctr, argument 99 reset_value[i] = 0x80000000UL - ctr[i].count; 105 static int rs64_cpu_setup(struct op_counter_config *ctr) argument 132 static int rs64_start(struct op_counter_config *ctr) argument 141 if (ctr[i].enabled) { 143 ctrl_write(i, ctr[i].event); 178 struct op_counter_config *ctr) 194 if (ctr[i].enabled) { 177 rs64_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr) argument
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H A D | op_model_7450.c | 83 static int fsl7450_cpu_setup(struct op_counter_config *ctr) argument 97 static int fsl7450_reg_setup(struct op_counter_config *ctr, argument 110 reset_value[i] = 0x80000000UL - ctr[i].count; 113 mmcr0_val = MMCR0_INIT | mmcr0_event1(ctr[0].event) 114 | mmcr0_event2(ctr[1].event); 124 mmcr1_val = mmcr1_event3(ctr[2].event) 125 | mmcr1_event4(ctr[3].event); 127 mmcr1_val |= mmcr1_event5(ctr[4].event) 128 | mmcr1_event6(ctr[5].event); 136 static int fsl7450_start(struct op_counter_config *ctr) argument 173 fsl7450_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr) argument [all...] |
H A D | op_model_fsl_emb.c | 32 static inline u32 get_pmlca(int ctr) argument 36 switch (ctr) { 50 panic("Bad ctr number\n"); 56 static inline void set_pmlca(int ctr, u32 pmlca) argument 58 switch (ctr) { 72 panic("Bad ctr number\n"); 113 static void init_pmc_stop(int ctr) argument 119 switch (ctr) { 137 panic("Bad ctr number!\n"); 141 static void set_pmc_event(int ctr, in argument 154 set_pmc_user_kernel(int ctr, int user, int kernel) argument 173 set_pmc_marked(int ctr, int mark0, int mark1) argument 190 pmc_start_ctr(int ctr, int enable) argument 230 fsl_emb_cpu_setup(struct op_counter_config *ctr) argument 248 fsl_emb_reg_setup(struct op_counter_config *ctr, struct op_system_config *sys, int num_ctrs) argument 267 fsl_emb_start(struct op_counter_config *ctr) argument 315 fsl_emb_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr) argument [all...] |
H A D | op_model_power4.c | 35 static int power4_reg_setup(struct op_counter_config *ctr, argument 51 reset_value[i] = 0x80000000UL - ctr[i].count; 95 static int power4_cpu_setup(struct op_counter_config *ctr) argument 126 static int power4_start(struct op_counter_config *ctr) argument 135 if (ctr[i].enabled) { 286 struct op_counter_config *ctr) 306 if (oprofile_running && ctr[i].enabled) { 285 power4_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr) argument
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/arch/x86/boot/ |
H A D | a20.c | 59 int saved, ctr; local 64 saved = ctr = rdfs32(A20_TEST_ADDR); 67 wrfs32(++ctr, A20_TEST_ADDR); 69 ok = rdgs32(A20_TEST_ADDR+0x10) ^ ctr;
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/arch/avr32/oprofile/ |
H A D | op_model_avr32.c | 65 struct avr32_perf_counter *ctr = dev_id; local 80 if (ctr->enabled && (pccr & ctr->flag_mask)) { 81 sysreg_write(PCCNT, -ctr->count); 84 ctr++; 86 if (ctr->enabled && (pccr & ctr->flag_mask)) { 87 sysreg_write(PCNT0, -ctr->count); 90 ctr++; 92 if (ctr 132 struct avr32_perf_counter *ctr; local [all...] |
/arch/s390/include/asm/ |
H A D | cpu_mf.h | 82 static inline int ecctr(u64 ctr, u64 *val) argument 91 : "=d" (content), "=d" (cc) : "d" (ctr) : "cc");
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/arch/powerpc/platforms/cell/ |
H A D | pmu.c | 126 u32 cbe_read_ctr(u32 cpu, u32 ctr) argument 129 u32 phys_ctr = ctr & (NR_PHYS_CTRS - 1); 134 val = (ctr < NR_PHYS_CTRS) ? (val >> 16) : (val & 0xffff); 140 void cbe_write_ctr(u32 cpu, u32 ctr, u32 val) argument 145 phys_ctr = ctr & (NR_PHYS_CTRS - 1); 150 if (ctr < NR_PHYS_CTRS) 165 u32 cbe_read_pm07_control(u32 cpu, u32 ctr) argument 169 if (ctr < NR_CTRS) 170 READ_SHADOW_REG(pm07_control, pm07_control[ctr]); 176 void cbe_write_pm07_control(u32 cpu, u32 ctr, u3 argument [all...] |
/arch/um/sys-ppc/shared/sysdep/ |
H A D | ptrace.h | 22 PPC_REG ctr; member in struct:sys_pt_regs_s
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/arch/mn10300/proc-mn103e010/include/proc/ |
H A D | dmactl-regs.h | 91 u32 ctr; member in struct:mn10300_dmactl_regs
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/arch/mn10300/proc-mn2ws0050/include/proc/ |
H A D | dmactl-regs.h | 92 u32 ctr; member in struct:mn10300_dmactl_regs
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/arch/powerpc/kernel/ |
H A D | ppc32.h | 99 unsigned int ctr; member in struct:pt_regs32
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/arch/x86/kvm/ |
H A D | pmu.c | 418 u64 ctr; local 426 ctr = read_pmc(&counters[pmc]); 428 ctr = (u32)ctr; 429 *data = ctr;
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